CN1511350A - 微电子压电结构 - Google Patents

微电子压电结构 Download PDF

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CN1511350A
CN1511350A CNA018132804A CN01813280A CN1511350A CN 1511350 A CN1511350 A CN 1511350A CN A018132804 A CNA018132804 A CN A018132804A CN 01813280 A CN01813280 A CN 01813280A CN 1511350 A CN1511350 A CN 1511350A
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拉马默西·拉麦士
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王玉
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詹福瑞·M·芬德
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库特·艾森比萨
于志毅
拉文卓诺斯·卓柏德
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Abstract

通过首先在硅晶片上生长一个钛酸锶层(104),可以在大硅晶片上生长高质量的单晶Pb(Zr,Ti)O3外延层(110)。该钛酸锶层(104)为单晶层,与所述硅晶片之间隔有一个氧化硅无定形中间层(116)。

Description

微电子压电结构
技术领域
本发明总体上涉及微电子结构和器件及其制造方法,尤其涉及包括压电薄膜的结构和器件及其制造和用途。
背景技术
压电材料对于多种应用都是有用的。例如,压电材料常用于构成压力计、传感器、触觉传感器、机器人控制器、高频声音发生器、频率控制电路以及振荡器。
通常,所需的压电材料特性,例如压电效应,随着材料的结晶度的提高而提高。因此,常常需要高结晶质量的压电材料。
与用于构成微电子器件比如微电子压力传感器、振荡器等的其他材料相比,大体积(bulk form)的压电材料比较贵。由于大体积压电材料目前的总的来说比较高的成本并且不易获得,多年来试图在外部衬底上生长压电材料薄膜。但是,为了获得优化的压电材料特性,需要具有高结晶质量的单晶膜。例如,已试图在衬底比如硅上生长压电材料单晶层。这些努力通常都不成功,因为基质晶体和生长晶体之间的晶格失配导致形成的压电材料薄膜的结晶质量低。
如果能够低成本地获得大面积、高质量的单晶压电材料薄膜,则可以有益地使用这种薄膜来制造许多半导体微电子器件,并且成本与在压电材料大晶片(bulk wafer)上制造这样的器件相比更低。另外,如果能够在大晶片比如硅晶片上实现高质量的单晶压电材料薄膜,则可以既利用硅、也利用压电材料的最佳特性来实现集成器件结构。
因此,需要一种在另一种单晶材料上提供高质量的单晶压电膜的微电子结构,并需要一种制造这样的结构的方法。
附图说明
下面结合附图作为举例而非限制对本发明加以说明。本发明的附图简要图解了本发明的一种器件结构的剖面图。
具体实施方式
附图以剖面图的方式简要图解了根据本发明的一个实施例的微电子结构100的一部分。该结构100可以用来形成例如压电致动器、压电传感器以及铁电存储单元。
微电子结构100包括一个单晶硅衬底102、一个单晶(Ba,Sr)TiO3层103、导电的单晶(La,Sr)CoO3层106和108、一个单晶Pb(Zr,Ti)O3或者说PZT(锆钛酸铅)层110、一个第一电极112和一个第二电极114。在本文件中,术语“单晶(的)”的含义应当是半导体工业中通用的含义。该术语指的是这样的材料:为单个晶体,或者基本上为单个晶体,应当包括那些具有较少数量的缺陷比如位错等的材料(这些缺陷通常可以在硅、锗或者硅锗混合衬底中发现),并包括在半导体工业中通常都有的这样的材料的外延层。根据本发明,结构100还包括位于衬底102和适应缓冲层(accommodating buffer layer)之间的无定形中间层116。
根据本发明的一个实施例,衬底102最好是半导体工业中所使用的高质量单晶硅大晶片。单晶(Ba,Sr)TiO3层104最好是在下伏衬底上外延生长的单晶钛酸锶材料。根据本发明的一个实施例,通过层104生长过程中衬底102的氧化,无定形中间层116在衬底102和生长的(Ba,Sr)TiO3层之间的界面上生长于衬底102上。
无定形中间层116最好是通过氧化衬底102的表面而形成的氧化物,最好是由氧化硅组成。一般,层116的厚度约在0.5-5nm。
(La,Sr)CoO3层106和108通常构造为允许生成跨过PZT层110的电场。另外,单晶层106允许在层106上形成单晶层110。根据本发明的一个优选实施例,层106和108的组成为La0.5Sr0.5CoO3,它们的厚度最好大于30nm,更好的是约30-100nm。
与相同或类似材料的多晶膜相比,单晶压电PZT层110具有更大的压电效应。因此,包括这种单晶膜的结构能够产生更强的电信号(按薄膜的每单位变形量)。反之,施加到薄膜上的单位电场可以产生更大的变形。为了提供理想的压电效应,层110的厚度最好为30-500nm,其组成为Pb0.4Zr0.6TiO3
电极112和114便于分别到层108和106的电连接,同时提供比较惰性的电极。根据本发明,电极112和114的厚度约为100-200nm。
单晶衬底102的晶体结构以晶格常数和晶格取向为表征。类似地,PZT层也是单晶材料,该单晶材料的晶格也以晶格常数和晶向为表征。PZT层和单晶硅衬底的晶格常数必须紧密匹配,或者,通过将一个晶向相对于另一个晶向旋转,能够使晶格常数基本匹配。在这里,“基本相等”和“基本匹配”的含义是,晶格常数之间的相似性足以允许在下伏层上生长出高质量的晶体层。
根据本发明的一个实施例,衬底102是(100)或者(111)取向的单晶硅大晶片,通过将所述钛酸盐材料的晶向相对于硅衬底大晶片的晶向旋转45°,硅衬底和钛酸盐层104的晶格常数基本匹配。
层106-110是外延生长单晶材料,这些晶体材料也以各自的晶格常数和晶向为表征。为了在这些外延生长单晶层中达到高的结晶质量,所述适应缓冲层必须具有高的结晶质量。另外,为了在随后淀积的薄膜106-110中获得高的结晶质量,也需要基质晶体(在本例中是单晶(Ba,Sr)TiO3)和生长晶体的晶格常数基本匹配。
下面的例子用于说明本发明的一种用于制造微电子结构比如附图所示结构的方法。该方法始于提供由硅组成的单晶半导体衬底。根据本发明的一个优选实施例,该半导体衬底是(100)取向的硅晶片。衬底的取向最好是在晶轴(axis)上,至多离轴0.5°。该半导体衬底的至少一部分具有裸露的表面,该衬底的其他部分如下所述可能包含其他结构。术语“裸露”在这里的意思是在该衬底的该部分中,表面已经经过清洗,除掉了氧化物、污染物以及其他外来物质。众所周知,裸露的硅活性很高,容易形成天然氧化物。术语“裸露”的意思包括这样的天然氧化物。也可以在半导体衬底上有意地生长薄层氧化硅,尽管这样生长的氧化物对于本发明的方法来说并不是必需的。为了在单晶硅衬底上外延生长单晶(Ba,Sr)TiO3层,天然氧化物层必须首先去除掉,以便露出下伏衬底的晶体结构。接下来的工艺最好用分子束外延(MBE)法进行,尽管根据本发明也可以用其他的外延工艺。天然氧化物可以这样去除:首先在MBE设备中热淀积一薄层锶、钡或者锶钡组合物。在使用锶的情况下,然后将衬底加热到约750℃的温度,使锶与天然氧化硅层反应。锶用来去除氧化硅,露出无氧化硅的表面。得到的表面具有有序的2×1结构,包括锶、氧和硅。有序2×1结构(ordered 2×1 structure)形成上覆钛酸盐层的有序生长的一个模板(template)。该模板具有必要的化学和物理特性,对上覆层的晶体生长起核的作用。
根据本发明的另一个实施例,可以通过下述手段转化所述天然氧化硅,为单晶氧化物层的生长准备衬底表面:用MBE在低温下向衬底表面淀积氧化锶、氧化锶钡或者氧化钡,然后将该结构加热到约750℃的温度。在此温度,在氧化锶和天然氧化硅之间发生固态反应,去除天然氧化硅,留下一种有序2×1结构,锶、氧和硅留在衬底表面。同样,这形成有序单晶钛酸盐层随后的生长的一个模板。
在从衬底表面去除氧化硅之后,根据本发明的一个实施例,将衬底冷却到约200-800℃的温度范围,用分子束外延法在模板层上生长一个钛酸锶层(例如约9-11nm)。MBE工艺始于打开MBE设备中的闸板,暴露出锶、钛和氧源。锶和钛的比例大约为1∶1。氧的分压初始设定在一个最小值,以以0.3-0.5nm每分钟的生长速度生长化学计量的(stochiometric)钛酸锶。在启动钛酸锶的生长后,氧的分压增加到初始最小值以上。氧的过压导致在下伏衬底和生长的钛酸锶层之间的界面上生长无定形氧化硅层。氧化硅层的生长是由于氧透过生长中的钛酸锶层扩散到下伏衬底的表面。钛酸锶生长为有序单晶,其晶向相对于下伏衬底的有序2×1晶体结构旋转45°。
在钛酸锶层生长到所需厚度后,可以用一个模板层将单晶钛酸锶盖住,该模板层有助于所需的压电材料外延层的下一步生长。例如,钛酸锶单晶层的MBE生长可以被盖住,用1-2个钛单层、1-2个钛-氧单层或者1-2个锶-氧单层来终止生长。
在形成所述模板之后(或者,如果没有形成模板,在形成钛酸盐层之后),用溅射淀积法生长(La,Sr)CoO3材料。更具体地说,通过RF磁控管溅射(面对面结构)从压缩(La,Sr)CoO3靶生长(La,Sr)CoO3层。进行淀积时用氧作为溅射气体,衬底温度约为400-600℃。
下一步,用旋压、溶胶-凝胶涂敷技术(spin-on,sol-gel coatingtechnique)在(La,Sr)CoO3层106上形成PZT层110,然后在450℃到800℃之间煅烧、结晶,形成单晶层。PZT层110也可用PVD或者CVD技术形成。
随后,在单晶层106和108上形成电极112和114:用溅射淀积技术淀积电极材料(例如铂或者铱),然后对材料进行图案形成(patterning)和蚀刻,从部分层106和108上去除所述材料。例如,可以利用惰性环境中的RF磁控管溅射将来自铂靶的材料溅射到(La,Sr)CoO3层上,从而将铂淀积到(La,Sr)CoO3层106和108上。在淀积铂之后,利用合适的干法或者湿法蚀刻环境对铂进行光刻成图(photolithographically patterned)和蚀刻,形成电极112和114。
在前述说明中,参照具体的实施例描述了本发明。但是,本领域普通技术人员会认识到,在不脱离权利要求所限定的本发明的范围的前提下,可以作出各种各样的变化和改动。因此,本说明书和附图只应视为说明性的,而非限制性的,所有所述变化和改动都应包括在本
发明的范围中。
上面已经针对具体实施例描述了益处、优点和对问题的解决方案。但是,这些益处、优点、对问题的解决方案,以及任何可能使所述益处、优点或者解决方案产生或者变得更为明确的因素不应被解释为任何或者所有权利要求的关键的、必需的或者本质的特征或者因素。在本文件中,术语“包括”或者其变化形式的意思是非排他的包括。比如,一项包括一组元素的工艺、方法、物品或者设备不是仅仅包括所述一组元素,还包括其他未明确列举的或者这样的工艺、方法、物品或设备固有的元素。

Claims (25)

1.一种钙钛矿型异质结构,包括:
一个单晶硅衬底;
一个覆在所述硅衬底上的包含(Sr,Ba)TiO3的第一单晶氧化物层;
一个覆在所述第一层上的包含(La,Sr)CoO3的第二单晶层;
一个覆在所述第二单晶层上的包含Pb(Zr,Ti)O3的第三单晶层;和
一个覆在所述第三单晶层上的包含(La,Sr)CoO3的第四单晶层。
2.如权利要求1所述的钙钛矿型异质结构,还包括一个在所述第一层下面的无定形层。
3.如权利要求1所述的钙钛矿型异质结构,还包括一个结合到所述第二单晶层的第一金属电极,以及一个结合到所述第四单晶层的第二金属电极。
4.如权利要求3所述的钙钛矿型异质结构,其中,所述第一金属电极和所述第二金属电极各包含一种选自铂和铱的金属。
5.如权利要求3所述的钙钛矿型异质结构,其中,所述第二单晶层、第三单晶层、第四单晶层和第一和第二金属电极构成下述器件中的一种:压电致动器、压电传感器和铁电存储单元。
6.如权利要求1所述的钙钛矿型异质结构,其中所述第一层的厚度为约9-11nm。
7.如权利要求1所述的钙钛矿型异质结构,其中,所述第二单晶层和所述第四单晶层各自的厚度大于约100nm。
8.如权利要求7所述的钙钛矿型异质结构,其中,所述第三单晶层的厚度大于约200nm。
9.如权利要求1所述的钙钛矿型异质结构,其中,所述第三单晶层的厚度大于约200nm。
10.如权利要求9所述的钙钛矿型异质结构,其中,所述第二单晶层的厚度大于约100nm。
11.如权利要求10所述的钙钛矿型异质结构,还包括一个在所述第一层下面的无定形层。
12.如权利要求1所述的钙钛矿型异质结构,其中,所述第二单晶层包括La0.5Sr0.5CoO3
13.一种钙钛矿型异质结构,包括:
一个单晶硅衬底;
一个覆在所述硅衬底上的包含(Sr,Ba)TiO3的第一单晶层;
一个形成在所述第一单晶层下面的氧化硅层;
一个覆在所述第一层上的包含(La,Sr)CoO3的第二单晶层;
一个与所述第二单晶层电接触的第一电极;
一个覆在所述第二单晶层上的包含Pb(Zr,Ti)O3的第三单晶层;
一个覆在所述第三单晶层上的包含(La,Sr)CoO3的第四单晶层;和
一个与所述第四单晶层电接触的第二电极。
14.如权利要求13所述的钙钛矿型异质结构,其中,所述第二单晶层和第四单晶层各包括La0.5Sr0.5CoO3
15.一种制造钙钛矿型异质结构的方法,包括下列步骤:
提供一个硅衬底;
在所述硅衬底上外延生长包含(Ba,Sr)TiO3的第一单晶层;
在所述第一单晶氧化物层的外延生长步骤期间,在所述第一单晶氧化物层下面形成一个氧化硅无定形层;
在所述第一单晶氧化物层上外延生长包含(La,Sr)CoO3的第二单晶层;
在所述第二单晶层上外延生长包含Pb(Zr,Ti)O3的第三单晶层;以及
在所述第三单晶层上外延生长包含(La,Sr)CoO3的第四单晶层。
16.如权利要求15所述的方法,其中,外延生长第一单晶层的步骤包括用分子束外延法生长该第一层的步骤。
17.如权利要求15所述的方法,其中,外延生长第三单晶层的步骤包括用下述方法之一生长该第三层:溶胶-凝胶法、物理汽相淀积和化学汽相淀积。
18.如权利要求15所述的方法,还包括对所述第四单晶层和所述第三单晶层进行图案形成,以暴露出所述第二单晶层的一部分的步骤。
19.如权利要求18所述的方法,还包括下列步骤:
在已形成图案的第四单晶层和所述部分第二单晶层上淀积一个金属层;以及
对该金属层进行图案形成,以形成到所述第四单晶层和所述部分第二单晶层的电接点。
20.如权利要求15所述的方法,其中,外延生长第二单晶层的步骤包括生长一个包含La0.5Sr0.5CoO3的层的步骤。
21.一种制造钙钛矿型异质结构的方法,包括下列步骤:
提供一个硅衬底;
在所述硅衬底上外延生长包含(Ba,Sr)TiO3的第一单晶层;
在所述第一单晶氧化物层上外延生长包含(La,Sr)CoO3的第二单晶层;
在所述第二单晶层上外延生长包含Pb(Zr,Ti)O3的第三单晶层;以及
在所述第三单晶层上形成一个导电层。
22.如权利要求21所述的方法,其中,外延生长第三单晶层的步骤包括用下述方法之一生长一个层:溶胶-凝胶法、物理汽相淀积和化学汽相淀积。
23.如权利要求21所述的方法,其中,形成导电层的步骤包括淀积一个包含一种金属的层的步骤,该金属选自铂和铱。
24.如权利要求21所述的方法,其中,外延生长第二单晶层的步骤包括生长一个厚度大于约30nm的层的步骤。
25.如权利要求24所述的方法,其中,外延生长第二单晶层的步骤包括生长一个包含La0.5Sr0.5CoO3的层的步骤。
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