CN1519918A - 半导体集成装置及其制造方法 - Google Patents

半导体集成装置及其制造方法 Download PDF

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Publication number
CN1519918A
CN1519918A CNA2004100028516A CN200410002851A CN1519918A CN 1519918 A CN1519918 A CN 1519918A CN A2004100028516 A CNA2004100028516 A CN A2004100028516A CN 200410002851 A CN200410002851 A CN 200410002851A CN 1519918 A CN1519918 A CN 1519918A
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mentioned
semiconductor integrated
support matrices
semiconductor
integrated device
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�崨����
冲川满
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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Abstract

本发明提供一种半导体集成装置及其制造方法。课题是提供降低热应力同时防止特性的劣化的半导体集成装置。可以用包括已形成有半导体集成电路的半导体芯片，和已粘接到半导体芯片的至少一面上的支持基体(14)，半导体芯片和支持基体(14)用已混合进粒状的填充剂的树脂(40)进行粘接，树脂(40)的最小膜厚比填充剂的最大粒径还大的半导体集成装置解决上述课题。

Description

半导体集成装置及其制造方法
技术领域
本发明涉及把混合进微小粒子的树脂夹在中间把支持基体粘接到半导体芯片的至少一面上的半导体集成装置及其制造方法。
背景技术
近些年来，为了使装配半导体集成装置的芯片的尺寸小型化，广为使用球栅阵列型(BGA)等的芯片尺寸封装(CSP)。例如，为了使利用CCD图像传感器的数字摄像机小型化，在CCD图像传感器的装配中就采用的了芯片尺寸封装。
图8是从表面一侧和背面一侧使用芯片尺寸封装的半导体集成装置的立体图的一个例子。
用第1和第2支持基体12、14把绝缘树脂16、17粘接到半导体芯片10的表面和背面上，半导体芯片10在借助于第1和第2支持基体12、14提高构造上的强度的同时，还被保护为免受来自外部的污染。在第2支持基体14的外部表面上设置多个球状端子18，半导体芯片10的内部布线和球状端子18用外部布线20连接起来。对于半导体芯片10来说可以用球状端子18实现与外部元件之间的接触。
图9示出了使用芯片尺寸封装的半导体集成装置的工艺流程图。在这里，为了明确地进行说明，模式性地扩大示出了半导体衬底22的一部分。在半导体衬底22的表面上形成用切片线划分开来的一个一个的半导体集成电路24。在半导体集成电路24上边成膜氧化膜等的绝缘膜26，配置与半导体集成电路24内的布线进行连接的内部布线28，内部布线28用来实现半导体集成电路24和外部之间的接触(S10)。
其次，把作为粘接剂的绝缘树脂材料16夹在中间地把第1支持基体12粘接到半导体衬底22的表面上，然后，从半导体衬底22的背面一侧施行研磨处理以使半导体衬底22薄膜化。其次，沿着划分半导体集成电路24的切片线从半导体芯片10的背面一侧施行刻蚀，使相邻的的半导体集成电路24之间的绝缘膜26露出来(S12)。
其次，把作为粘接剂的绝缘树脂材料17夹在中间地把第2支持基体14粘接到半导体衬底22的背面上，用第1和第2支持基体12、14把半导体衬底22夹在中间地形成叠层体100。此外，在第2支持基体14的外部表面上，在以后将配置球状端子18的位置上设置缓冲构件32。该缓冲构件32，起着缓和要加在球状端子18上的应力的缓冲器的作用。
其次，采用用切片刀具从第2支持基体14一侧开始沿着切片线进行切削的办法形成倒V型的沟34(S16)。接触部分30的内部布线28也归因于切削而被切断，内部布线28的端部36就将在沟34的内面上露出来。
在第2支持基体14的外部表面和沟34的内面上成膜金属膜，采用用光刻技术刻蚀该金属膜的办法形成外部布线20。外部布线20被图形化为把内部布线28的端部36和缓冲构件32之间连接起来(S18)。
此外，采用在外部布线20上边在保护膜38和缓冲构件32上边形成球状端子18，沿着切片线接着分断的办法，完成变成为芯片尺寸封装进行装配的半导体集成装置(S20)。
例如，在把芯片尺寸封装应用于CCD图像传感器的情况下，由于半导体集成电路24一侧将变成为受光面，故至少要把从光学性上说具有高的透过率的玻璃板等透明的材料用做第1支持基体12。此外，把第1支持基体12和半导体芯片10粘接起来的绝缘树脂16也可使用具有高的透过率的环氧树脂等。
另一方面，为了粘接第2支持基体14，把环氧树脂等的有机类材料用做绝缘树脂17的情况下，归因于绝缘树脂17与半导体衬底22之间的热膨胀系数的不同而会在两者间产生应力。其结果是，将发生半导体芯片10弯曲或半导体集成电路14的特性劣化等的问题。为此，要采用向把半导体芯片10和第2支持基体14连接起来的绝缘树脂17内混合进本身为热膨胀率比有机类材料更小的二氧化硅(SiO2)或氧化镁(MgO)等的微粒的填充剂(微小粒子)，使作为整体的热膨胀率与半导体衬底22的热膨胀率匹配后再使用。
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发明内容
(发明要解决的课题)
但是，在用混合进填充剂的绝缘树脂17粘接半导体芯片10和第2支持基体14的情况下，就会发生归因于绝缘树脂17的膜厚变薄而使得半导体集成装置特性劣化的问题，或者半导体集成装置完全被破坏的问题。
鉴于上述现有技术的问题，本发明的目的在于提供降低热应力，同时防止特性的劣化的半导体集成装置及其制造方法。
(具体解决方式)
本发明的半导体集成装置，具备已形成有半导体集成电路的半导体芯片，和要叠层到上述半导体芯片的至少一面上的支持基体，其特征在于：在上述半导体芯片与上述支持基体之间填充上已混合进微小粒子的树脂，上述半导体芯片与上述支持基体之间的间隔比上述微小粒子的最大粒径还大。
在这里，在上述本发明的半导体集成装置中，也可以采用在上述半导体芯片之内至少形成了上述半导体集成电路的元件有效区域中，使上述半导体芯片与上述支持基体之间的间隔形成得比上述微小粒子的最大粒径还大的办法得到本发明的效果。
此外，在上述本发明的半导体集成装置中，上述树脂也可以含有2层以上的树脂层。就是说，上述树脂可以采用包括含有上述微小粒子的树脂层和不含有上述微小粒子的树脂层的办法发挥效果。
此外，在本发明的别的方式中，半导体集成装置的制造方法，具备：向已形成有半导体集成电路的半导体衬底的至少一面上涂敷已混合进微小粒子的树脂，把上述树脂夹在中间地把支持基体叠层到上述半导体衬底上的第1工序，和把上述支持基体推压到上述半导体衬底上的第2工序，其特征在于：上述第2工序在将上述半导体衬底和上述支持基体之间的间隔保持为比上述微小粒子的最大粒径还大的同时把上述支持基体推压到上述半导体衬底上。
在这里，在上述本发明的半导体集成装置的制造方法中，在上述第2工序之后，还具有对上述树脂施行热处理以使之硬化的工序，上述第2工序，在进行上述热硬化工序时理想的是将上述半导体衬底与上述半导体支持基体之间的间隔保持为比把上述树脂的膜厚要收缩的收缩量和上述微小粒子的最大粒径合计起来的大小还大。
此外，本发明的别的方式的半导体集成装置的制造方法，具备：向已形成有半导体集成电路的半导体衬底的至少一面上涂敷已混合进微小粒子的第1树脂层的第1工序，使在上述第1工序中涂敷上的第1树脂层硬化的第2工序，向上述第2工序中硬化后的第1树脂层上边涂敷不含有微小粒子的第2树脂层的第3工序，其特征在于：在上述第2工序之后，使得硬化后的上述第1树脂层的膜厚保持为比上述微小粒子的最大粒径还大那样地进行硬化。
特别是在上述第1工序之前，具有刻蚀上述半导体衬底的背面以使上述半导体衬底的厚度变薄的工序的情况下，本发明更为有效。
如果采用本发明，则可以减小在半导体集成装置中产生的热应力，同时还可以防止特性的劣化。
附图说明
图1是本发明的实施方式1的半导体集成装置的构造的剖面图。
图2是对本发明的实施方式1的半导体集成装置的绝缘树脂部分进行了扩大的剖面图。
图3是本发明的实施方式1的半导体集成装置的工艺流程图。
图4用来说明本发明的实施方式的支持基体的预备性的粘接工序的图。
图5用来说明本发明的实施方式的绝缘树脂的膜厚的调整的图。
图6用来说明本发明的实施方式的绝缘树脂的膜厚的测定方法的图。
图7示出了在绝缘树脂的膜厚的测定中得到的反射光的相干的情景。
图8示出了已装配到芯片尺寸封装内的半导体集成装置的外观的图。
图9是现有的半导体集成装置的工艺流程图。
图10是本发明的实施方式2的半导体集成装置的构造的剖面图。
图11是对本发明的实施方式2的半导体集成装置的绝缘树脂部分进行了扩大的剖面图。
图12是本发明的实施方式2的半导体集成装置的工艺流程图。
标号说明：
10-半导体芯片；12-第1支持基体；14-第2支持基体，16、17-绝缘树脂；18-球状端子；20-外部布线，22-半导体衬底；24-半导体集成电路；26-绝缘膜；28-内部布线；30-接触部分；32缓冲构件；34-沟；36-端部；38-保护膜；40-绝缘树脂；40-1含有填充剂的绝缘树脂层；40-2-不含填充剂的绝缘树脂层；42-树脂材料；44-填充剂；50-上部固定夹具；52-下部固定夹具；54膜厚调整夹具；100、200-叠层体。
具体实施方式
(实施方式1)
以下，参看附图，详细地对实施方式1进行说明。
<半导体集成装置的构造>
图1示出了实施方式1的半导体集成装置的构造的剖面图。本实施方式的半导体集成装置，具有与应用现有的芯片尺寸封装的半导体集成装置同样的构造。
就是说，在半导体衬底22的表面上形成半导体集成电路24，在该半导体集成电路24上边成膜绝缘膜26。然后，通过设置在绝缘膜26上的贯通孔把内部布线28连接起来构成半导体芯片。内部布线28其端部已在半导体芯片的侧面上露出来，用于进行半导体集成电路24和外部布线20之间的接触。
第1和第2支持基体12、14，分别粘接到半导体芯片的表面一侧和背面一侧。在第2支持基体14的外部表面上配置缓冲构件32，在缓冲构件32上边设置球状端子18。在半导体芯片的侧面随时露出来的内部布线28的端部和球状端子18用在半导体芯片的侧面上形成的外部布线20连接起来。此外，要把保护膜38设置为使得外部布线20或第2支持基体14在外部不露出来。
第1支持基体12，与现有技术同样，用绝缘树脂16与半导体芯片进行粘接。例如，在已在半导体衬底22的表面上形成的半导体集成电路24是CCD图像传感器的情况下，第1支持基体12可以使用具有高的光透过率的玻璃板等的透明的材料。此外，绝缘树脂16也可以使用具有高的透过率的环氧树脂等。
另一方面，第2支持基体14，用绝缘树脂40与半导体芯片进行粘接。为了减小与含于半导体芯片中的半导体衬底22之间的热膨胀系数之差，在绝缘树脂40内已混合进填充剂(微小粒子)。
图2示出了本实施方式的半导体集成装置的构造的扩大剖面图。扩大剖面图虽然对图1的矩形区域A进行了扩大，但是为了使说明简化，夸张地示出了绝缘树脂40。
绝缘树脂40可以以有机类或无机类的树脂层材料42为主材料构成。在树脂层材料42内，已混合进本身为二氧化硅(SiO2)或氧化镁(MgO)等的微粒的填充剂44。填充剂44，并不限于这些材料，只要是使绝缘树脂40的作为整体的热膨胀率接近于含于半导体芯片内的半导体衬底22的热膨胀率的材料即可。
这时，要作成为使得粘接部位的绝缘树脂40的膜厚T，对于已混合进绝缘树脂40内的填充剂44的最大粒径Dmax满足公式(1)的条件。
[公式1]
T＞Dmax            (1)
公式(1)的条件，理想的是在使用绝缘树脂40的整个区域中都得到满足，但是，更为理想的是在图1所示的已形成了半导体集成电路24的有效元件区域B中填充剂44的最大粒径Dmax和绝缘树脂40的膜厚T满足公式(1)的关系。
<半导体集成装置的制造方法>
本发明的实施方式的半导体集成装置，可以根据图3所示的工艺流程制造。
在步骤S30中，与现有技术同样，在半导体衬底22的表面上制作半导体集成电路24。在半导体集成电路24上边成膜氧化膜等的绝缘膜26，通过设置在绝缘膜26上的贯通孔把内部布线28连接起来形成半导体芯片10。
在步骤S32中，用旋转涂敷法向半导体衬底22的表面上涂敷绝缘树脂16，通过该绝缘树脂16粘贴第1支持基体12，使绝缘树脂16热硬化。其次，沿着切片线从半导体芯片10的背面一侧研磨半导体衬底22形成接触部分30。半导体衬底22的研磨可借助于机械研磨、化学刻蚀、物理刻蚀中的任何一种或它们的组合进行。
此外，为了减小半导体芯片的背面的凹凸，理想的是在向其次的粘接支持基体14的工序转移之前，预先对要成为粘接面的区域也进行研磨。但是，在进行该机械研磨的情况下，由于会在研磨部位上发生微细的擦伤，归因于该擦伤产生的凹凸在此后的粘接支持基体14时就难于调整绝缘树脂40的厚度，或使半导体集成电路24劣化，故理想的是用机械研磨以外的方法进行刻蚀。例如，理想的是进行使用氟氢酸与硝酸的混合溶液的湿法刻蚀或使用六氟化硫(SF6)的干法刻蚀进行。
具体地说，可以用250mTorr左右的压力供给六氟化硫(SF6)和氧气(O2)，给半导体芯片10加上频率40MHz和功率2200W的高频(RF)功率进行刻蚀。在这里，为了高速且均一地进行刻蚀也可以同时加上旋转磁场。在该条件下，在半导体衬底22是硅衬底的情况下，可以得到大约50微米/分的刻蚀速度。
其结果是，可以抑制由刻蚀引起的凹凸的发生，在不需要再对绝缘树脂40设置多余的厚度的同时，还可以容易地调整绝缘树脂40的膜厚。
在步骤S34中，如图4所示，向半导体衬底22的背面上涂敷绝缘树脂40，粘贴第2支持基体14。
在该步骤S34的工序中，如图5所示，边用上部固定夹具50和对于上部固定夹具50平行地接地的下部固定夹具52平行地维持第1支持基体12和第2支持基体14，边使第2支持基体14推压接触到半导体衬底22上并继续推压。这时，采用用膜厚调整夹具54调整上部固定夹具50和下部固定夹具52之间的间隙的办法，把绝缘树脂40规范为规定的膜厚后再进行粘接。特别是在后工序中由于要实施目的为使绝缘树脂40硬化的热处理，故理想的是考虑绝缘树脂40的膜厚会因该热处理而减少的情况，把绝缘树脂40的膜厚T’规范为满足公式(2)。
[公式2]
T’≥T+α        (2)
T：热处理后需要的绝缘树脂的膜厚＞Dmax
α：因热处理而收缩的绝缘树脂的膜厚
就是说，要使绝缘树脂40的膜厚T’作成为大于把比含于绝缘树脂40内的填充剂44的最大粒径Dmax还大的膜厚T与因热处理而收缩的绝缘树脂40的膜厚α加在一起的膜厚。
说得更为具体一点，如图6所示，采用从下部固定夹具52一侧通过第2支持基体14使光入射，测定从第2支持基体14与绝缘树脂40之间的界面和绝缘树脂40与半导体芯片10之间的界面反射过来的反射光的相干的办法，在可以测定绝缘树脂40的膜厚的同时，还可以调整膜厚调整夹具54的长度来规范绝缘树脂40的膜厚。图7示出了测定所测定的反射光的相干的结果的一个例子。可根据相干峰值的间隔等的反射光谱的波长依赖性测定绝缘树脂40的膜厚。
绝缘树脂40的膜厚，由于必须以微米的精度进行调整，故理想的是把由压电材料构成的压电元件用做膜厚调整夹具54，进行由绝缘树脂40的膜厚测定结果进行的反馈控制来调整膜厚调整夹具54的长度。
此外，在把玻璃板等用做第1和第2支持基体12、14的情况下，由于会因自重而发生挠曲故支持基体12、14与半导体芯片10之间的距离，在中央部分和周边部分处不同。为了防止这样的挠曲，使上部固定夹具50或下部固定夹具52具有吸附第1支持基体12或第2支持基体14的构造是理想的。例如，理想的是在上部固定夹具50或下部固定夹具52上预先设置上真空吸附用的孔，在进行真空吸附以平行地维持第1和第2支持基体12、14的同时粘贴到半导体芯片10上。
在步骤S36中，借助于进行热硬化使绝缘树脂16和绝缘树脂40硬化，使第1支持基体12和第2支持基体14和半导体芯片10完全粘接。这时，若安装上部固定夹具50、下部固定夹具52和膜厚调整夹具54或进行热处理，有时候就会伴随着绝缘树脂16和绝缘树脂40的收缩而给半导体芯片10或第1和第2支持基体12、14加上应力，引起第1或第2支持基体12、14的破损或在半导体芯片10上形成的半导体集成电路24的破坏。于是，理想的是在拿掉上部固定夹具50、下部固定夹具52和膜厚调整夹具54后再进行热处理。
在步骤S34中，采用把绝缘树脂40的膜厚T’调整为比填充剂44的最大粒径Dmax还大的膜厚T与因热处理而收缩的绝缘树脂40的膜厚α的合计膜厚还大的办法，即便是在绝缘树脂40因热处理后而仅仅收缩膜厚α的情况下，也可以把绝缘树脂40的最终膜厚T保持为比填充剂44的最大粒径Dmax还大。
在热处理后，在第2支持基体14的外部表面上设置缓冲构件32，转移到其次的步骤。
在步骤S38中，采用用切片刀具沿着切片线从第2支持基体14一侧进行切削的办法，形成内部布线28的端部36已在内侧面上露出来的倒V形的沟34。在步骤S40中，采用在第2支持基体14的外部表面及沟34的内面上成膜金属膜，用光刻技术使该金属膜图形化的办法形成外部布线20。最后，在步骤S42中，形成保护膜38和球状端子18，用切片刀具沿着切片线进行分断的办法就可以形成半导体集成装置。
如果采用用以上的办法形成的本实施方式的半导体集成装置，则即便是在已向粘接半导体芯片和支持基体的绝缘树脂内混合进填充剂的情况下，也可以防止使半导体集成装置特性劣化或半导体集成装置完全破坏的问题。同时，还可以减小半导体集成装置的热应力。
这些效果，被推测为是由于采用把绝缘树脂的膜厚形成得比含于绝缘树脂内的填充剂的最大粒径还大的办法，使得1个填充剂不会同时接触支持基体和半导体芯片，借助于来自支持基体的加压消除了因把填充剂推压到填充剂与半导体芯片之间的接触点上而产生的应力集中而得到的。
(实施方式2)
以下，参看附图，对实施方式2进行说明。
<半导体集成装置的构造>
图10是示出了实施方式2的半导体集成装置的构造的剖面图。本实施方式的半导体集成装置虽然与实施方式1的应用芯片尺寸封装的半导体集成装置具有同样的构造，但是，其特征在于绝缘树脂40被分成为绝缘树脂层40-1和40-2这么2层。
第2支持基体14，用绝缘树脂40-1和40-2与半导体芯片进行粘接。在绝缘树脂40-1内为了减小含于半导体芯片内的半导体衬底22之间的热膨胀率之差，已混合进填充剂。另一方面，在绝缘树脂40-2内则未混合进填充剂。
图11示出了本实施方式的半导体集成装置的构造的扩大剖面图。扩大剖面图虽然对图10的矩形区域C进行了扩大，但是为了简化说明夸张地示出了绝缘树脂40-1。
绝缘树脂膜40-1，与实施方式1同样，可以以有机类或无机类的树脂层材料42为主材料构成。含于绝缘树脂膜40-1内的填充剂44，理想的是也定为二氧化硅(SiO2)或氧化镁(MgO)等的粒子。就是说，填充剂44只要是使绝缘树脂膜40-1的作为整体的热膨胀率接近于含于半导体芯片内的半导体衬底22的热膨胀率的材料即可。
这时，要作成为使得粘接部位的绝缘树脂膜40-1的膜厚T和已混合进绝缘树脂膜40-1内的填充剂44的最大粒径Dmax满足上述公式(1)的条件。公式(1)的条件，理想的是在使用绝缘树脂膜40-1的真个区域中都得到满足，但是，特别是只要在图10所示的已形成了半导体集成电路24的有效元件区域B中满足公式(1)的关系即可。
<半导体集成装置的制造方法>
本发明的实施方式的半导体集成装置，可以根据图12所示的工艺流程制造。在图12中，对于那些与要进行与上述实施方式1同样的处理的工序都赋予了同一标号。
在步骤S30中，在半导体衬底22的表面上制作半导体集成电路24。在半导体集成电路24上边成膜氧化膜等的绝缘膜26，通过设置在绝缘膜26上的贯通孔把内部布线28连接起来。借助于此，形成半导体芯片10。
在步骤S32中，向半导体衬底22的表面上涂敷绝缘树脂16，通过该绝缘树脂16粘贴第1支持基体12。采用使绝缘树脂16硬化的办法，把第1支持基体粘接到半导体衬底22的表面上。其次，沿着切片线从半导体芯片10的背面一侧研磨半导体衬底22形成接触部分30。半导体衬底22的研磨可借助于机械研磨、化学刻蚀、物理刻蚀中的任何一种或它们的组合进行。
这时，与实施方式1同样，为了减小半导体芯片的背面的凹凸，理想的是预先对要成为粘接面的区域也进行研磨。此外，在进行该研磨的情况下，为了防止研磨部位的擦伤，理想的是用机械研磨以外的方法进行刻蚀。例如，理想的是进行使用氟氢酸与硝酸的混合溶液的湿法刻蚀或使用六氟化硫(SF6)的干法刻蚀进行。刻蚀可以与实施方式1同样地进行。
在步骤S34-1中，在半导体衬底22的背面上形成绝缘树脂层40-1。采用用旋转涂敷法等涂敷含有填充剂的绝缘树脂，并借助于热处理等使之硬化的办法形成绝缘树脂层40-1。
在这里，考虑绝缘树脂的膜厚会因目的为使之硬化的热处理而减少的情况，如图11所示，理想的是要规范为使绝缘树脂层40-1的膜厚T’满足上述公式(2)。
就是说，理想的是把绝缘树脂层40-1的膜厚T’预先涂敷为大于含于绝缘树脂层40-1内的填充剂44的最大粒径Dmax还大的膜厚T与因热处理而收缩的膜厚α加在一起的膜厚。
例如，在用旋转涂敷法涂敷绝缘树脂层时，就可以采用对树脂黏度、旋转涂敷器的旋转速度和旋转时间进行调整的办法，使得满足上述的公式(2)那样地涂敷绝缘树脂。一直到即便是受到压缩等膜厚也不会变化那种程度为止使这样地涂敷上的绝缘树脂硬化而不进行压缩。借助于此，就可以如上所述使硬化后的绝缘树脂膜40-1的膜厚T和已混合进绝缘树脂膜40-1内的填充剂44的最大粒径Dmax满足上述公式(1)的条件。
在步骤34-2中，在半导体衬底22的背面上形成绝缘树脂层40-2，粘贴第2支持基体14。边用上部固定夹具50和对于上部固定夹具50平行地接地的下部固定夹具52平行地维持第1支持基体12和第2支持基体14，边使第2支持基体14推压接触到半导体衬底22上并继续推压。这时，采用用膜厚调整夹具54调整上部固定夹具50和下部固定夹具52之间的间隙的办法，把绝缘树脂40-1和40-2的合计膜厚规范为使得变成为规定的膜厚。具体地说，与实施方式1同样，采用边进行利用光的相干的膜厚测定边调整膜厚调整夹具54的长度的办法，就可以规范绝缘树脂层40-1和40-2的合计膜厚。
此外，与实施方式1同样，在把玻璃板等用做第1和第2支持基体12、14的情况下，为了防止因自重引起的挠曲，理想的是使之具有把第1支持基体12或第2支持基体14吸附到上部固定夹具50或下部固定夹具52上的构造。借助于此，就可以在平行地维持第1和第2支持基体12、14的同时粘贴到半导体芯片10上，是理想的。
在步骤S36中，采用进行热处理的办法完全地使绝缘树脂16和绝缘树脂40-1以及40-2硬化。借助于此，就可以把第1支持基体12和第2支持基体14与半导体芯片10粘接起来。这时，与实施方式1同样，为了防止由应力产生的半导体集成电路24的破坏，理想的是把上部固定夹具50、下部固定夹具52和膜厚调整夹具54拿掉后再进行热处理。热处理后，在第2支持基体14的外部表面上设置缓冲构件32，向其次的步骤转移。
在步骤S34-1中采用把绝缘树脂层40-1的膜厚T形成得比填充剂44的最大粒径Dmax还大，并预先使之硬化为即便是在步骤S34-2的压缩中膜厚也不会变化的那种程度的办法，就可以肯定把绝缘树脂层40-1和40-2的合计膜厚保持为比填充剂44的最大粒径Dmax还大。
在步骤S38到S42中，采用在用切片刀具形成内部布线28的端部36已在内侧面上露出来的倒V形的沟34，在第2支持基体14的外部表面和沟34的内面上形成已图形化的外部布线20，形成了保护膜38和球状端子18后，用切片刀具沿着切片线进行分断的办法就可以形成半导体集成装置。
倘采用本实施方式，则即便是在已向目的为粘接半导体芯片和支持基体的绝缘树脂内混合进填充剂的情况下，也可以防止使半导体集成装置特性劣化或半导体集成装置完全破坏的问题。同时，还可以减小半导体集成装置的热应力。
这些效果，被推测为是由于采用把绝缘树脂40-1的膜厚T形成得比含于绝缘树脂层40-1内的填充剂44的最大粒径Dmax还大的，就是说把绝缘树脂层40-1和绝缘树脂层40-2的合计膜厚形成得比填充剂44的最大粒径Dmax更厚的办法，使得1个填充剂不会同时接触支持基体和半导体芯片，因而可以防止来自填充剂的应力进行集中的缘故。
另外，在本实施方式中，虽然用2层的绝缘树脂层40-1和40-2构成绝缘树脂40，但是并不限定于此。就是说，只要是满足本实施方式的发明的概念的方式，也可以作成为具有3层以上的绝缘树脂膜的构成。

Claims (9)

1.一种半导体集成装置，具备：已形成有半导体集成电路的半导体芯片，和要叠层到上述半导体芯片的至少一面上的支持基体，其特征在于：
在上述半导体芯片与上述上述支持基体之间填充上已混合进微小粒子的树脂，上述半导体芯片与上述支持基体之间的间隔比上述微小粒子的最大粒径还大。
2.根据权利要求1所述的半导体集成装置，其特征在于：在上述半导体芯片之内至少形成了上述半导体集成电路的元件有效区域中，使上述半导体芯片与上述支持基体之间的间隔形成得比上述微小粒子的最大粒径还大。
3.根据权利要求1或2所述的半导体集成装置，其特征在于：上述树脂含有2层以上的树脂层。
4.根据权利要求3所述的半导体集成装置，其特征在于：上述树脂包括含有上述微小粒子的树脂层和不含有上述微小粒子的树脂层。
5.一种半导体集成装置的制造方法，具备：
向已形成有半导体集成电路的半导体衬底的至少一面上涂敷已混合进微小粒子的树脂，把上述树脂夹在中间地把支持基体叠层到上述半导体衬底上的第1工序，和把上述支持基体推压到上述半导体衬底上的第2工序，其特征在于：
上述第2工序在将上述半导体衬底和上述支持基体之间的间隔保持为比上述微小粒子的最大粒径还大的同时把上述支持基体推压到上述半导体衬底上。
6.根据权利要求5所述的半导体集成装置的制造方法，其特征在于：
在上述第2工序之后，还具有对上述树脂施行热处理以使之热硬化的工序，
上述第2工序，在进行上述热硬化工序时，将上述半导体衬底与上述半导体支持基体之间的间隔保持为比把上述树脂的膜厚要收缩的收缩量和上述微小粒子的最大粒径合计起来的大小还大。
7.根据权利要求5或6所述的半导体集成装置的制造方法，其特征在于：在上述第1工序之前，还具有刻蚀上述半导体衬底的背面以使上述半导体衬底的厚度变薄的工序。
8.一种半导体集成装置的制造方法，具备：
向已形成有半导体集成电路的半导体衬底的至少一面上涂敷已混合进微小粒子的第1树脂层的第1工序，
使在上述第1工序中涂敷上的第1树脂层硬化的第2工序，
向上述第2工序中硬化后的第1树脂层上边涂敷不含有微小粒子的第2树脂层的第3工序，其特征在于：
上述第2工序，进行硬化，以便使硬化后的上述第1树脂层的膜厚保持为比上述微小粒子的最大粒径还大。
9.根据权利要求8所述的半导体集成装置的制造方法，其特征在于：在上述第1工序之前，还具有刻蚀上述半导体衬底的背面以使上述半导体衬底的厚度变薄的工序。
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