CN1532927A - 具有多层互连结构的半导体器件以及制造该器件的方法 - Google Patents
具有多层互连结构的半导体器件以及制造该器件的方法 Download PDFInfo
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- CN1532927A CN1532927A CNA2004100317126A CN200410031712A CN1532927A CN 1532927 A CN1532927 A CN 1532927A CN A2004100317126 A CNA2004100317126 A CN A2004100317126A CN 200410031712 A CN200410031712 A CN 200410031712A CN 1532927 A CN1532927 A CN 1532927A
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- interlayer insulating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/564—Details not otherwise provided for, e.g. protection against moisture
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
Claims (9)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003080099 | 2003-03-24 | ||
JP080099/2003 | 2003-03-24 | ||
JP2003377009A JP4360881B2 (ja) | 2003-03-24 | 2003-11-06 | 多層配線を含む半導体装置およびその製造方法 |
JP377009/2003 | 2003-11-06 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1532927A true CN1532927A (zh) | 2004-09-29 |
CN1329983C CN1329983C (zh) | 2007-08-01 |
Family
ID=32993014
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100317126A Expired - Fee Related CN1329983C (zh) | 2003-03-24 | 2004-03-24 | 具有多层互连结构的半导体器件以及制造该器件的方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7019400B2 (zh) |
JP (1) | JP4360881B2 (zh) |
CN (1) | CN1329983C (zh) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100559578C (zh) * | 2004-09-10 | 2009-11-11 | 株式会社瑞萨科技 | 半导体器件 |
CN101632170B (zh) * | 2007-12-28 | 2011-10-05 | 揖斐电株式会社 | 中介层以及中介层的制造方法 |
US8039963B2 (en) | 2007-08-22 | 2011-10-18 | Renesas Electronics Corporation | Semiconductor device having seal ring structure |
CN102867847A (zh) * | 2011-07-05 | 2013-01-09 | 索尼公司 | 半导体器件、半导体器件制造方法及电子装置 |
CN105870069A (zh) * | 2015-01-22 | 2016-08-17 | 中芯国际集成电路制造(上海)有限公司 | 用于芯片切割过程的保护结构 |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5438899B2 (ja) * | 2005-05-13 | 2014-03-12 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
JP2007027639A (ja) | 2005-07-21 | 2007-02-01 | Nec Electronics Corp | 半導体装置 |
US7224069B2 (en) * | 2005-07-25 | 2007-05-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dummy structures extending from seal ring into active circuit area of integrated circuit chip |
CN100481455C (zh) * | 2005-12-22 | 2009-04-22 | 中芯国际集成电路制造(上海)有限公司 | 具有不全接触通孔栈的密封环结构 |
US20080099884A1 (en) * | 2006-10-31 | 2008-05-01 | Masahio Inohara | Staggered guard ring structure |
US7767578B2 (en) * | 2007-01-11 | 2010-08-03 | United Microelectronics Corp. | Damascene interconnection structure and dual damascene process thereof |
JP2009088269A (ja) | 2007-09-28 | 2009-04-23 | Toshiba Corp | 半導体装置、およびその製造方法 |
JP2009182181A (ja) * | 2008-01-31 | 2009-08-13 | Toshiba Corp | 半導体装置 |
JP5439901B2 (ja) * | 2009-03-31 | 2014-03-12 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
JP5830843B2 (ja) * | 2010-03-24 | 2015-12-09 | 富士通セミコンダクター株式会社 | 半導体ウエハとその製造方法、及び半導体チップ |
JP2010206226A (ja) * | 2010-06-21 | 2010-09-16 | Renesas Electronics Corp | 半導体装置の製造方法 |
CN102646654B (zh) * | 2011-02-22 | 2015-07-01 | 中国科学院微电子研究所 | 一种位于不同平面电路间的垂直电连接结构及其制作方法 |
JP5504311B2 (ja) * | 2012-08-06 | 2014-05-28 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
KR20150106420A (ko) * | 2013-01-11 | 2015-09-21 | 르네사스 일렉트로닉스 가부시키가이샤 | 반도체 장치 |
US9786633B2 (en) | 2014-04-23 | 2017-10-10 | Massachusetts Institute Of Technology | Interconnect structures for fine pitch assembly of semiconductor structures and related techniques |
US9780075B2 (en) | 2014-08-11 | 2017-10-03 | Massachusetts Institute Of Technology | Interconnect structures for assembly of multi-layer semiconductor devices |
WO2016118210A2 (en) | 2014-11-05 | 2016-07-28 | Massachusetts Institute Of Technology | Interconnect structures for assembly of multi-layer semiconductor devices |
US10658424B2 (en) | 2015-07-23 | 2020-05-19 | Massachusetts Institute Of Technology | Superconducting integrated circuit |
US10134972B2 (en) | 2015-07-23 | 2018-11-20 | Massachusetts Institute Of Technology | Qubit and coupler circuit structures and coupling techniques |
WO2017079417A1 (en) | 2015-11-05 | 2017-05-11 | Massachusetts Institute Of Technology | Interconnect structures for assembly of semiconductor structures including superconducting integrated circuits |
US10242968B2 (en) | 2015-11-05 | 2019-03-26 | Massachusetts Institute Of Technology | Interconnect structure and semiconductor structures for assembly of cryogenic electronic packages |
US10381541B2 (en) | 2016-10-11 | 2019-08-13 | Massachusetts Institute Of Technology | Cryogenic electronic packages and methods for fabricating cryogenic electronic packages |
JP2022069301A (ja) * | 2020-10-23 | 2022-05-11 | ラピスセミコンダクタ株式会社 | 半導体装置および半導体ウェハ |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6365958B1 (en) * | 1998-02-06 | 2002-04-02 | Texas Instruments Incorporated | Sacrificial structures for arresting insulator cracks in semiconductor devices |
JP4424768B2 (ja) | 1998-11-10 | 2010-03-03 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
US6040243A (en) * | 1999-09-20 | 2000-03-21 | Chartered Semiconductor Manufacturing Ltd. | Method to form copper damascene interconnects using a reverse barrier metal scheme to eliminate copper diffusion |
JP4118029B2 (ja) * | 2001-03-09 | 2008-07-16 | 富士通株式会社 | 半導体集積回路装置とその製造方法 |
US6734090B2 (en) * | 2002-02-20 | 2004-05-11 | International Business Machines Corporation | Method of making an edge seal for a semiconductor device |
JP4250006B2 (ja) * | 2002-06-06 | 2009-04-08 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
JP4303547B2 (ja) * | 2003-01-30 | 2009-07-29 | Necエレクトロニクス株式会社 | 半導体装置 |
-
2003
- 2003-11-06 JP JP2003377009A patent/JP4360881B2/ja not_active Expired - Fee Related
-
2004
- 2004-03-22 US US10/805,403 patent/US7019400B2/en not_active Expired - Fee Related
- 2004-03-24 CN CNB2004100317126A patent/CN1329983C/zh not_active Expired - Fee Related
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100559578C (zh) * | 2004-09-10 | 2009-11-11 | 株式会社瑞萨科技 | 半导体器件 |
US8039963B2 (en) | 2007-08-22 | 2011-10-18 | Renesas Electronics Corporation | Semiconductor device having seal ring structure |
CN101373742B (zh) * | 2007-08-22 | 2011-12-14 | 瑞萨电子株式会社 | 具有密封环结构的半导体器件及其形成方法 |
US8617914B2 (en) | 2007-08-22 | 2013-12-31 | Renesas Electronics Corporation | Method of forming semiconductor device having seal ring structure |
CN101632170B (zh) * | 2007-12-28 | 2011-10-05 | 揖斐电株式会社 | 中介层以及中介层的制造方法 |
CN102867847A (zh) * | 2011-07-05 | 2013-01-09 | 索尼公司 | 半导体器件、半导体器件制造方法及电子装置 |
US9443802B2 (en) | 2011-07-05 | 2016-09-13 | Sony Corporation | Semiconductor device, fabrication method for a semiconductor device and electronic apparatus |
US11569123B2 (en) | 2011-07-05 | 2023-01-31 | Sony Corporation | Semiconductor device, fabrication method for a semiconductor device and electronic apparatus |
CN105870069A (zh) * | 2015-01-22 | 2016-08-17 | 中芯国际集成电路制造(上海)有限公司 | 用于芯片切割过程的保护结构 |
CN105870069B (zh) * | 2015-01-22 | 2018-07-24 | 中芯国际集成电路制造(上海)有限公司 | 用于芯片切割过程的保护结构 |
Also Published As
Publication number | Publication date |
---|---|
JP2004311930A (ja) | 2004-11-04 |
US20040188845A1 (en) | 2004-09-30 |
JP4360881B2 (ja) | 2009-11-11 |
US7019400B2 (en) | 2006-03-28 |
CN1329983C (zh) | 2007-08-01 |
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