CN1685507A - 带有适合射频应用的导体结构的元件的制造方法 - Google Patents

带有适合射频应用的导体结构的元件的制造方法 Download PDF

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CN1685507A
CN1685507A CNA038117983A CN03811798A CN1685507A CN 1685507 A CN1685507 A CN 1685507A CN A038117983 A CNA038117983 A CN A038117983A CN 03811798 A CN03811798 A CN 03811798A CN 1685507 A CN1685507 A CN 1685507A
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Prior art keywords
glassy layer
conductor structure
substrate
layer
conductor
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CNA038117983A
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CN1685507B (zh
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于尔根·莱布
迪特里希·蒙德
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Schott AG
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Schott Glaswerke AG
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Priority claimed from DE10222609A external-priority patent/DE10222609B4/de
Priority claimed from PCT/EP2003/003907 external-priority patent/WO2003088347A2/de
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Publication of CN1685507A publication Critical patent/CN1685507A/zh
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Abstract

本发明涉及一种用于制造基片(1)的方法，所述基片包括适合于射频应用的导体配置(4，41，42)，所述基片具有改善的射频特性。该制造方法包括如下步骤：将在触点连接区(71－74)上方具有至少一个开口(8)的结构化玻璃层(9，91，92，93，13)沉积到基片(1)上；以及将至少一个导体结构(100，111，112，113)敷设到玻璃层(9，91－93)上，所述导体结构与触点连接区(71－74)电接触。

Description

带有适合射频应用的 导体结构的元件的制造方法
本发明涉及射频电路领域，尤其是涉及一种基片上的适合射频应用的导体结构的制造方法，以及涉及一种带有适用于射频结构的导体结构的元件。
已知半导体工业趋向于更高的数据传输速率。千兆赫范围内的频率会导致在馈电和发射系统中增加信号的衰减。目前，这类系统中主要采用了印刷陶瓷(HTCC)和玻璃陶瓷(LTCC)多层，在这些层上印制了导电层之后进行层压、烧结，从而实现了射频电路的三维或多层布线。此外，还应用了非密封的有机多层。
但是，在高频之下，由于在接线中产生的衰减，这种布线系统中的传输损耗会增加。高衰减的一个原因在于通常采用厚膜技术，特别是通过丝网印刷来进行接线。采用这种技术生产的接线使接线轮廓非常不均匀。接线轮廓的不均匀起到了天线的作用，使通过天线辐射产生较大的损耗。
而且，所应用的HTCC和LTCC材料的射频性能有限，尤其是其DK和tanδ值。因此应用了HTCC或LTCC层的射频线路目前只能应用到40GHz的频率。HTCC和LTCC陶瓷不可避免地包含有颗粒，这对于射频性能会产生不利的影响，并会导致集成在其中的接线具有与颗粒相对应的表面轮廓，从而同样会导致线路损耗。
此外，烧结不可避免地会导致基片的收缩，从而难以精确地保持希望的尺寸。
近来，逐渐以各种PVD工艺来取代具有缺点的厚膜技术，通过蒸镀或者溅镀形成接线。但是，在前述工艺中通过烧结HTCC和LTCC材料来产生布线层结构的技术仍然存在一个主要的问题。例如，LTCC陶瓷材料的烧结所需的温度至少为900℃，而HTCC陶瓷材料的烧结甚至要在1500℃的温度下进行。这样的温度会使接线的结构发生改变，并且接线材料的选择也是有限的。
因此，本发明基于以上目的提出了一种改进的接线系统，尤其是改进了射频性能。该目的可通过权利要求1中的制造方法和权利要求24中的元件简单地实现。优选的结构和改进构成了本发明的从属权利要求的主题。
相应地，本发明提出了一种制造带有适用于射频的导体结构的元件的方法，其中将具有至少一个位于触点连接区上方的开口的结构化的玻璃层通过蒸镀沉积到基片上，至少一个导体结构敷设到玻璃层上，该导体结构与触点连接区形成电接触。
因此，根据本发明的方法可用于制造带有适用于射频的导体结构的元件，包括：
-具有至少一个触点连接区的基片，；
-在基片的至少一侧上通过由玻璃蒸镀所沉积的玻璃层，所述玻璃层具有至少一个带有贯穿连接的开口，通过所述贯穿连接与触点连接区实现电接触；以及
-位于玻璃层之上的至少一个尤其适用于射频的导体结构，与贯穿连接进行电接触。
在本文中，适用于射频的导体结构尤其可以理解为可导通和传输超过1GHz频率的信号的导体结构。
在本文中，术语“元件”应当理解为并非只包括电子元器件。在本发明中，“元件”也包括带有射频导体结构或者射频导体系统的涂层基片，其接着可以作为载体单元和用于连接其他元件的单元。具有载体材料和射频导体系统的类似元件通常称为射频基片。
玻璃层最好可以通过利用如德国实用新型202 05 830.1中描述的装置进行沉积，特别是通过电子束蒸镀方法来沉积。该实用新型20205 830.1的公开内容整体包括在本申请的主题中作为参考。
根据本发明的一个改进，玻璃层可以通过等离子体辅助沉积(PIAD)的方式用蒸镀来敷设。此时，在蒸镀过程中，离子束直接射到要涂覆的表面上。这可以进一步使玻璃层致密，减少其缺陷密度。
当制造根据本发明的具有导体结构的元件时，其中所述导体结构通过蒸镀玻璃而形成的绝缘层与基片隔离，从而与之前的LTCC或HTCC元件的制造相比，可以无需在高温下进行烘烤。这样例如可以使用那些至今未使用的材料，如铝这样的无法在烘烤所需要的高温下仍然保持稳定的材料。
对于导体结构，例如接线，也可以使一个或者多个无源电子元件设置在玻璃层上，与该导体结构接触或连接。例如，可以使电容、电阻、线圈、变阻器、PTC、NTC如无源电子元件一样设置到玻璃层上，或者使滤波器元件设置到玻璃层上。
根据本发明的特别有利的实施例提供了在基片上制造三维或多层导电系统的方法。为此，沉积结构化玻璃层的步骤和敷设至少一个导体结构的步骤多次进行。为了产生三维导电系统，特别是具有形成在多层导电系统的一个或多个单个层上的无源元件，每个玻璃层和/或导体结构可以通过不同的方法来结构化。在这种情况下，有利的是在后面的阶段敷设的导体结构可以连接到前面的阶段敷设的导体结构的触点连接区，从而使得在导体结构的两层之间产生电气连接，并且各个层之间可以彼此连接起来。因此，可以形成具有至少通过两个蒸镀敷设的玻璃层的多层导体结构的元件，其中每一玻璃层都具有敷设到其上的导体结构，在第一个玻璃层上的导体结构与第二个玻璃层上的导体结构通过贯穿连接进行电接触。
但是，也可以有两个或者更多的贯穿连接，这些贯穿连接一个设置在另一个的正上方或者略有偏离，与相互重叠的各个玻璃层相接触，这样，例如基片的触点连接区穿过多个玻璃层与外界贯通相连，或者连接到其他层的导体结构上。
此外，该方法的一个有利实施例提出了通过蒸镀来沉积结构化的玻璃层的步骤，其中所述玻璃层在触点连接区上方具有至少一个开口，包括如下步骤：
-敷设结构化的中间层，其结构覆盖了触点连接区；
-通过蒸镀将玻璃层敷设到基片和位于其上的结构化中间层上，玻璃层的厚度最好小于结构化中间层的厚度，并且
-去除结构化的中间层，使得玻璃层位于结构化中间层上的那些区域也一起去除。
结构化中间层例如也可以通过对适当的光阻进行光刻的结构化方法来形成。这样，可以通过蒸镀敷设玻璃层，然后将其去除，以实现对玻璃层的非常精确的结构化，使由中间层所覆盖的区域具有很好限定的、平滑的边缘。但是，除了通过对光阻进行光刻的结构化方法之外，也可以例如通过印刷直接制造这类中间层，。
根据该制造方法的另外一种变型，在蒸镀过程中利用位于基片和靶材之间的掩模，可以掩蔽该基片，例如牢牢固定在基片上的掩膜。
此外，该方法的另外一种变型提出了一种导电材料，其凸出到与触点连接区相附的区域中，由中间层的结构所覆盖，在通过蒸镀敷设玻璃层之前该中间层结构将要被敷设到至少一个触点连接区上。这在触点连接区产生了导电的、抬高的结构。该步骤例如可以通过光刻结构化的中间层和一个导电材料层一起实现，在这种情况下，导电材料层从围绕着触点连接区的区域和中间层一起被去除。然后玻璃层可以有利地通过蒸镀来敷设，使其厚度与所敷设的导电材料的厚度基本一致，从而使得当触点连接区上方的玻璃层已经去除之后，出现一个基本上平坦的表面。
根据本发明的另一变型，首先，例如上面所解释的，玻璃层具有至少一个直接沉积在触点连接区上方的开口或者具有优点地横向偏移的开口，然后玻璃层中的至少一个开口由导电材料来填充。这样也产生了用于一个或者多个导体结构的后续敷设的平坦的表面。
此外，导体结构的敷设最好包括敷设负结构化(negativelystructured)的中间层的步骤，以及接着在已经涂有中间层的基片上沉积导电材料的步骤。基片此时包括基片和/或已经敷设了一个或多个玻璃层和敷设到其上的导体结构的基片。该中间层也可以通过光刻进行结构化或者通过结构化印刷来形成。
导体结构部分地可以有利地通过电镀、溅镀或蒸镀导电材料的方法来敷设，并与绝缘玻璃层覆盖的基片表面的触点连接区相连接。
基片自身可能已经具有导体结构，例如以接线的形式。这些导体结构有利地在沉积结构化玻璃层之前直接敷设在基片上。特别地，直接敷设在基片上的接线上也可以提供触点连接区，该触点连接区然后与之后敷设到绝缘玻璃层的导体结构相接触。通过这种方法，在沉积玻璃层的步骤之后，接着将至少一个导体结构敷设到玻璃层上，可以产生适用于射频的多层接线系统或者适用于射频的多层导体结构。当然，在本文中，也可以产生三维接线系统的其他层，特别是具有集成到其中的无源元件，可通过重复执行沉积玻璃层和敷设导体结构的步骤来形成。
根据该制造方法的一个改进，当产生导体结构时，也可以产生在其上设置了不同导体和/或半导体材料的结构。此时这些材料也可以与绝缘结构结合使用。这种类型的结合可以使在绝缘中间层的一个或多个层上形成有源或无源的元件。
如果在基片上已经形成了单层或者多层的导体结构，另外还可以通过蒸镀再沉积另外一玻璃层，以覆盖先前所敷设的层。为了在基片上形成导体结构的接点连接，最好是可以产生至少一个穿过玻璃层的贯穿连接。该玻璃层可以与其下方的导体结构的玻璃层以相同方式制造。该另外的一个玻璃层可以作为使导体结构与外界相隔离的绝缘层。此外，通过蒸镀方法沉积的玻璃层也可特别用于元件的密封封装。
此外，也可以向外玻璃层中的贯穿连接设置焊珠，最好是在多层贯穿连接上设置焊珠结构，以可以在后面将元件例如安装到SMT电路板上并进行连接。
此外，本发明的第一个实施例提供了一种基片，它包括具有有源半导体区的半导体基片，例如以集成半导体电路的形式。在这种情况下，当应用这种基片时，至少一个导体结构可以连接到有源半导体区上的连接位置。
目前，例如在LTCC模块中，将各个半导体组成模块以单片形式集成到陶瓷的空腔中，从而使陶瓷形成了半导体组成模块的载体。与之相反，本发明采用了完全相反的途径，使导体结构直接设置到芯片上，从而使芯片作为导体结构的载体。
根据该实施例的一个改进，有源半导体区设置在基片的第一个侧面上，通过蒸镀将具有至少一个位于触点连接区上方的开口的结构化玻璃层沉积到基片上，导体结构敷设到玻璃层上的过程是在基片的第一个侧面上完成。因此在这种情况下，具有至少一个包括通过蒸镀敷设的玻璃的绝缘中间层的所敷设的导体结构覆盖了半导体组成模块的有源一侧。这尤其可以缩短线路从而减少了辐射损耗。
本发明的另一个改进提供了玻璃层和设置到第二个侧面上的导体结构，该第二个侧面对着具有至少一个有源半导体区的第一个侧面。为了将有源半导体区连接到带有导体结构的导体系统，还穿过基片引入了一个贯穿连接，它连接到设置在用于有源半导体区的第一个侧面上的连接位置。当敷设导体结构时，贯穿连接位于第二个侧面上的部分连接到导体结构。如果这类的多个芯片叠置，该实施例是有利的，此时该叠层结构需要将触点从有源半导体区转移到相对一侧上。
当然，也可以不仅在基片的一侧上提供导体结构。根据本发明的另外一个具有优点的改进，实际上元件在相对的两侧均具有导体结构。在这种情况下，如其他实施例中所示，该导体结构包括通过蒸镀玻璃所敷设的玻璃层，玻璃层具有至少一个带有贯穿连接的开口，所述贯穿连接与位于玻璃层下方的触点连接区进行电接触，并且玻璃层上的至少一个导体结构与贯穿连接相接触。
此外，已经证明有利的是在通过蒸镀敷设玻璃层时，基片在50℃至200℃之间，最好是在80℃至120℃之间保持。基片的加热避免了机械应力的形成。适度的加热还对于玻璃层的形态尤其有利；在这些基片处理温度下，可以产生特殊的无孔玻璃层。
蒸镀室的基本压力最高保持在10-4mbar的区域内，最好在是10-5mbar或者更低的范围内，此时对于形成所需层的质量是有利的。
为了在基片上形成低孔隙密度的连续玻璃层，有利的是要涂覆的基片的表面粗糙度低于50μm。
根据本发明的方法的另一个有利改进还提出了以每分钟至少0.5μm层厚度的沉积速率通过蒸镀来敷设玻璃层。这种高沉积速率可以很容易地实现，不会损害玻璃层的层质量，并且可以使制造时间缩短。其他真空沉积方法，例如溅镀，相比之下只能实现每分钟几个纳米的沉积速率。根据特定的应用，蒸镀玻璃层的层厚度可以在0.05μm至1.5mm之间，最好在0.1μm至0.1mm的范围内。
特别适合蒸镀的玻璃尤其是包括一种至少为二元系统材料的玻璃。通过蒸镀这类玻璃而沉积的玻璃层由于无缺陷，因而具有特别好的密封和射频性能。
为了使该方法效率更高并且加快制造过程，根据本发明的另外一个具有优点的优选改进，可以在基片仍然与晶片相连时对基片进行涂覆。然后可以通过切割基片得到各个元件。
适合的基片材料包括硅、陶瓷、玻璃甚至是塑料等。也可以用复合材料，例如玻璃-塑料层，特别是也带有集成导体结构的玻璃-塑料层。除了硅之外，也可以用其他的半导体材料，例如砷化镓。硅、玻璃和陶瓷由于它们的热膨胀系数与通过蒸镀敷设的玻璃的热膨胀系数非常相似，因而是特别适合的基片材料。
由本申请人同一天提交的题为“Glass material forradio-frequency applications(用于射频应用的玻璃材料)”的国际专利申请中，描述了一种特别可应用于此处所述的制造方法和元件中的玻璃材料。该申请“Glass material for radio-frequency applications”中公开的有关玻璃材料的内容全部结合在本申请中以供参考。
以下将根据实施例参照附图详细说明本发明，其中同一附图标记表示相同或类似的部件，各实施例的特点可相互组合。
图中示出了：
图1示出了根据本发明的第一实施例的截面示意图；
图2示出了根据本发明的另一实施例的截面示意图，在基片的相对两侧具有两个导体结构；
图3A-3G示出了根据本发明所述方法的一个实施例所涉及的步骤的截面示意图；
图4A-4E示出了根据图3B-3E中示出的本发明所述方法的步骤的变型；
图5-7示出了根据本发明的元件的实施例，当仍然与晶片相连时为该元件提供了导体结构；
图8示出了RF测量结构的层结构的示意图；
图9示出了开放的共面波导CPW1/2的层结构；
图10示出了埋入的共面波导CPW3的层结构；
图11示出了测量样本的一系列属性，测量值如图12至23所示；
图12-14示出了样本G1ACPW2-2(玻璃8329)的散射参数的大小及其相位；
图15-17示出了样本G1ACPW3-2(玻璃8329)的散射参数的大小及其相位；
图18-20示出了样本G2ACWP2-6(玻璃G018-189)的散射参数的大小及其相位；
图21-23示出了样本G2ACPW3-2(玻璃G018-189)的散射参数的大小及其相位；
图1示出了根据本发明的元件的第一实施例简要截面示意图；该元件通篇用附图标记10来表示，具有基片1，该基片1包括第一个侧面3和与该第一个侧面相对的一侧5，以及设置在该基片的第一个侧面3上的导体结构，该导体结构通篇用附图标记4来表示。层6包括设置在基片上的导体结构61-64。导体结构61-64例如可以是接线。此外，导体结构61-64中一些也可以形成为无源电子元件。触点连接区71-74限定在基片1的第一个侧面3的导体结构61-64上。当设置了层6的导体结构61-64后，绝缘玻璃层9通过蒸镀以结构化的形式沉积到基片的第一个侧面3上，使得该玻璃层在触点连接区71-74上方具有开口8。开口8用导电材料19来填充，使得开口和导电填充物一起形成了穿过绝缘层9的贯穿连接。带有其他导体结构111，112，113的层11敷设到玻璃层9上。导体结构111，112，113分别与至少一个贯穿连接相接触，使得导体结构111，112，113与层6的导体结构61-64电气连接。因此，基片具有多层导体结构，单个层6和11相互由绝缘玻璃层9隔开，具有很好射频特性。
具有下述重量百分比含量成分的玻璃已经证明适合作为蒸镀玻璃用于根据本发明的元件10中；
组分   玻璃含量1   玻璃含量2
 SiO2     75-85     65-75
 B2O3     10-15     20-30
 Na2O     1-5     0.1-1
 Li2O     0.1-1     0.1-1
 K2O     0.1-1     0.5-5
 Al2O3     1-5     0.5-5
从这些组中选择的优选蒸镀玻璃是由Schott生产的具有下述重量百分比含量的玻璃。
组分   玻璃含量1     玻璃含量2
SiO2     84.1％     71％
B2O3     11.0％     26％
Na2O     ≈2.0％     0.5％
Li2O     ≈0.3％     0.5％
K2O     ≈0.3％     1.0％
Al2O3     0.5％     1.0％
优选应用的玻璃尤其具有下表中列出的特性。
  性能     玻璃1     玻璃2
  α20-300[10-6K-1]     2.75     3.2
  密度(g/cm3)     2.201     2.12
  转变温度[℃]     562℃     466℃
  折射率     np＝1.469     1.465
  根据ISO719的防水等级     1     2
  根据DIN 12 116的防酸等级     1     2
  根据DIN 52322的防碱等级     2     3
  介电常数ε     4.7(1MHz)     3.9(40GHz)
  Tanδ(25℃)     45*10-4(1MHz)     26*10-4(40GHz)
在下文中，玻璃1指玻璃8329，玻璃2指G018-189。
一个另外的、最终的蒸镀玻璃层13作为导体结构111，112，113的外部绝缘，沉积到带有导体结构111，112，113的层11上。此外，为了使这些导体结构之间可以实现触点连接，还在最终蒸镀玻璃层13中设置了与导体结构111，112，113相接触的贯穿连接15。此外，焊珠17敷设到贯穿连接15上，以使元件10例如固定到SMT电路板上并进行连接。
图2示出了根据本发明的元件10的另一实施例的截面图。该实施例包括在两个相对侧3和5中的每个侧面上分别设置的射频导体配置41、42。导体配置41，42的结构与图1中所示的实施例的导体配置4相似。
具体而言，导体配置41、42也分别包括一个通过蒸镀玻璃敷设的玻璃层9，具有可向其中填充导电材料的开口，用于形成贯穿连接，从而实现与开口下方的触点连接区的电气连接。带有分别与贯穿连接相接触的导体结构的层6总是设置在导体配置41和42的玻璃层9上。在图1所示的实施例中，玻璃层9上的导体结构由另外的最终蒸镀玻璃层13覆盖，该玻璃层中有用于连接元件的多个贯穿连接15。
图3A至3G示出了与本发明制造方法的一个实施例一致的根据本发明的元件制造步骤的横截面视图。
图3示出了第一处理步骤后的基片1，其中包括导体结构61-64，如特别适合的互连接线的层6在要敷设射频导体结构的一侧上形成。这些导体结构例如可以是基片的电子元件的接触位置(在图3A中未示出)或者可以与这样的接触位置相连接。
接着，在另外的处理步骤中，沉积玻璃层，该玻璃层在下方表面的触点连接区71-74上方具有开口。为此，首先如图3B所示，在另外一个步骤中，敷设具有覆盖了相应触点连接区71-74的结构21的结构化中间层，最好通过光刻结构化适当的光阻涂层来实现。但是，可选地也可以使用另一工艺，例如对表面进行印刷以产生结构21。
接着，如图3C所示，通过蒸镀来敷设玻璃层9，该玻璃层覆盖了由中间层的结构21所覆盖的导电连接区71-74，以及载体表面的周围区域。此处，玻璃层9的厚度最好小于结构化中间层的厚度。接着去除中间层，覆盖中间层的结构21或者位于结构化中间层上的玻璃层9的区域90也一起去除。
图3D示出了该步骤之后的基片，基片现在具有玻璃层9，该玻璃层具有在下表面的触点连接区71-74上方的开口8。开口8如图3E所示，例如可以填充导电材料19。接着，层11包括导体结构111，112，113，并且有源元件23可以敷设到玻璃层9上，如图3F所示。元件23例如可包括电容、电阻、线圈、变阻器、PTC、NTC或滤波器元件。电容和线圈尤其可以通过相互在顶部设置各个层的导体结构以及使各层隔离的蒸镀玻璃层来实现。例如，可以使用单个层6的导体结构和另外一个位于其上方的单个层11的导体结构来实现这个目的。
导体结构例如可以通过敷设另外一个负结构化的中间层和沉积导电材料、与开口8中的导电材料19相接触的导体结构111，112，113来实现，从而产生与分别相关的触点连接区71-74的电气连接或者电接触。
导体结构也可以具有包括不同导电材料或者半导体材料的结构，例如通过执行使用不同导电材料的多个步骤来敷设导体结构。这也允许将其他功能集成到导体结构中，例如形成半导体-金属触点或者热电触点。
在图3E中所示的用导电材料产生穿过玻璃层9的贯穿连接的过程，以及如图3F中所示的敷设导体结构的过程也可以在单个步骤中执行。例如，导体结构19可以通过电镀来制造，因此，首先沉积的材料从触点连接区71-74开始，填充开口8，然后继续生长至玻璃层9的表面，在那里形成了导体结构，以及如果需要的话，可以形成无源元件23。也可以通过蒸镀或溅镀来形成导体结构111，112，113，在这种情况下，也可以涂覆触点连接区71-74和开口8的边缘，使得相应的导体结构与触点连接区71-74产生电接触。
然后中间层可以被去除，沉积到中间层上的导电材料也被去除，而所希望的导体结构和所敷设的元件，包括玻璃层9的表面，仍保留在原位。
图3B至3F所示的通过蒸镀将在触点连接区上方具有开口的结构化玻璃层沉积在基片上的步骤，以及敷设与相关触点连接区形成电接触的导体结构的步骤可以重复进行，以产生导体结构的其他层，在这种情况下去在后一阶段敷设的导体结构可与前一阶段敷设的导体结构的触点连接区相接触。
为此，还是如图3F至3G所示，具有结构21的中间层被敷设到经过涂层的基片1表面的所希望的触点连接区75，76上，触点连接区特别要位于所敷设的导体结构上或者贯穿连接上。然后，另一带有穿过绝缘玻璃层91中的开口的贯穿连接的绝缘玻璃层91在触点连接区75、76上方产生，产生过程与图3C至3E中所述的处理步骤相似。
图4A至4E示出了图3B至3E中所示的根据本发明的处理步骤的变型。根据本发明的制造方法的这种变型基于导电材料，其相对于邻近各个触点连接区的区域凸出出来，由中间层的结构所覆盖，在通过蒸镀敷设玻璃层之前敷设到触点连接区。该导电材料随后形成了贯穿连接。
具体而言，首先从在图3A中已准备好的基片1开始，形成一个导电层25，接着如图4A所示形成光刻结构化的中间层27。
图4B示出了中间层27的光刻结构化之后的基片。该层以这样的方法来进行结构化：使得覆盖所希望的触点连接区71-74的结构21保留在原处。接着，如图4C所示，导电层25从围绕触点连接区71-74的未被覆盖的区域去除。这可以通过本领域的标准方法例如蚀刻来完成。因此，触点连接区71-74由相对于邻近各触点连接区的区域抬高或凸出的导电材料所覆盖，并且其总是由中间层27的结构21所覆盖。
接着，如图4D所示，通过蒸镀来敷设绝缘玻璃层9，绝缘玻璃层9的厚度最好与抬高的导电材料19的厚度基本一致。最后，例如使用恰当的溶剂去除中间层的结构21。在这个过程中，将覆盖了结构21的玻璃层9的区域90去除。结果是基片具有玻璃层，该玻璃层在各触点连接区上方具有开口，以及在开口中通过导电材料形成的贯穿连接。这个过程状态如图4E中所示。由于恰当地选择玻璃层9的层厚度，使其与导电材料19的厚度相匹配，导电材料19的表面和玻璃层9的表面的高度几乎相同，形成平面。该过程可参照图3F至3G继续说明，其中图3G中的第二玻璃层91和其他玻璃层也可以以形成贯穿连接，以与图4A至图4E中相同或相似的方法进行制造。
根据该制造方法的有利改进，元件10可以当其仍与晶片相连时通过对基片进行涂层来产生。在这方面，图5至7示出了涂层晶片2的各种实施例，该元件可以通过将各个基片1从晶片分离而获得。
图5示出了根据本发明的一个实施例，其中半导体晶片2已具有一系列的玻璃层和中间连接层。为此使用的晶片材料最好是硅，这是因为这种材料的热膨胀系数与蒸镀的玻璃材料能够很好地匹配。当它们仍然与晶片相连时进行涂层，一旦产生了如图5示出的处理状态，各个基片1通过沿这预定的分离轴29分割，以最终获得带有适用射频应用的导体结构的元件10。
在第一个侧面3上，晶片2具有自己的与连接位置35相连的有源半导体区33。
在本发明的这个实施例中，导体配置4设置在晶片2的第二个侧面5上，或者设置在晶片2的基片1中，该第二个侧面位于与具有有源半导体区33的第一个侧面相对的一侧上。
为了清楚起见，导体配置4以简化形式示出，所有导体结构用附图标记100来表示。导体配置4的各个层最好可参照图3A至3G和/或4A至4E中所说明的方法来形成。特别地，在图5中示出的导体配置4也以多层形式形成，为此，沉积结构化玻璃层和敷设导体结构100的步骤要相应地重复多次，在后一阶段敷设的导体结构100与前一阶段敷设的导体结构100的触点连接区相接触。
此外，与连接位置35电气连接的穿过基片1的贯穿连接37被引入到晶片2中。所述贯穿连接最好可以通过在晶片中从第二个侧面5最好到金属连接位置35蚀刻出凹坑来形成，金属连接位置35同时作为蚀刻终点。接着，钝化层39在蚀刻凹坑的壁上产生，用填充材料43来填充蚀刻凹坑。贯穿连接37在侧面3未被覆盖的导电材料43用作导体配置4的导体结构100的触点连接区。
此外，具有贯穿连接的第二个侧面5表面区域用作导体配置4的一些导体结构100的触点连接区。如果这些导体结构100在敷设到先前所沉积的玻璃层9的过程中与触点连接区相接触，导体结构相应地也与基片1的第一个侧面的连接位置35电气连接。以这种方式，有源半导体区33可以通过导体结构来供电，并且可将电信号从有源半导体区传输到导体配置4的导体结构100。
为了封装和保护随后从晶片分离出来的元件，如图5所示的实施例中还提供了蒸镀玻璃的附加封装层14和/或侧面3上的塑料涂层31。
图6示出了根据本发明的另一实施例，其中同样与晶片相连的基片上已经涂覆了导体配置4。本发明的这个实施例与图5中所示的实施例相似。带有与各个基片相关的有源半导体区33的半导体晶片2也可在图6所示的实施例中使用。如图5的实施例中所示，在将导体结构100敷设到导体配置4的第一个玻璃层9上时，有源半导体区33的连接位置35连接到导体结构100。
但是，与图5中的实施例不同，导体配置4的玻璃层9，91，92，93和13通过蒸镀敷设到基片1的第一个侧面3上，在基片1上还设置了有源半导体区33。在导体配置4的底部玻璃层9中的贯穿连接15直接敷设到接触位置35，因此接触位置35形成了用于第一个玻璃层9上的相应导体结构100的基片1的触点连接区。
如图5和图6所示，通过从涂层的晶片3上分离而获得的元件10例如可设计为频率高于10GHz的射频发送/接收模块。
图7示出了基片1的另一实施例，根据本发明，其中当基片1仍与晶片相连接时，基片1已经设置了射频导体配置4。导体配置4包括玻璃层9，91，92，93，13，并且在这种情况下导体结构100已经敷设在晶片上，该晶片的基片1同样具有贯穿连接37。具有基片1和导体配置4的元件10在从晶片分离之后，用作其他元件的射频再布线基片，它可连接到元件10的外部接触位置。为此，外部接触位置例如还提供了焊珠17，这样使用表面安装技术可以安装和连接其他的元件。此时基片1没有任何有源元件。因此，基片晶片2也可以由绝缘材料制成，例如玻璃或者塑料。特别适合作元件10的晶片或基片1的材料的玻璃是Borofloat玻璃，它的热膨胀系数与优选的蒸镀玻璃的热膨胀系数一致。
图8示出了表示射频特性，包括测量的测试结构的层厚度的层排列示意图。图9，10示出了开放和埋入共面波导的结构。可以根据这些结构来实现下面的对散射参数S12，S21，S11，S22的测量。如图12至23所示，所选测量的样本指定可以在图11所示的表中找到。
图12至14示出了散射参数S11，S22，S12和S21的大小，以及开放共面波导的散射参数S12，S21的相位，使用玻璃8329作为铝接线之间的绝缘体。散射参数S12，S21也可以指传输衰减，而散射参数S11，S22也可以指反射衰减。
图12清楚示出了当频率最高为50GHz时，该样本的信号从-20dB到-40dB的极低反射S11，S22。此外，从图13中示出的频率最高为50GHz的测量值可以明显看出，散射参数S12，S21小于-2dB的低衰减值。散射参数S12，S21表示在各个频率处的电信号传输值。散射参数S21的线性相位在频率最高为50GHz时具有非常低的离差。
参照图12至14所示的测量值也可以通过检测其他样本进行验证，其中：
图15至17示出了玻璃8329的埋入共面波导的测量值；
图18至20示出了玻璃8329的开放共面波导的测量值；
图21至23示出了玻璃G018-189的埋入共面波导的测量值。
这些测量值表明在使用射频玻璃G018-189时散射参数S12，S21的衰减降低的趋势。
附图标记列表：
1                      基片
2                      半导体晶片
3                      1的第一个侧面
4，41，42              导体配置
5                      1的第二个侧面
6                      1上带有导体结构的层
61-64                  6的导体结构
71-74                  触点连接区
8                      触点连接区71-74上方的9中的开口
9，91-93               蒸镀玻璃层
10                     元件
11                     带有导体结构的层
100，111，112，113     导体结构
13                     最终蒸镀玻璃层
14                     蒸镀玻璃密封层
15                     贯穿连接
17                     焊珠
19                     导电材料
21                中间层的光阻结构
23                无源电子元件
25                导电层
27                光刻结构化的中间层
29                分离轴线
31                塑料涂层
33                有源半导体区
35                33的连接位置
37                穿过1的贯穿连接
39                钝化层
43                37的导电填料
75，76            触点连接区
90                光阻结构上的蒸镀玻璃层区域

Claims (34)

1、一种用于制造元件(10)的方法，所述元件具有适用于射频应用的导体结构(4，41，42)，包括如下步骤：
-通过蒸镀将结构化的玻璃层(9，91，92，93，13)沉积到基片(1)上，其中所述玻璃层在触点连接区(71-74)上方具有至少一个开口(8)；以及
-将至少一个导体结构(100，111，112，113)敷设到玻璃层(9，91，92，93)上，所述导体结构与触点连接区(71-74)电接触。
2、根据权利要求1所述的方法，其中与至少一个导体结构相接触的至少一个无源电子元件被敷设到所述玻璃层(9，91，92，93)上。
3、根据权利要求2所述的方法，其中在所述玻璃层(9，91，92，93)上的至少一个元件是电容、电阻、线圈、变阻器、PTC、NTC、滤波器元件。
4、根据前述权利要求中任一所述的方法，其中沉积结构化玻璃层和敷设至少一个导体结构(111，112，113)的步骤重复执行多次，后一阶段敷设的导体结构与前一阶段敷设的导体结构的触点连接区相接触。
5、根据前述权利要求中任一所述的方法，其中通过蒸镀在触点连接区(71-74)上方沉积具有至少一个开口(8)的所述结构化玻璃层(9，91，92，93)的步骤包括：
-敷设一个覆盖了触点连接区的结构化中间层(21)；
-通过蒸镀将玻璃层(9，91，92，93，13)敷设到所述基片和位于其上的结构化中间层(21)上，所述玻璃层(9，91，92，93，13)的厚度最好小于所述结构化中间层(21)的厚度；以及
-去除所述结构化中间层(21)，将所述玻璃层(9，91，92，93，13)的位于所述结构化中间层(21)上的区域(90)也一起去除。
6、根据权利要求5所述的方法，其中在通过喷镀敷设所述玻璃层之前，将相对于邻近触点连接区的区域凸出的导电材料(19)敷设到至少一个触点连接区(71-74)，该导电材料(19)由所述结构化中间层(21)所覆盖。
7、根据权利要求5或6所述的方法，其中结构化中间层(21)通过印刷或者光刻进行结构化。
8、根据前述权利要求中任一所述的方法，其中敷设导体结构至少包括敷设负结构化中间层的步骤和沉积导电材料的步骤。
9、根据前述权利要求中任一所述的方法，其中敷设至少一个导体结构包括通过电镀、溅射或蒸镀来敷设导电材料的步骤。
10、根据前述权利要求中任一所述的方法，其中至少一个导体结构，特别是接线，在沉积结构化玻璃层(9，91，92，93，13)的步骤之前敷设到所述基片上。
11、根据前述权利要求中任一所述的方法，其中敷设至少一个导体结构包括敷设具有不同导电材料的结构。
12、根据前述权利要求中任一所述的方法，包括沉积最终玻璃层(13)的步骤，以及在所述最终玻璃层(13)中产生贯穿连接(15)的步骤。
13、根据权利要求12所述的方法，其中将焊珠(17)敷设到所述贯穿连接(15)上。
14、根据前述权利要求中任一所述的方法，其中所述基片(1)包括带有有源半导体区(33)的半导体基片，其中至少一个导体结构(100，111，112，113)在敷设时与有源半导体区(33)的连接位置(35)相连。
15、根据权利要求14所述的方法，其中有源半导体区设置在基片(1)的第一个侧面(3)上，其中通过蒸镀将在触点连接区(71-74)上方具有至少一个开口(8)的结构化玻璃层(9，91，92，93，13)沉积到所述基片(1)上，在所述基片的第一个侧面(3)将至少一个导体结构(111，112，113)敷设到玻璃层(9，91，92，93)上。
16、根据权利要求15所述的方法，其中所述有源半导体区(33)设置在基片与第二个侧面(5)相对的第一个侧面(3)上，在所述第二个侧面上沉积玻璃层(9，91，92，93，13)并且敷设导体结构(100，111，112，113)，包括引入至少一个贯穿连接(37)的步骤，所述贯穿连接穿过基片(1)与所述第一个侧面上的连接位置相连接。
17、根据前述权利要求中任一所述的方法，其中在敷设至少一个导体结构(100，111，112，113)时，该导体结构与穿过基片(1)的贯穿连接(37)相连接。
18、根据前述权利要求中任一所述的方法，其中在通过蒸镀敷设玻璃层(9，91，92，93，13)期间，所述基片(1)保持在50℃至200℃之间的温度下，最好是在80℃至120℃之间。
19、根据前述权利要求中任一所述的方法，其中通过蒸镀敷设玻璃层(9，91，92，93，13)时所用的压力保持在10-4mbar的范围内，最好是10-5mbar或者更低的范围内。
20、根据前述权利要求中任一所述的方法，其中玻璃层(9，91，92，93)
通过蒸镀以每分钟至少0.1μm层厚度的沉积速率来敷设。
21、根据前述权利要求中任一所述的方法，其中所述玻璃层(9，91，92，93，13)中的至少一个开口(8)由导电材料(19)来填充。
22、根据前述权利要求中任一所述的方法，其中当所述基片(1)仍然与晶片相接时对所述基片进行涂层。
23、根据前述权利要求中任一所述的方法，其中通过蒸镀来敷设玻璃层(9，91，92，93，13)是通过等离子体辅助沉积(PIAD)来实现。
24、一种带有适合于射频应用的导体配置(4，41，42)的元件(10)，尤其利用前述权利要求中的任一项所述的方法来制造，所述元件包括：
-基片(1)，具有至少一个触点连接区(71-74)；
-在所述基片(1)的至少一侧(3，5)上，具有通过蒸镀沉积的玻璃所形成的玻璃层(9，91，92，93，13)，所述玻璃层具有至少一个带有贯穿连接的开口(8)，所述贯穿连接与触点连接区(71-74)电接触，以及
-至少一个在所述玻璃层(9，91，92，93，13)上的导体结构(100，111，112，113)，与所述贯穿连接相接触。
25、根据权利要求24所述的元件，包括所述玻璃层(9，91，92，93，13)上的至少一个无源电子元件(23)，它与所述至少一个导体结构(100，111，112，113)相连接。
26、根据权利要求25所述的元件，其中无源电子元件(23)包括下述元件中的至少一个：电容、电阻、线圈、变阻器、PTC、NTC、滤波器元件。
27、根据权利要求24至26中任一所述的元件，包括多层导体配置(4，41，42)，所述多层导体配置包括通过蒸镀敷设的至少两个玻璃层(9，91，92，93)，每个玻璃层具有一个敷设到其上的导体结构(100，111，112，113)，在第一玻璃层上的导体结构通过一个贯穿连接(15)与第二玻璃层上的导体结构电接触。
28、根据权利要求24至27中任一所述的元件，其中所述基片(1)包括下述材料中的至少一种：
-半导体，尤其是硅；
-陶瓷；
-玻璃；
-塑料。
29、根据权利要求24至28中任一所述的元件，其中所述基片(1)包括一个半导体基片，在所述基片的第一个侧面(3)上具有至少一个有源半导体区(33)，其连接到至少一个贯穿连接(15)。
30、根据权利要求29所述的元件，其中结构化玻璃层(9，91，92，93，13)和所述玻璃层(9，91，92，93)上的至少一个导体结构(111，112，113)设置在所述基片(1)的第一个侧面(3)上。
31、根据权利要求30所述的元件，其中结构化玻璃层(9，91，92，93，13)和所述玻璃层上的至少一个导体结构(111，112，113)设置在所述基片(1)的与所述第一个侧面(3)相对的第二个侧面(5)上，所述基片(1)具有连接到所述第一个侧面(3)上的接触位置(35)的至少一个贯穿连接(37)，其穿过玻璃层(9，91，92，93，13)与至少一个贯穿连接相连接。
32、根据权利要求24至31中任一所述的元件，其中所述基片(1)和所述玻璃层(9，91，92，93，13)基本上匹配的热膨胀系数。
33、根据权利要求24至32中任一所述的元件，其中通过蒸镀沉积的玻璃形成的玻璃层(9，91，92，93)的厚度在0.05μm至1.5mm之间的范围内，最好在0.1μm至0.1mm之间的范围内。
34、根据权利要求24至33中任一所述的元件，其中元件(10)在相对的两侧(3，5)上具有导体配置(4，41，42)，包括通过蒸镀沉积的玻璃形成的玻璃层(9，91，92，93)，所述玻璃层包括至少一个带有贯穿连接的开口(8)，所述贯穿连接与所述触点连接区电接触，以及，
-所述玻璃层(9，91，92，93)上的至少一个导体结构(100，111，112，113)，与所述贯穿连接(15)相接触。
CN038117983A 2002-05-23 2003-05-23 带有适合射频应用的导体结构的元件的制造方法 Expired - Lifetime CN1685507B (zh)

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