CN1883041A - 自动对准镶嵌栅极 - Google Patents
自动对准镶嵌栅极 Download PDFInfo
- Publication number
- CN1883041A CN1883041A CNA2004800337151A CN200480033715A CN1883041A CN 1883041 A CN1883041 A CN 1883041A CN A2004800337151 A CNA2004800337151 A CN A2004800337151A CN 200480033715 A CN200480033715 A CN 200480033715A CN 1883041 A CN1883041 A CN 1883041A
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- CN
- China
- Prior art keywords
- fin
- grid
- etching
- effect transistor
- field effect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005669 field effect Effects 0.000 claims abstract description 39
- 238000000034 method Methods 0.000 claims abstract description 33
- 238000005530 etching Methods 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 238000000059 patterning Methods 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims description 38
- 239000000428 dust Substances 0.000 claims description 15
- 229910021332 silicide Inorganic materials 0.000 claims description 10
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 abstract description 18
- 229910044991 metal oxide Inorganic materials 0.000 abstract description 4
- 150000004706 metal oxides Chemical class 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 26
- 229910052710 silicon Inorganic materials 0.000 description 26
- 239000010703 silicon Substances 0.000 description 26
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 24
- 238000005516 engineering process Methods 0.000 description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 239000006117 anti-reflective coating Substances 0.000 description 8
- 238000012545 processing Methods 0.000 description 7
- 239000003989 dielectric material Substances 0.000 description 5
- 229910052732 germanium Inorganic materials 0.000 description 5
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 5
- 238000005498 polishing Methods 0.000 description 5
- 230000035882 stress Effects 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 239000010941 cobalt Substances 0.000 description 4
- 229910017052 cobalt Inorganic materials 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 239000002210 silicon-based material Substances 0.000 description 4
- 238000000429 assembly Methods 0.000 description 3
- 230000000712 assembly Effects 0.000 description 3
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 150000003376 silicon Chemical class 0.000 description 3
- -1 tungsten nitride Chemical class 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- CPELXLSAUQHCOX-UHFFFAOYSA-N Hydrogen bromide Chemical compound Br CPELXLSAUQHCOX-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 230000008602 contraction Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 229910019001 CoSi Inorganic materials 0.000 description 1
- 206010042209 Stress Diseases 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 230000003667 anti-reflective effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000002512 chemotherapy Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 150000001868 cobalt Chemical class 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000002353 field-effect transistor method Methods 0.000 description 1
- 229910000042 hydrogen bromide Inorganic materials 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000024241 parasitism Effects 0.000 description 1
- NHDHVHZZCFYRSB-UHFFFAOYSA-N pyriproxyfen Chemical compound C=1C=CC=NC=1OC(C)COC(C=C1)=CC=C1OC1=CC=CC=C1 NHDHVHZZCFYRSB-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
- H01L29/66818—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET the channel being thinned after patterning, e.g. sacrificial oxidation on fin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
Abstract
Description
Claims (12)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/699,887 US7029958B2 (en) | 2003-11-04 | 2003-11-04 | Self aligned damascene gate |
US10/699,887 | 2003-11-04 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1883041A true CN1883041A (zh) | 2006-12-20 |
CN100524655C CN100524655C (zh) | 2009-08-05 |
Family
ID=34573288
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004800337151A Active CN100524655C (zh) | 2003-11-04 | 2004-10-08 | 自动对准镶嵌栅极 |
Country Status (8)
Country | Link |
---|---|
US (1) | US7029958B2 (zh) |
JP (1) | JP2007511071A (zh) |
KR (1) | KR101112046B1 (zh) |
CN (1) | CN100524655C (zh) |
DE (1) | DE112004002107B4 (zh) |
GB (1) | GB2424517B (zh) |
TW (1) | TWI376803B (zh) |
WO (1) | WO2005048339A1 (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102129982A (zh) * | 2010-12-29 | 2011-07-20 | 北京大学深圳研究生院 | 半导体精细图形及鳍形场效应管的fin体的制作方法 |
CN102956484A (zh) * | 2011-08-22 | 2013-03-06 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
CN103594342A (zh) * | 2012-08-13 | 2014-02-19 | 中芯国际集成电路制造(上海)有限公司 | 形成鳍部的方法和形成鳍式场效应晶体管的方法 |
CN104465347A (zh) * | 2013-09-24 | 2015-03-25 | 北大方正集团有限公司 | 多晶硅表面处理方法及系统 |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6686231B1 (en) * | 2002-12-06 | 2004-02-03 | Advanced Micro Devices, Inc. | Damascene gate process with sacrificial oxide in semiconductor devices |
US7041542B2 (en) * | 2004-01-12 | 2006-05-09 | Advanced Micro Devices, Inc. | Damascene tri-gate FinFET |
JP5170958B2 (ja) * | 2004-01-30 | 2013-03-27 | ルネサスエレクトロニクス株式会社 | 電界効果型トランジスタおよびその製造方法 |
KR100598099B1 (ko) * | 2004-02-24 | 2006-07-07 | 삼성전자주식회사 | 다마신 게이트를 갖는 수직 채널 핀 전계효과 트랜지스터 및 그 제조방법 |
US7084018B1 (en) | 2004-05-05 | 2006-08-01 | Advanced Micro Devices, Inc. | Sacrificial oxide for minimizing box undercut in damascene FinFET |
WO2006076151A2 (en) * | 2004-12-21 | 2006-07-20 | Carnegie Mellon University | Lithography and associated methods, devices, and systems |
US7858481B2 (en) | 2005-06-15 | 2010-12-28 | Intel Corporation | Method for fabricating transistor with thinned channel |
US7352034B2 (en) * | 2005-08-25 | 2008-04-01 | International Business Machines Corporation | Semiconductor structures integrating damascene-body FinFET's and planar devices on a common substrate and methods for forming such semiconductor structures |
US20090321830A1 (en) * | 2006-05-15 | 2009-12-31 | Carnegie Mellon University | Integrated circuit device, system, and method of fabrication |
US7678648B2 (en) * | 2006-07-14 | 2010-03-16 | Micron Technology, Inc. | Subresolution silicon features and methods for forming the same |
US7772048B2 (en) * | 2007-02-23 | 2010-08-10 | Freescale Semiconductor, Inc. | Forming semiconductor fins using a sacrificial fin |
US8518767B2 (en) | 2007-02-28 | 2013-08-27 | International Business Machines Corporation | FinFET with reduced gate to fin overlay sensitivity |
TW200847292A (en) * | 2007-05-29 | 2008-12-01 | Nanya Technology Corp | Method of manufacturing a self-aligned FinFET device |
US7902000B2 (en) * | 2008-06-04 | 2011-03-08 | International Business Machines Corporation | MugFET with stub source and drain regions |
JP5404812B2 (ja) * | 2009-12-04 | 2014-02-05 | 株式会社東芝 | 半導体装置の製造方法 |
US8569822B2 (en) * | 2011-11-02 | 2013-10-29 | Macronix International Co., Ltd. | Memory structure |
TWI467577B (zh) * | 2011-11-02 | 2015-01-01 | Macronix Int Co Ltd | 記憶體結構及其製造方法 |
CN113345952A (zh) | 2011-12-22 | 2021-09-03 | 英特尔公司 | 具有颈状半导体主体的半导体器件以及形成不同宽度的半导体主体的方法 |
US20130200459A1 (en) * | 2012-02-02 | 2013-08-08 | International Business Machines Corporation | Strained channel for depleted channel semiconductor devices |
JP5624567B2 (ja) | 2012-02-03 | 2014-11-12 | 株式会社東芝 | 不揮発性半導体記憶装置及びその製造方法 |
US9711645B2 (en) | 2013-12-26 | 2017-07-18 | International Business Machines Corporation | Method and structure for multigate FinFET device epi-extension junction control by hydrogen treatment |
TWI620234B (zh) * | 2014-07-08 | 2018-04-01 | 聯華電子股份有限公司 | 一種製作半導體元件的方法 |
CN105762071B (zh) * | 2014-12-17 | 2019-06-21 | 中国科学院微电子研究所 | 鳍式场效应晶体管及其鳍的制造方法 |
US10424664B2 (en) | 2016-12-14 | 2019-09-24 | Globalfoundries Inc. | Poly gate extension source to body contact |
Family Cites Families (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5007982A (en) * | 1988-07-11 | 1991-04-16 | North American Philips Corporation | Reactive ion etching of silicon with hydrogen bromide |
JP2969832B2 (ja) * | 1990-07-09 | 1999-11-02 | ソニー株式会社 | Mis型半導体装置 |
JPH04303929A (ja) * | 1991-01-29 | 1992-10-27 | Micron Technol Inc | シリコン基板をトレンチ・エッチングするための方法 |
US5757038A (en) | 1995-11-06 | 1998-05-26 | International Business Machines Corporation | Self-aligned dual gate MOSFET with an ultranarrow channel |
US5817550A (en) * | 1996-03-05 | 1998-10-06 | Regents Of The University Of California | Method for formation of thin film transistors on plastic substrates |
JP3695184B2 (ja) * | 1998-12-03 | 2005-09-14 | 松下電器産業株式会社 | プラズマエッチング装置およびプラズマエッチング方法 |
US6329124B1 (en) | 1999-05-26 | 2001-12-11 | Advanced Micro Devices | Method to produce high density memory cells and small spaces by using nitride spacer |
JP2002025916A (ja) * | 2000-07-11 | 2002-01-25 | Toyota Central Res & Dev Lab Inc | ヘテロ構造基板およびその製造方法 |
US6350696B1 (en) * | 2000-09-28 | 2002-02-26 | Advanced Micro Devices, Inc. | Spacer etch method for semiconductor device |
US7163864B1 (en) | 2000-10-18 | 2007-01-16 | International Business Machines Corporation | Method of fabricating semiconductor side wall fin |
US6472258B1 (en) | 2000-11-13 | 2002-10-29 | International Business Machines Corporation | Double gate trench transistor |
US6300182B1 (en) | 2000-12-11 | 2001-10-09 | Advanced Micro Devices, Inc. | Field effect transistor having dual gates with asymmetrical doping for reduced threshold voltage |
US6475869B1 (en) | 2001-02-26 | 2002-11-05 | Advanced Micro Devices, Inc. | Method of forming a double gate transistor having an epitaxial silicon/germanium channel region |
JP3543117B2 (ja) * | 2001-03-13 | 2004-07-14 | 独立行政法人産業技術総合研究所 | 二重ゲート電界効果トランジスタ |
FR2822293B1 (fr) | 2001-03-13 | 2007-03-23 | Nat Inst Of Advanced Ind Scien | Transistor a effet de champ et double grille, circuit integre comportant ce transistor, et procede de fabrication de ce dernier |
JP3488916B2 (ja) * | 2001-03-13 | 2004-01-19 | 独立行政法人産業技術総合研究所 | 半導体装置の製造方法 |
US6514849B1 (en) | 2001-04-02 | 2003-02-04 | Advanced Micro Devices, Inc. | Method of forming smaller contact size using a spacer hard mask |
US6458662B1 (en) | 2001-04-04 | 2002-10-01 | Advanced Micro Devices, Inc. | Method of fabricating a semiconductor device having an asymmetrical dual-gate silicon-germanium (SiGe) channel MOSFET and a device thereby formed |
KR100431489B1 (ko) | 2001-09-04 | 2004-05-12 | 한국과학기술원 | 플래쉬 메모리 소자 및 제조방법 |
US6657259B2 (en) | 2001-12-04 | 2003-12-02 | International Business Machines Corporation | Multiple-plane FinFET CMOS |
US6583469B1 (en) | 2002-01-28 | 2003-06-24 | International Business Machines Corporation | Self-aligned dog-bone structure for FinFET applications and methods to fabricate the same |
US6657252B2 (en) | 2002-03-19 | 2003-12-02 | International Business Machines Corporation | FinFET CMOS with NVRAM capability |
US6642090B1 (en) | 2002-06-03 | 2003-11-04 | International Business Machines Corporation | Fin FET devices from bulk semiconductor and method for forming |
US6770516B2 (en) | 2002-09-05 | 2004-08-03 | Taiwan Semiconductor Manufacturing Company | Method of forming an N channel and P channel FINFET device on the same semiconductor substrate |
US6706571B1 (en) | 2002-10-22 | 2004-03-16 | Advanced Micro Devices, Inc. | Method for forming multiple structures in a semiconductor device |
US6709982B1 (en) | 2002-11-26 | 2004-03-23 | Advanced Micro Devices, Inc. | Double spacer FinFET formation |
US6645797B1 (en) | 2002-12-06 | 2003-11-11 | Advanced Micro Devices, Inc. | Method for forming fins in a FinFET device using sacrificial carbon layer |
US6864164B1 (en) | 2002-12-17 | 2005-03-08 | Advanced Micro Devices, Inc. | Finfet gate formation using reverse trim of dummy gate |
US6762483B1 (en) * | 2003-01-23 | 2004-07-13 | Advanced Micro Devices, Inc. | Narrow fin FinFET |
US6764884B1 (en) * | 2003-04-03 | 2004-07-20 | Advanced Micro Devices, Inc. | Method for forming a gate in a FinFET device and thinning a fin in a channel region of the FinFET device |
US6903967B2 (en) * | 2003-05-22 | 2005-06-07 | Freescale Semiconductor, Inc. | Memory with charge storage locations and adjacent gate structures |
US6855582B1 (en) | 2003-06-12 | 2005-02-15 | Advanced Micro Devices, Inc. | FinFET gate formation using reverse trim and oxide polish |
US6911383B2 (en) * | 2003-06-26 | 2005-06-28 | International Business Machines Corporation | Hybrid planar and finFET CMOS devices |
US6787476B1 (en) | 2003-08-04 | 2004-09-07 | Advanced Micro Devices, Inc. | Etch stop layer for etching FinFET gate over a large topography |
-
2003
- 2003-11-04 US US10/699,887 patent/US7029958B2/en not_active Expired - Lifetime
-
2004
- 2004-10-08 DE DE112004002107T patent/DE112004002107B4/de active Active
- 2004-10-08 WO PCT/US2004/033251 patent/WO2005048339A1/en active Application Filing
- 2004-10-08 KR KR1020067008094A patent/KR101112046B1/ko not_active IP Right Cessation
- 2004-10-08 GB GB0610759A patent/GB2424517B/en not_active Expired - Fee Related
- 2004-10-08 JP JP2006538035A patent/JP2007511071A/ja active Pending
- 2004-10-08 CN CNB2004800337151A patent/CN100524655C/zh active Active
- 2004-10-18 TW TW093131500A patent/TWI376803B/zh active
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102129982A (zh) * | 2010-12-29 | 2011-07-20 | 北京大学深圳研究生院 | 半导体精细图形及鳍形场效应管的fin体的制作方法 |
CN102956484A (zh) * | 2011-08-22 | 2013-03-06 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
CN102956484B (zh) * | 2011-08-22 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
CN103594342A (zh) * | 2012-08-13 | 2014-02-19 | 中芯国际集成电路制造(上海)有限公司 | 形成鳍部的方法和形成鳍式场效应晶体管的方法 |
CN103594342B (zh) * | 2012-08-13 | 2016-03-16 | 中芯国际集成电路制造(上海)有限公司 | 形成鳍部的方法和形成鳍式场效应晶体管的方法 |
CN104465347A (zh) * | 2013-09-24 | 2015-03-25 | 北大方正集团有限公司 | 多晶硅表面处理方法及系统 |
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DE112004002107T5 (de) | 2006-12-14 |
JP2007511071A (ja) | 2007-04-26 |
KR101112046B1 (ko) | 2012-02-27 |
US7029958B2 (en) | 2006-04-18 |
WO2005048339A1 (en) | 2005-05-26 |
CN100524655C (zh) | 2009-08-05 |
GB2424517A (en) | 2006-09-27 |
KR20060108629A (ko) | 2006-10-18 |
GB0610759D0 (en) | 2006-07-12 |
US20050104091A1 (en) | 2005-05-19 |
DE112004002107B4 (de) | 2010-05-06 |
GB2424517B (en) | 2007-07-11 |
TWI376803B (en) | 2012-11-11 |
TW200524159A (en) | 2005-07-16 |
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