DE19882696T1 - Speichertransaktionen auf einem Bus geringer Leitungsanzahl - Google Patents
Speichertransaktionen auf einem Bus geringer LeitungsanzahlInfo
- Publication number
- DE19882696T1 DE19882696T1 DE19882696T DE19882696T DE19882696T1 DE 19882696 T1 DE19882696 T1 DE 19882696T1 DE 19882696 T DE19882696 T DE 19882696T DE 19882696 T DE19882696 T DE 19882696T DE 19882696 T1 DE19882696 T1 DE 19882696T1
- Authority
- DE
- Germany
- Prior art keywords
- bus
- lines
- low number
- memory transactions
- transactions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
- G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/936,848 | 1997-09-24 | ||
US08/936,848 US5991841A (en) | 1997-09-24 | 1997-09-24 | Memory transactions on a low pin count bus |
PCT/US1998/013886 WO1999015971A1 (en) | 1997-09-24 | 1998-07-07 | Memory transactions on a low pin count bus |
Publications (2)
Publication Number | Publication Date |
---|---|
DE19882696T1 true DE19882696T1 (de) | 2000-10-26 |
DE19882696B4 DE19882696B4 (de) | 2007-05-24 |
Family
ID=25469156
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19882696T Expired - Lifetime DE19882696B4 (de) | 1997-09-24 | 1998-07-07 | Speichertransaktionen auf einem Bus geringer Leitungsanzahl |
Country Status (10)
Country | Link |
---|---|
US (1) | US5991841A (de) |
JP (1) | JP4279451B2 (de) |
KR (1) | KR100388735B1 (de) |
CN (1) | CN100378690C (de) |
AU (1) | AU8475798A (de) |
DE (1) | DE19882696B4 (de) |
GB (1) | GB2345170B (de) |
HK (1) | HK1026489A1 (de) |
TW (1) | TW469373B (de) |
WO (1) | WO1999015971A1 (de) |
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US20030046683A1 (en) * | 2001-08-28 | 2003-03-06 | Jutzi Curtis E. | Server-side preference prediction based on customer billing information to generate a broadcast schedule |
US7047456B2 (en) * | 2001-08-28 | 2006-05-16 | Intel Corporation | Error correction for regional and dynamic factors in communications |
US7231653B2 (en) | 2001-09-24 | 2007-06-12 | Intel Corporation | Method for delivering transport stream data |
US8943540B2 (en) | 2001-09-28 | 2015-01-27 | Intel Corporation | Method and apparatus to provide a personalized channel |
TW552495B (en) * | 2001-10-24 | 2003-09-11 | Via Tech Inc | LPC interface chip set to adjust the data-access timing automatically |
EP1324346B1 (de) * | 2001-12-20 | 2008-02-27 | STMicroelectronics S.r.l. | Speicheranordnung |
US20030135553A1 (en) * | 2002-01-11 | 2003-07-17 | Ramesh Pendakur | Content-based caching and routing of content using subscription information from downstream nodes |
US6925510B2 (en) * | 2002-02-22 | 2005-08-02 | Winbond Electronics, Corp. | Peripheral or memory device having a combined ISA bus and LPC bus |
TW589534B (en) * | 2002-07-05 | 2004-06-01 | Via Tech Inc | Method and device to reduce the LDRQ input pin count of LPC control host |
US7103701B2 (en) * | 2002-09-23 | 2006-09-05 | Hewlett-Packard Development Company, L.P. | Memory bus interface |
TW588282B (en) * | 2002-10-22 | 2004-05-21 | Via Tech Inc | System capable of managing peripheral input/output control device |
ITVA20030022A1 (it) * | 2003-07-07 | 2005-01-08 | St Microelectronics Srl | Metodo di generazione di un segnale di abilitazione in una memoria multi-protocollo e relativo dispositivo di memoria. |
US20050044297A1 (en) * | 2003-08-18 | 2005-02-24 | Eugene Feng | Memory device operable with a plurality of protocols |
US7249213B2 (en) * | 2003-08-18 | 2007-07-24 | Silicon Storage Technology, Inc. | Memory device operable with a plurality of protocols with configuration data stored in non-volatile storage elements |
JP2005078493A (ja) * | 2003-09-02 | 2005-03-24 | Renesas Technology Corp | マイクロコンピュータ |
US6944064B2 (en) * | 2003-12-22 | 2005-09-13 | Silicon Storage Technology, Inc. | Memory unit having programmable device ID |
US7209998B2 (en) * | 2004-02-04 | 2007-04-24 | Qualcomm Incorporated | Scalable bus structure |
US7069371B2 (en) * | 2004-03-10 | 2006-06-27 | Silicon Storage Technology, Inc. | Motherboard having a non-volatile memory which is reprogrammable through a video display port and a non-volatile memory switchable between two communication protocols |
US7546402B2 (en) * | 2005-03-24 | 2009-06-09 | Sunplus Technology Co., Ltd. | Optical storage system comprising interface for transferring data |
US8239603B2 (en) * | 2006-05-03 | 2012-08-07 | Standard Microsystems Corporation | Serialized secondary bus architecture |
US7660177B2 (en) * | 2007-12-21 | 2010-02-09 | Silicon Storage Technology, Inc. | Non-volatile memory device having high speed serial interface |
US8607028B2 (en) | 2008-12-30 | 2013-12-10 | Micron Technology, Inc. | Enhanced addressability for serial non-volatile memory |
CN101477499A (zh) * | 2008-12-31 | 2009-07-08 | 北京中星微电子有限公司 | 总线、通过总线进行存储器访问的方法、接口模块、芯片 |
CN101533381B (zh) * | 2009-03-27 | 2015-11-25 | 北京中星微电子有限公司 | 一种类ahb总线及其实现方法 |
US8255725B2 (en) * | 2009-04-28 | 2012-08-28 | Kabushiki Kaisha Toshiba | Information processing apparatus and power-saving control method |
WO2011106049A1 (en) | 2010-02-23 | 2011-09-01 | Rambus Inc. | Time multiplexing at different rates to access different memory types |
JP4846862B2 (ja) * | 2010-05-12 | 2011-12-28 | 株式会社東芝 | 情報処理装置および省電力制御方法 |
US10380060B2 (en) * | 2016-06-17 | 2019-08-13 | Etron Technology, Inc. | Low-pincount high-bandwidth memory and memory bus |
CN107844449B (zh) * | 2016-09-20 | 2021-02-09 | 深圳中电长城信息安全系统有限公司 | 飞腾平台处理通信协议的方法和系统 |
CN107844450B (zh) * | 2016-09-21 | 2020-12-11 | 深圳中电长城信息安全系统有限公司 | Lpc接口通讯协议的转换方法和系统 |
US10713199B2 (en) * | 2017-06-27 | 2020-07-14 | Qualcomm Incorporated | High bandwidth soundwire master with multiple primary data lanes |
CN107608927B (zh) * | 2017-09-22 | 2020-06-26 | 苏州浪潮智能科技有限公司 | 一种支持全功能的lpc总线主机端口的设计方法 |
Family Cites Families (50)
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FR2044650B1 (de) * | 1969-05-16 | 1974-06-14 | Ibm France | |
US3924241A (en) * | 1971-03-15 | 1975-12-02 | Burroughs Corp | Memory cycle initiation in response to the presence of the memory address |
US3821715A (en) * | 1973-01-22 | 1974-06-28 | Intel Corp | Memory system for a multi chip digital computer |
DE2364408C3 (de) * | 1973-12-22 | 1979-06-07 | Olympia Werke Ag, 2940 Wilhelmshaven | Schaltungsanordnung zur Adressierung der Speicherplätze eines aus mehreren Chips bestehenden Speichers |
US3882470A (en) * | 1974-02-04 | 1975-05-06 | Honeywell Inf Systems | Multiple register variably addressable semiconductor mass memory |
US4263650B1 (en) * | 1974-10-30 | 1994-11-29 | Motorola Inc | Digital data processing system with interface adaptor having programmable monitorable control register therein |
US4007452A (en) * | 1975-07-28 | 1977-02-08 | Intel Corporation | Wafer scale integration system |
US4099231A (en) * | 1975-10-01 | 1978-07-04 | Digital Equipment Corporation | Memory control system for transferring selected words in a multiple memory word exchange during one memory cycle |
US4191996A (en) * | 1977-07-22 | 1980-03-04 | Chesley Gilman D | Self-configurable computer and memory system |
US4333142A (en) * | 1977-07-22 | 1982-06-01 | Chesley Gilman D | Self-configurable computer and memory system |
US4375665A (en) * | 1978-04-24 | 1983-03-01 | Texas Instruments Incorporated | Eight bit standard connector bus for sixteen bit microcomputer using mirrored memory boards |
US4315308A (en) * | 1978-12-21 | 1982-02-09 | Intel Corporation | Interface between a microprocessor chip and peripheral subsystems |
US4286321A (en) * | 1979-06-18 | 1981-08-25 | International Business Machines Corporation | Common bus communication system in which the width of the address field is greater than the number of lines on the bus |
US4315310A (en) * | 1979-09-28 | 1982-02-09 | Intel Corporation | Input/output data processing system |
US4443864A (en) * | 1979-10-09 | 1984-04-17 | Texas Instruments Incorporated | Memory system for microprocessor with multiplexed address/data bus |
US4306298A (en) * | 1979-10-09 | 1981-12-15 | Texas Instruments Incorporated | Memory system for microprocessor with multiplexed address/data bus |
US4373183A (en) * | 1980-08-20 | 1983-02-08 | Ibm Corporation | Bus interface units sharing a common bus using distributed control for allocation of the bus |
EP0077328A4 (de) * | 1981-04-27 | 1985-06-26 | Textron Inc | Vielfachleitung für mehrere hauptprozessoren. |
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US4480307A (en) * | 1982-01-04 | 1984-10-30 | Intel Corporation | Interface for use between a memory and components of a module switching apparatus |
US4488218A (en) * | 1982-01-07 | 1984-12-11 | At&T Bell Laboratories | Dynamic priority queue occupancy scheme for access to a demand-shared bus |
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US4660141A (en) * | 1983-12-06 | 1987-04-21 | Tri Sigma Corporation | Self configuring computer network with automatic bus exchange of module identification numbers and processor assigned module numbers |
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US5561821A (en) * | 1993-10-29 | 1996-10-01 | Advanced Micro Devices | System for performing I/O access and memory access by driving address of DMA configuration registers and memory address stored therein respectively on local bus |
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US5768622A (en) * | 1995-08-18 | 1998-06-16 | Dell U.S.A., L.P. | System for preemptive bus master termination by determining termination data for each target device and periodically terminating burst transfer to device according to termination data |
US6393492B1 (en) * | 1995-11-03 | 2002-05-21 | Texas Instruments Incorporated | Method and arrangement for operating a mass memory storage peripheral computer device connected to a host computer |
US5774680A (en) * | 1995-12-11 | 1998-06-30 | Compaq Computer Corporation | Interfacing direct memory access devices to a non-ISA bus |
-
1997
- 1997-09-24 US US08/936,848 patent/US5991841A/en not_active Expired - Lifetime
-
1998
- 1998-07-07 WO PCT/US1998/013886 patent/WO1999015971A1/en active IP Right Grant
- 1998-07-07 KR KR10-2000-7003137A patent/KR100388735B1/ko not_active IP Right Cessation
- 1998-07-07 CN CNB988114682A patent/CN100378690C/zh not_active Expired - Lifetime
- 1998-07-07 AU AU84757/98A patent/AU8475798A/en not_active Abandoned
- 1998-07-07 JP JP2000513205A patent/JP4279451B2/ja not_active Expired - Lifetime
- 1998-07-07 DE DE19882696T patent/DE19882696B4/de not_active Expired - Lifetime
- 1998-07-07 GB GB0007301A patent/GB2345170B/en not_active Expired - Lifetime
- 1998-07-23 TW TW087112051A patent/TW469373B/zh not_active IP Right Cessation
-
2000
- 2000-09-09 HK HK00105694A patent/HK1026489A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE19882696B4 (de) | 2007-05-24 |
JP2001517834A (ja) | 2001-10-09 |
GB2345170B (en) | 2002-12-18 |
HK1026489A1 (en) | 2000-12-15 |
JP4279451B2 (ja) | 2009-06-17 |
GB0007301D0 (en) | 2000-05-17 |
TW469373B (en) | 2001-12-21 |
CN1279787A (zh) | 2001-01-10 |
US5991841A (en) | 1999-11-23 |
AU8475798A (en) | 1999-04-12 |
CN100378690C (zh) | 2008-04-02 |
WO1999015971A1 (en) | 1999-04-01 |
GB2345170A (en) | 2000-06-28 |
KR20010024259A (ko) | 2001-03-26 |
KR100388735B1 (ko) | 2003-06-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8364 | No opposition during term of opposition | ||
R071 | Expiry of right |