DE2962217D1 - Method of fabrication of self-aligned field-effect transistors of the metal-semiconductor type - Google Patents

Method of fabrication of self-aligned field-effect transistors of the metal-semiconductor type

Info

Publication number
DE2962217D1
DE2962217D1 DE7979104878T DE2962217T DE2962217D1 DE 2962217 D1 DE2962217 D1 DE 2962217D1 DE 7979104878 T DE7979104878 T DE 7979104878T DE 2962217 T DE2962217 T DE 2962217T DE 2962217 D1 DE2962217 D1 DE 2962217D1
Authority
DE
Germany
Prior art keywords
fabrication
self
metal
effect transistors
semiconductor type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE7979104878T
Other languages
English (en)
Inventor
Sol Triebwasser
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE2962217D1 publication Critical patent/DE2962217D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/139—Schottky barrier
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/141—Self-alignment coat gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/143—Shadow masking
DE7979104878T 1978-12-29 1979-12-04 Method of fabrication of self-aligned field-effect transistors of the metal-semiconductor type Expired DE2962217D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/974,592 US4222164A (en) 1978-12-29 1978-12-29 Method of fabrication of self-aligned metal-semiconductor field effect transistors

Publications (1)

Publication Number Publication Date
DE2962217D1 true DE2962217D1 (en) 1982-03-25

Family

ID=25522230

Family Applications (1)

Application Number Title Priority Date Filing Date
DE7979104878T Expired DE2962217D1 (en) 1978-12-29 1979-12-04 Method of fabrication of self-aligned field-effect transistors of the metal-semiconductor type

Country Status (4)

Country Link
US (1) US4222164A (de)
EP (1) EP0013342B1 (de)
JP (1) JPS5924551B2 (de)
DE (1) DE2962217D1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4546366A (en) * 1978-04-24 1985-10-08 Buchanan Bobby L Polysilicon/silicon junction field effect transistors and integrated circuits (POSFET)
FR2461358A1 (fr) * 1979-07-06 1981-01-30 Thomson Csf Procede de realisation d'un transistor a effet de champ a grille auto-alignee, et transistor obtenu par ce procede
FR2462781A1 (fr) * 1979-07-27 1981-02-13 Thomson Csf Transistor a effet de champ a grille schottky autoalignee et son procede de fabrication
US4377899A (en) * 1979-11-19 1983-03-29 Sumitomo Electric Industries, Ltd. Method of manufacturing Schottky field-effect transistors utilizing shadow masking
US4393578A (en) * 1980-01-02 1983-07-19 General Electric Company Method of making silicon-on-sapphire FET
US4387386A (en) * 1980-06-09 1983-06-07 The United States Of America As Represented By The Secretary Of The Army Microwave controlled field effect switching device
US4359816A (en) * 1980-07-08 1982-11-23 International Business Machines Corporation Self-aligned metal process for field effect transistor integrated circuits
DE3273695D1 (en) * 1981-01-29 1986-11-13 Sumitomo Electric Industries A schottky-barrier gate field effect transistor and a process for the production of the same
US4389768A (en) * 1981-04-17 1983-06-28 International Business Machines Corporation Self-aligned process for fabricating gallium arsenide metal-semiconductor field effect transistors
US4601095A (en) * 1981-10-27 1986-07-22 Sumitomo Electric Industries, Ltd. Process for fabricating a Schottky-barrier gate field effect transistor
US4587541A (en) * 1983-07-28 1986-05-06 Cornell Research Foundation, Inc. Monolithic coplanar waveguide travelling wave transistor amplifier
FR2583220B1 (fr) * 1985-06-11 1987-08-07 Thomson Csf Procede de realisation d'au moins deux metallisations d'un composant semi-conducteur, recouvertes d'une couche de dielectrique et composant obtenu par ce dielectrique
US4670090A (en) * 1986-01-23 1987-06-02 Rockwell International Corporation Method for producing a field effect transistor
US4803173A (en) * 1987-06-29 1989-02-07 North American Philips Corporation, Signetics Division Method of fabrication of semiconductor device having a planar configuration
US4818712A (en) * 1987-10-13 1989-04-04 Northrop Corporation Aluminum liftoff masking process and product
US4945067A (en) * 1988-09-16 1990-07-31 Xerox Corporation Intra-gate offset high voltage thin film transistor with misalignment immunity and method of its fabrication
US5143857A (en) * 1988-11-07 1992-09-01 Triquint Semiconductor, Inc. Method of fabricating an electronic device with reduced susceptiblity to backgating effects
US7310287B2 (en) 2003-05-30 2007-12-18 Fairfield Industries Incorporated Method and apparatus for seismic data acquisition
US7561493B2 (en) * 2003-05-30 2009-07-14 Fairfield Industries, Inc. Method and apparatus for land based seismic data acquisition
JP2007294618A (ja) * 2006-04-24 2007-11-08 Elpida Memory Inc 半導体装置の製造方法及び半導体装置
US8611191B2 (en) 2008-05-22 2013-12-17 Fairfield Industries, Inc. Land based unit for seismic data acquisition
CN105870190B (zh) * 2016-04-22 2019-04-12 西安电子科技大学 一种具有双高栅的4H-SiC金属半导体场效应晶体管的制备方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH461646A (de) * 1967-04-18 1968-08-31 Ibm Feld-Effekt-Transistor und Verfahren zu seiner Herstellung
GB1265017A (de) * 1968-08-19 1972-03-01
US3574010A (en) * 1968-12-30 1971-04-06 Texas Instruments Inc Fabrication of metal insulator semiconductor field effect transistors
US3756924A (en) * 1971-04-01 1973-09-04 Texas Instruments Inc Method of fabricating a semiconductor device
US3943622A (en) * 1972-12-26 1976-03-16 Westinghouse Electric Corporation Application of facet-growth to self-aligned Shottky barrier gate field effect transistors
US3855690A (en) * 1972-12-26 1974-12-24 Westinghouse Electric Corp Application of facet-growth to self-aligned schottky barrier gate field effect transistors
US3906541A (en) * 1974-03-29 1975-09-16 Gen Electric Field effect transistor devices and methods of making same
US3909925A (en) * 1974-05-06 1975-10-07 Telex Computer Products N-Channel charge coupled device fabrication process
US4051273A (en) * 1975-11-26 1977-09-27 Ibm Corporation Field effect transistor structure and method of making same
US4029522A (en) * 1976-06-30 1977-06-14 International Business Machines Corporation Method to fabricate ion-implanted layers with abrupt edges to reduce the parasitic resistance of Schottky barrier fets and bipolar transistors

Also Published As

Publication number Publication date
EP0013342A1 (de) 1980-07-23
JPS5924551B2 (ja) 1984-06-09
EP0013342B1 (de) 1982-02-24
US4222164A (en) 1980-09-16
JPS5591881A (en) 1980-07-11

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee