DE3166342D1 - Electrically alterable double dense memory - Google Patents

Electrically alterable double dense memory

Info

Publication number
DE3166342D1
DE3166342D1 DE8181107924T DE3166342T DE3166342D1 DE 3166342 D1 DE3166342 D1 DE 3166342D1 DE 8181107924 T DE8181107924 T DE 8181107924T DE 3166342 T DE3166342 T DE 3166342T DE 3166342 D1 DE3166342 D1 DE 3166342D1
Authority
DE
Germany
Prior art keywords
electrically alterable
dense memory
double dense
double
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181107924T
Other languages
English (en)
Inventor
Harish Narandas Kotecha
Noble, Jr
Iii Francis Walter Wiedman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3166342D1 publication Critical patent/DE3166342D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • G11C16/0458—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates comprising two or more independent floating gates which store independent data
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7882—Programmable transistors with only two possible levels of programmation charging by injection of carriers through a conductive insulator, e.g. Poole-Frankel conduction
DE8181107924T 1980-10-27 1981-10-05 Electrically alterable double dense memory Expired DE3166342D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/200,851 US4380057A (en) 1980-10-27 1980-10-27 Electrically alterable double dense memory

Publications (1)

Publication Number Publication Date
DE3166342D1 true DE3166342D1 (en) 1984-10-31

Family

ID=22743468

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181107924T Expired DE3166342D1 (en) 1980-10-27 1981-10-05 Electrically alterable double dense memory

Country Status (4)

Country Link
US (1) US4380057A (de)
EP (1) EP0051158B1 (de)
JP (1) JPS5829631B2 (de)
DE (1) DE3166342D1 (de)

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Also Published As

Publication number Publication date
JPS5829631B2 (ja) 1983-06-23
EP0051158A1 (de) 1982-05-12
EP0051158B1 (de) 1984-09-26
JPS5780761A (en) 1982-05-20
US4380057A (en) 1983-04-12

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee