DE3174776D1 - Process for preparing thin film transistor arrays - Google Patents

Process for preparing thin film transistor arrays

Info

Publication number
DE3174776D1
DE3174776D1 DE8181304955T DE3174776T DE3174776D1 DE 3174776 D1 DE3174776 D1 DE 3174776D1 DE 8181304955 T DE8181304955 T DE 8181304955T DE 3174776 T DE3174776 T DE 3174776T DE 3174776 D1 DE3174776 D1 DE 3174776D1
Authority
DE
Germany
Prior art keywords
thin film
film transistor
transistor arrays
preparing thin
preparing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181304955T
Other languages
English (en)
Inventor
Fang Chen Luo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xerox Corp
Original Assignee
Xerox Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xerox Corp filed Critical Xerox Corp
Application granted granted Critical
Publication of DE3174776D1 publication Critical patent/DE3174776D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/143—Shadow masking
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/943—Movable
DE8181304955T 1980-11-03 1981-10-21 Process for preparing thin film transistor arrays Expired DE3174776D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/203,218 US4335161A (en) 1980-11-03 1980-11-03 Thin film transistors, thin film transistor arrays, and a process for preparing the same

Publications (1)

Publication Number Publication Date
DE3174776D1 true DE3174776D1 (en) 1986-07-10

Family

ID=22753014

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181304955T Expired DE3174776D1 (en) 1980-11-03 1981-10-21 Process for preparing thin film transistor arrays

Country Status (4)

Country Link
US (1) US4335161A (de)
EP (1) EP0051396B1 (de)
JP (1) JPS57104260A (de)
DE (1) DE3174776D1 (de)

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US5698864A (en) * 1982-04-13 1997-12-16 Seiko Epson Corporation Method of manufacturing a liquid crystal device having field effect transistors
FR2527385B1 (fr) * 1982-04-13 1987-05-22 Suwa Seikosha Kk Transistor a couche mince et panneau d'affichage a cristaux liquides utilisant ce type de transistor
US5736751A (en) * 1982-04-13 1998-04-07 Seiko Epson Corporation Field effect transistor having thick source and drain regions
US6294796B1 (en) * 1982-04-13 2001-09-25 Seiko Epson Corporation Thin film transistors and active matrices including same
US4461071A (en) * 1982-08-23 1984-07-24 Xerox Corporation Photolithographic process for fabricating thin film transistors
FR2533072B1 (fr) * 1982-09-14 1986-07-18 Coissard Pierre Procede de fabrication de circuits electroniques a base de transistors en couches minces et de condensateurs
JPS5954269A (ja) * 1982-09-22 1984-03-29 Seiko Epson Corp 薄膜半導体装置
JPS59124162A (ja) * 1982-12-29 1984-07-18 Sharp Corp 薄膜トランジスタ
US4511599A (en) * 1983-03-01 1985-04-16 Sigmatron Associates Mask for vacuum depositing back metal electrodes on EL panel
CA1228935A (en) * 1983-12-23 1987-11-03 Sony Corp SEMICONDUCTOR DEVICE WITH ACTIVE ZONE OF POLYCRYSTALLINE SILICON, AND THEIR MANUFACTURE
JPS60241270A (ja) * 1984-05-16 1985-11-30 Seiko Epson Corp 薄膜トランジスタの製造方法
US5019807A (en) * 1984-07-25 1991-05-28 Staplevision, Inc. Display screen
US5753542A (en) 1985-08-02 1998-05-19 Semiconductor Energy Laboratory Co., Ltd. Method for crystallizing semiconductor material without exposing it to air
US4746548A (en) * 1985-10-23 1988-05-24 Gte Products Corporation Method for registration of shadow masked thin-film patterns
US4915057A (en) * 1985-10-23 1990-04-10 Gte Products Corporation Apparatus and method for registration of shadow masked thin-film patterns
US4715940A (en) * 1985-10-23 1987-12-29 Gte Products Corporation Mask for patterning electrode structures in thin film EL devices
US4615781A (en) * 1985-10-23 1986-10-07 Gte Products Corporation Mask assembly having mask stress relieving feature
US5270229A (en) * 1989-03-07 1993-12-14 Matsushita Electric Industrial Co., Ltd. Thin film semiconductor device and process for producing thereof
US4972248A (en) * 1989-05-11 1990-11-20 Syracuse University Multi-layer circuit structure with thin semiconductor channels
TW237562B (de) 1990-11-09 1995-01-01 Semiconductor Energy Res Co Ltd
US6979840B1 (en) * 1991-09-25 2005-12-27 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having anodized metal film between the gate wiring and drain wiring
JP3437863B2 (ja) * 1993-01-18 2003-08-18 株式会社半導体エネルギー研究所 Ｍｉｓ型半導体装置の作製方法
JP3464285B2 (ja) * 1994-08-26 2003-11-05 株式会社半導体エネルギー研究所 半導体装置の作製方法
TW297950B (de) * 1994-12-16 1997-02-11 Handotai Energy Kenkyusho Kk
US6214631B1 (en) * 1998-10-30 2001-04-10 The Trustees Of Princeton University Method for patterning light emitting devices incorporating a movable mask
JP2001177097A (ja) * 1999-12-10 2001-06-29 Koninkl Philips Electronics Nv 薄膜トランジスタ及びその製造方法
DE10017610C2 (de) * 2000-03-30 2002-10-31 Hahn Meitner Inst Berlin Gmbh Verfahren zur Herstellung eines Solarmoduls mit integriert serienverschalteten Dünnschicht-Solarzellen und Verwendung davon
US6821348B2 (en) * 2002-02-14 2004-11-23 3M Innovative Properties Company In-line deposition processes for circuit fabrication
US20030151118A1 (en) * 2002-02-14 2003-08-14 3M Innovative Properties Company Aperture masks for circuit fabrication
US6897164B2 (en) * 2002-02-14 2005-05-24 3M Innovative Properties Company Aperture masks for circuit fabrication
US6943066B2 (en) * 2002-06-05 2005-09-13 Advantech Global, Ltd Active matrix backplane for controlling controlled elements and method of manufacture thereof
KR100480705B1 (ko) * 2002-07-03 2005-04-06 엘지전자 주식회사 유기 ｅｌ 소자 제작용 새도우 마스크 및 그 제조 방법
JP2004186395A (ja) * 2002-12-03 2004-07-02 Fujitsu Ltd セラミック基板の製造方法
AU2003211349A1 (en) * 2003-02-28 2004-09-17 Fujitsu Limited Etching resistant film, process for producing the same, surface cured resist pattern, process for producing the same, semiconductor device and process for producing the same
US20070178710A1 (en) * 2003-08-18 2007-08-02 3M Innovative Properties Company Method for sealing thin film transistors
US20070137568A1 (en) * 2005-12-16 2007-06-21 Schreiber Brian E Reciprocating aperture mask system and method
US7763114B2 (en) * 2005-12-28 2010-07-27 3M Innovative Properties Company Rotatable aperture mask assembly and deposition system
DE102006042617B4 (de) 2006-09-05 2010-04-08 Q-Cells Se Verfahren zur Erzeugung von lokalen Kontakten
US7741204B2 (en) * 2006-10-30 2010-06-22 Hewlett-Packard Development Company, L.P. Mixed-scale electronic interfaces
DE102006055862B4 (de) * 2006-11-22 2008-07-03 Q-Cells Ag Verfahren und Vorrichtung zum Herstellen einer elektrischen Solarzellen-Kontaktstruktur an einem Substrat
KR20170142998A (ko) * 2009-12-25 2017-12-28 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 제작 방법
US8658478B2 (en) 2010-09-23 2014-02-25 Advantech Global, Ltd Transistor structure for improved static control during formation of the transistor
US20150259825A1 (en) * 2012-09-04 2015-09-17 MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. Method and apparatus for the fabrication of nanostructures, network of interconnected nanostructures and nanostructure
KR102089339B1 (ko) * 2013-12-31 2020-03-16 엘지디스플레이 주식회사 마스크 및 그를 이용한 박막트랜지스터의 제조방법

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Also Published As

Publication number Publication date
JPS57104260A (en) 1982-06-29
US4335161A (en) 1982-06-15
EP0051396A2 (de) 1982-05-12
EP0051396B1 (de) 1986-06-04
EP0051396A3 (en) 1983-06-22
JPH0566013B2 (de) 1993-09-20

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Legal Events

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee