DE3269393D1 - Outline of a multilayer circuit board and method of making multilayer circuits using it - Google Patents

Outline of a multilayer circuit board and method of making multilayer circuits using it

Info

Publication number
DE3269393D1
DE3269393D1 DE8282401565T DE3269393T DE3269393D1 DE 3269393 D1 DE3269393 D1 DE 3269393D1 DE 8282401565 T DE8282401565 T DE 8282401565T DE 3269393 T DE3269393 T DE 3269393T DE 3269393 D1 DE3269393 D1 DE 3269393D1
Authority
DE
Germany
Prior art keywords
multilayer
outline
circuit board
circuits
making
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282401565T
Other languages
English (en)
Inventor
Francois Rouge
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Application granted granted Critical
Publication of DE3269393D1 publication Critical patent/DE3269393D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H05K1/0287—Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09609—Via grid, i.e. two-dimensional array of vias or holes in a single plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09945—Universal aspects, e.g. universal inner layers or via grid, or anisotropic interposer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
DE8282401565T 1981-09-02 1982-08-23 Outline of a multilayer circuit board and method of making multilayer circuits using it Expired DE3269393D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8116718A FR2512315A1 (fr) 1981-09-02 1981-09-02 Ebauche de circuit electrique multicouche et procede de fabrication de circuits multicouches en comportant application

Publications (1)

Publication Number Publication Date
DE3269393D1 true DE3269393D1 (en) 1986-04-03

Family

ID=9261860

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282401565T Expired DE3269393D1 (en) 1981-09-02 1982-08-23 Outline of a multilayer circuit board and method of making multilayer circuits using it

Country Status (4)

Country Link
US (1) US4524239A (de)
EP (1) EP0074303B1 (de)
DE (1) DE3269393D1 (de)
FR (1) FR2512315A1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4598470A (en) * 1983-06-20 1986-07-08 International Business Machines Corporation Method for providing improved electrical and mechanical connection between I/O pin and transverse via substrate
JPH0234461B2 (ja) * 1983-06-20 1990-08-03 Intaanashonaru Bijinesu Mashiinzu Corp Hienkeipinanaakitasojudentaikibanoyobisonoseizohoho
US4587727A (en) * 1983-07-05 1986-05-13 International Business Machines Corporation System for generating circuit boards using electroeroded sheet layers
FR2555011B1 (fr) * 1983-11-15 1986-01-24 Thomson Csf Carte imprimee a empreintes
US4700214A (en) * 1983-12-15 1987-10-13 Laserpath Corporation Electrical circuitry
US4720470A (en) * 1983-12-15 1988-01-19 Laserpath Corporation Method of making electrical circuitry
CA1237820A (en) * 1985-03-20 1988-06-07 Hitachi, Ltd. Multilayer printed circuit board
US4799128A (en) * 1985-12-20 1989-01-17 Ncr Corporation Multilayer printed circuit board with domain partitioning
US4851614A (en) * 1987-05-22 1989-07-25 Compaq Computer Corporation Non-occluding mounting hole with solder pad for printed circuit boards
AU610249B2 (en) * 1987-09-29 1991-05-16 Microelectronics And Computer Technology Corporation Customizable circuitry
US5165166A (en) * 1987-09-29 1992-11-24 Microelectronics And Computer Technology Corporation Method of making a customizable circuitry
US5081561A (en) * 1988-02-19 1992-01-14 Microelectronics And Computer Technology Corporation Customizable circuitry
US4859806A (en) * 1988-05-17 1989-08-22 Microelectronics And Computer Technology Corporation Discretionary interconnect
US5157477A (en) * 1990-01-10 1992-10-20 International Business Machines Corporation Matched impedance vertical conductors in multilevel dielectric laminated wiring
US5390081A (en) * 1993-03-22 1995-02-14 Stratus Computer, Inc. Fault-tolerant power distribution system for rack-mounted hardware
JP3230953B2 (ja) * 1994-07-28 2001-11-19 富士通株式会社 多層薄膜配線基板
US6691296B1 (en) * 1998-02-02 2004-02-10 Matsushita Electric Industrial Co., Ltd. Circuit board design aiding
JP3562568B2 (ja) * 1999-07-16 2004-09-08 日本電気株式会社 多層配線基板
US6225687B1 (en) * 1999-09-02 2001-05-01 Intel Corporation Chip package with degassing holes
US6734369B1 (en) * 2000-08-31 2004-05-11 International Business Machines Corporation Surface laminar circuit board having pad disposed within a through hole
US6718474B1 (en) 2000-09-21 2004-04-06 Stratus Technologies Bermuda Ltd. Methods and apparatus for clock management based on environmental conditions

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1157432A (en) * 1965-08-18 1969-07-09 Int Computers Ltd Electric Circuit Interconnection Means
FR2243578B1 (de) * 1973-09-12 1976-11-19 Honeywell Bull Soc Ind
JPS53129863A (en) * 1977-04-19 1978-11-13 Fujitsu Ltd Multilayer printed board
CH630211A5 (en) * 1978-08-07 1982-05-28 Contraves Ag Method for designing electrically conductive layers for producing printed circuits, as well as a multilayer base material for carrying out the method
CH629057A5 (en) * 1978-08-07 1982-03-31 Contraves Ag Method for designing electrically conductive layers for producing printed circuits, as well as a multi-layer base material for carrying out the method
GB2039153A (en) * 1979-01-02 1980-07-30 British Broadcasting Corp Multilayer electrical circuit boards
US4250616A (en) * 1979-03-23 1981-02-17 Methode Electronics, Inc. Method of producing multilayer backplane
DE2929950A1 (de) * 1979-07-24 1981-02-26 Basf Ag Di- und/oder oligomerisierung von cyclischen, aliphatischen aethern und verwendung der entstandenen produkte
DE3020196C2 (de) * 1980-05-28 1982-05-06 Ruwel-Werke Spezialfabrik für Leiterplatten GmbH, 4170 Geldern Mehrebenen-Leiterplatte und Verfahren zu deren Herstellung
US4434321A (en) * 1981-02-09 1984-02-28 International Computers Limited Multilayer printed circuit boards

Also Published As

Publication number Publication date
EP0074303B1 (de) 1986-02-26
EP0074303A1 (de) 1983-03-16
US4524239A (en) 1985-06-18
FR2512315A1 (fr) 1983-03-04
FR2512315B1 (de) 1983-12-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee