DE3274698D1 - Method of producing a bipolar transistor - Google Patents
Method of producing a bipolar transistorInfo
- Publication number
- DE3274698D1 DE3274698D1 DE8282305023T DE3274698T DE3274698D1 DE 3274698 D1 DE3274698 D1 DE 3274698D1 DE 8282305023 T DE8282305023 T DE 8282305023T DE 3274698 T DE3274698 T DE 3274698T DE 3274698 D1 DE3274698 D1 DE 3274698D1
- Authority
- DE
- Germany
- Prior art keywords
- producing
- bipolar transistor
- bipolar
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42304—Base electrodes for bipolar transistors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/01—Bipolar transistors-ion implantation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/04—Dopants, special
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56151987A JPS5866359A (ja) | 1981-09-28 | 1981-09-28 | 半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3274698D1 true DE3274698D1 (en) | 1987-01-22 |
Family
ID=15530578
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282305023T Expired DE3274698D1 (en) | 1981-09-28 | 1982-09-23 | Method of producing a bipolar transistor |
Country Status (4)
Country | Link |
---|---|
US (1) | US4590666A (de) |
EP (1) | EP0076105B1 (de) |
JP (1) | JPS5866359A (de) |
DE (1) | DE3274698D1 (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2549293B1 (fr) * | 1983-07-13 | 1986-10-10 | Silicium Semiconducteur Ssc | Transistor bipolaire haute frequence et son procede de fabrication |
JPS6080267A (ja) * | 1983-10-07 | 1985-05-08 | Toshiba Corp | 半導体集積回路装置の製造方法 |
JPS6146063A (ja) * | 1984-08-10 | 1986-03-06 | Hitachi Ltd | 半導体装置の製造方法 |
JPS61268065A (ja) * | 1985-05-23 | 1986-11-27 | Matsushita Electronics Corp | 半導体装置 |
US4721682A (en) * | 1985-09-25 | 1988-01-26 | Monolithic Memories, Inc. | Isolation and substrate connection for a bipolar integrated circuit |
JPH0622238B2 (ja) * | 1985-10-02 | 1994-03-23 | 沖電気工業株式会社 | バイポ−ラ型半導体集積回路装置の製造方法 |
JPS62290173A (ja) * | 1986-06-09 | 1987-12-17 | Oki Electric Ind Co Ltd | 半導体集積回路装置の製造方法 |
US4782030A (en) * | 1986-07-09 | 1988-11-01 | Kabushiki Kaisha Toshiba | Method of manufacturing bipolar semiconductor device |
JPS63107167A (ja) * | 1986-10-24 | 1988-05-12 | Oki Electric Ind Co Ltd | 半導体集積回路装置の製造方法 |
US4740478A (en) * | 1987-01-30 | 1988-04-26 | Motorola Inc. | Integrated circuit method using double implant doping |
US5067002A (en) * | 1987-01-30 | 1991-11-19 | Motorola, Inc. | Integrated circuit structures having polycrystalline electrode contacts |
US4837176A (en) * | 1987-01-30 | 1989-06-06 | Motorola Inc. | Integrated circuit structures having polycrystalline electrode contacts and process |
JPS63134885U (de) * | 1987-02-13 | 1988-09-05 | ||
GB2218565B (en) * | 1988-05-10 | 1992-04-01 | Stc Plc | Varicap diode structure |
US5236851A (en) * | 1988-07-14 | 1993-08-17 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating semiconductor devices |
JPH0226032A (ja) * | 1988-07-14 | 1990-01-29 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JPH0817180B2 (ja) * | 1989-06-27 | 1996-02-21 | 株式会社東芝 | 半導体装置の製造方法 |
JP3393544B2 (ja) * | 1997-02-26 | 2003-04-07 | シャープ株式会社 | 半導体装置の製造方法 |
JP2001217317A (ja) * | 2000-02-07 | 2001-08-10 | Sony Corp | 半導体装置およびその製造方法 |
DE202010000042U1 (de) | 2010-01-14 | 2010-06-02 | Papiersackfabrik Tenax Gmbh & Co. Kg | Ventilsack mit Entlüftungsvorrichtung |
DE202013102644U1 (de) | 2013-06-19 | 2013-07-24 | Papiersackfabrik Tenax Gmbh & Co. Kg | Ventilsack mit Entlüftungsvorrichtungen |
USD848384S1 (en) * | 2017-08-17 | 2019-05-14 | Epistar Corporation | Transistor |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1934820A1 (de) * | 1969-07-09 | 1971-01-14 | Siemens Ag | Verfahren zum Herstellen eines Germanium-Planartransistors |
US3686080A (en) * | 1971-07-21 | 1972-08-22 | Rca Corp | Method of fabrication of semiconductor devices |
JPS532129B2 (de) * | 1973-07-23 | 1978-01-25 | ||
US4054484A (en) * | 1975-10-23 | 1977-10-18 | Bell Telephone Laboratories, Incorporated | Method of forming crossover connections |
US4157269A (en) * | 1978-06-06 | 1979-06-05 | International Business Machines Corporation | Utilizing polysilicon diffusion sources and special masking techniques |
NL7900280A (nl) * | 1979-01-15 | 1980-07-17 | Philips Nv | Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan. |
US4309812A (en) * | 1980-03-03 | 1982-01-12 | International Business Machines Corporation | Process for fabricating improved bipolar transistor utilizing selective etching |
US4318751A (en) * | 1980-03-13 | 1982-03-09 | International Business Machines Corporation | Self-aligned process for providing an improved high performance bipolar transistor |
US4319932A (en) * | 1980-03-24 | 1982-03-16 | International Business Machines Corporation | Method of making high performance bipolar transistor with polysilicon base contacts |
US4381953A (en) * | 1980-03-24 | 1983-05-03 | International Business Machines Corporation | Polysilicon-base self-aligned bipolar transistor process |
US4322883A (en) * | 1980-07-08 | 1982-04-06 | International Business Machines Corporation | Self-aligned metal process for integrated injection logic integrated circuits |
FR2508704B1 (fr) * | 1981-06-26 | 1985-06-07 | Thomson Csf | Procede de fabrication de transistors bipolaires integres de tres petites dimensions |
JPS5946105B2 (ja) * | 1981-10-27 | 1984-11-10 | 日本電信電話株式会社 | バイポ−ラ型トランジスタ装置及びその製法 |
-
1981
- 1981-09-28 JP JP56151987A patent/JPS5866359A/ja active Granted
-
1982
- 1982-09-23 DE DE8282305023T patent/DE3274698D1/de not_active Expired
- 1982-09-23 EP EP82305023A patent/EP0076105B1/de not_active Expired
-
1985
- 1985-01-31 US US06/696,884 patent/US4590666A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0076105A2 (de) | 1983-04-06 |
JPS5866359A (ja) | 1983-04-20 |
EP0076105A3 (en) | 1984-08-01 |
US4590666A (en) | 1986-05-27 |
JPS6152584B2 (de) | 1986-11-13 |
EP0076105B1 (de) | 1986-12-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |