DE3278193D1 - Method for fabricating multilayer laminated printed circuit boards - Google Patents
Method for fabricating multilayer laminated printed circuit boardsInfo
- Publication number
- DE3278193D1 DE3278193D1 DE8282110815T DE3278193T DE3278193D1 DE 3278193 D1 DE3278193 D1 DE 3278193D1 DE 8282110815 T DE8282110815 T DE 8282110815T DE 3278193 T DE3278193 T DE 3278193T DE 3278193 D1 DE3278193 D1 DE 3278193D1
- Authority
- DE
- Germany
- Prior art keywords
- printed circuit
- circuit boards
- multilayer laminated
- laminated printed
- fabricating multilayer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/0152—Temporary metallic carrier, e.g. for transferring material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0726—Electroforming, i.e. electroplating on a metallic carrier thereby forming a self-supporting structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/325,614 US4354895A (en) | 1981-11-27 | 1981-11-27 | Method for making laminated multilayer circuit boards |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3278193D1 true DE3278193D1 (en) | 1988-04-07 |
Family
ID=23268632
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282110815T Expired DE3278193D1 (en) | 1981-11-27 | 1982-11-23 | Method for fabricating multilayer laminated printed circuit boards |
Country Status (4)
Country | Link |
---|---|
US (1) | US4354895A (de) |
EP (1) | EP0080689B1 (de) |
JP (1) | JPS5893399A (de) |
DE (1) | DE3278193D1 (de) |
Families Citing this family (46)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4421608A (en) * | 1982-03-01 | 1983-12-20 | International Business Machines Corporation | Method for stripping peel apart conductive structures |
CA1222574A (en) * | 1982-03-04 | 1987-06-02 | Economics Laboratory, Inc. | Method and apparatus for manufacturing multi layer printed circuit boards |
US4606787A (en) * | 1982-03-04 | 1986-08-19 | Etd Technology, Inc. | Method and apparatus for manufacturing multi layer printed circuit boards |
US4789423A (en) * | 1982-03-04 | 1988-12-06 | E. I. Du Pont De Nemours And Company | Method for manufacturing multi-layer printed circuit boards |
US4452664A (en) * | 1983-08-01 | 1984-06-05 | General Electric Company | Method for predetermining peel strength at copper/aluminum interface |
US4613313A (en) * | 1983-12-27 | 1986-09-23 | General Electric Company | Ionization detector |
US4613314A (en) * | 1983-12-27 | 1986-09-23 | General Electric Company | Ionization detector |
JPS60147192A (ja) * | 1984-01-11 | 1985-08-03 | 株式会社日立製作所 | プリント配線板の製造方法 |
US4628598A (en) * | 1984-10-02 | 1986-12-16 | The United States Of America As Represented By The Secretary Of The Air Force | Mechanical locking between multi-layer printed wiring board conductors and through-hole plating |
CA1283591C (en) * | 1985-08-26 | 1991-04-30 | Theron L. Ellis | Method for making a flush surface laminate for a multilayer circuit board |
US4927477A (en) * | 1985-08-26 | 1990-05-22 | International Business Machines Corporation | Method for making a flush surface laminate for a multilayer circuit board |
US4704791A (en) * | 1986-03-05 | 1987-11-10 | International Business Machines Corporation | Process for providing a landless through-hole connection |
US5324536A (en) * | 1986-04-28 | 1994-06-28 | Canon Kabushiki Kaisha | Method of forming a multilayered structure |
JPS63103075A (ja) * | 1986-10-14 | 1988-05-07 | エドワ−ド アドラ− | マイクロ樹枝状体配列を介して結合された金属層で被覆可能とされる表面を有する樹脂製品並びに該金属層被覆樹脂製品 |
US4812191A (en) * | 1987-06-01 | 1989-03-14 | Digital Equipment Corporation | Method of forming a multilevel interconnection device |
US4969257A (en) * | 1987-09-04 | 1990-11-13 | Shinko Electric Industries, Co., Ltd. | Transfer sheet and process for making a circuit substrate |
US4954200A (en) * | 1987-11-10 | 1990-09-04 | The General Electric Company | Method of making drill back-up material for small bore drilling of circuit boards |
US4816616A (en) * | 1987-12-10 | 1989-03-28 | Microelectronics Center Of North Carolina | Structure and method for isolated voltage referenced transmission lines of substrates with isolated reference planes |
US4985601A (en) * | 1989-05-02 | 1991-01-15 | Hagner George R | Circuit boards with recessed traces |
US5156716A (en) * | 1991-04-26 | 1992-10-20 | Olin Corporation | Process for the manufacture of a three layer tape for tape automated bonding |
US5234536A (en) * | 1991-04-26 | 1993-08-10 | Olin Corporation | Process for the manufacture of an interconnect circuit |
US5246538A (en) * | 1991-09-16 | 1993-09-21 | Phillips Petroleum Company | Adhesive bonding of poly(arylene sulfide) surfaces |
JP2856240B2 (ja) * | 1992-10-30 | 1999-02-10 | インターナショナル・ビジネス・マシーンズ・コーポレイション | プリント回路基板を再加工する方法 |
US5409567A (en) * | 1994-04-28 | 1995-04-25 | Motorola, Inc. | Method of etching copper layers |
EP2287897A3 (de) * | 1996-05-27 | 2011-11-02 | Dai Nippon Printing Co., Ltd. | Schaltelement für ein Halbleiterbauelement, Halbleiterbauelement damit und Verfahren zur Herstellung dieses Schaltelements und dieses Halbleiterbauelementes |
US5822856A (en) * | 1996-06-28 | 1998-10-20 | International Business Machines Corporation | Manufacturing circuit board assemblies having filled vias |
DE19829248A1 (de) * | 1998-06-30 | 2000-01-05 | Thomson Brandt Gmbh | Verfahren zur Herstellung eines elektrotechnischen Bauteiles |
US6946205B2 (en) * | 2002-04-25 | 2005-09-20 | Matsushita Electric Industrial Co., Ltd. | Wiring transfer sheet and method for producing the same, and wiring board and method for producing the same |
JP4125644B2 (ja) * | 2002-07-05 | 2008-07-30 | 松下電器産業株式会社 | 多層回路基板の形成方法および多層回路基板 |
WO2004014114A1 (ja) * | 2002-07-31 | 2004-02-12 | Sony Corporation | 素子内蔵基板の製造方法および素子内蔵基板、ならびに、プリント配線板の製造方法およびプリント配線板 |
US7282324B2 (en) * | 2004-01-05 | 2007-10-16 | Microchem Corp. | Photoresist compositions, hardened forms thereof, hardened patterns thereof and metal patterns formed using them |
KR20060045206A (ko) * | 2004-11-12 | 2006-05-17 | 삼성테크윈 주식회사 | 반도체기판 제조방법 |
KR100733253B1 (ko) | 2005-11-18 | 2007-06-27 | 삼성전기주식회사 | 고밀도 인쇄회로기판 및 그 제조방법 |
JP4697156B2 (ja) * | 2007-02-28 | 2011-06-08 | トヨタ自動車株式会社 | 回路基板の製造方法 |
TWI338562B (en) * | 2007-12-27 | 2011-03-01 | Unimicron Technology Corp | Circuit board and process thereof |
US20090273907A1 (en) * | 2008-04-30 | 2009-11-05 | Unimicron Technology Corp. | Circuit board and process thereof |
DE102009060480A1 (de) | 2009-12-18 | 2011-06-22 | Schweizer Electronic AG, 78713 | Leiterstrukturelement und Verfahren zum Herstellen eines Leiterstrukturelements |
US9398703B2 (en) | 2014-05-19 | 2016-07-19 | Sierra Circuits, Inc. | Via in a printed circuit board |
KR20160099381A (ko) * | 2015-02-12 | 2016-08-22 | 삼성전기주식회사 | 인쇄회로기판 및 인쇄회로기판의 제조 방법 |
JP2016207893A (ja) * | 2015-04-24 | 2016-12-08 | イビデン株式会社 | プリント配線板およびその製造方法 |
US9706650B1 (en) | 2016-08-18 | 2017-07-11 | Sierra Circuits, Inc. | Catalytic laminate apparatus and method |
US10849233B2 (en) | 2017-07-10 | 2020-11-24 | Catlam, Llc | Process for forming traces on a catalytic laminate |
US9922951B1 (en) | 2016-11-12 | 2018-03-20 | Sierra Circuits, Inc. | Integrated circuit wafer integration with catalytic laminate or adhesive |
US10349520B2 (en) | 2017-06-28 | 2019-07-09 | Catlam, Llc | Multi-layer circuit board using interposer layer and conductive paste |
US10765012B2 (en) | 2017-07-10 | 2020-09-01 | Catlam, Llc | Process for printed circuit boards using backing foil |
US10827624B2 (en) | 2018-03-05 | 2020-11-03 | Catlam, Llc | Catalytic laminate with conductive traces formed during lamination |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2666008A (en) * | 1950-08-03 | 1954-01-12 | Stromberg Carlson Co | Methods and apparatus for making conductive patterns of predetermined configuration |
US3042591A (en) * | 1957-05-20 | 1962-07-03 | Motorola Inc | Process for forming electrical conductors on insulating bases |
US3177103A (en) * | 1961-09-18 | 1965-04-06 | Sauders Associates Inc | Two pass etching for fabricating printed circuitry |
GB994852A (en) * | 1962-03-05 | 1965-06-10 | Garlock Inc | Improvements in or relating to insulated electric circuit assemblies |
US3324014A (en) * | 1962-12-03 | 1967-06-06 | United Carr Inc | Method for making flush metallic patterns |
DE1615961A1 (de) * | 1967-04-12 | 1970-06-25 | Degussa | Verfahren zur Herstellung von gedruckten Schaltungen |
US3688396A (en) * | 1969-10-13 | 1972-09-05 | Texas Instruments Inc | Circuit board process |
US3791858A (en) * | 1971-12-13 | 1974-02-12 | Ibm | Method of forming multi-layer circuit panels |
JPS55156395A (en) * | 1979-05-24 | 1980-12-05 | Fujitsu Ltd | Method of fabricating hollow multilayer printed board |
-
1981
- 1981-11-27 US US06/325,614 patent/US4354895A/en not_active Expired - Lifetime
-
1982
- 1982-08-20 JP JP57143551A patent/JPS5893399A/ja active Granted
- 1982-11-23 EP EP82110815A patent/EP0080689B1/de not_active Expired
- 1982-11-23 DE DE8282110815T patent/DE3278193D1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5893399A (ja) | 1983-06-03 |
US4354895A (en) | 1982-10-19 |
EP0080689A3 (en) | 1985-11-06 |
EP0080689B1 (de) | 1988-03-02 |
EP0080689A2 (de) | 1983-06-08 |
JPS6317359B2 (de) | 1988-04-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |