DE3376166D1 - Process for manufacturing an electrical resistor having a polycrystalline semiconductor material, and integrated circuit device comprising this resistor - Google Patents

Process for manufacturing an electrical resistor having a polycrystalline semiconductor material, and integrated circuit device comprising this resistor

Info

Publication number
DE3376166D1
DE3376166D1 DE8383401950T DE3376166T DE3376166D1 DE 3376166 D1 DE3376166 D1 DE 3376166D1 DE 8383401950 T DE8383401950 T DE 8383401950T DE 3376166 T DE3376166 T DE 3376166T DE 3376166 D1 DE3376166 D1 DE 3376166D1
Authority
DE
Germany
Prior art keywords
resistor
manufacturing
integrated circuit
semiconductor material
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383401950T
Other languages
English (en)
Inventor
Alain Boudou
Jean-Claude Marchetaux
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SA
Original Assignee
Bull SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SA filed Critical Bull SA
Application granted granted Critical
Publication of DE3376166D1 publication Critical patent/DE3376166D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20Resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3215Doping the layers
    • H01L21/32155Doping polycristalline - or amorphous silicon layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/15Static random access memory [SRAM] devices comprising a resistor load element
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/934Sheet resistance, i.e. dopant parameters
DE8383401950T 1982-10-07 1983-10-06 Process for manufacturing an electrical resistor having a polycrystalline semiconductor material, and integrated circuit device comprising this resistor Expired DE3376166D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8216803A FR2534415A1 (fr) 1982-10-07 1982-10-07 Procede de fabrication de resistances electriques dans un materiau semi-conducteur polycristallin et dispositif a circuits integres resultant

Publications (1)

Publication Number Publication Date
DE3376166D1 true DE3376166D1 (en) 1988-05-05

Family

ID=9278052

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383401950T Expired DE3376166D1 (en) 1982-10-07 1983-10-06 Process for manufacturing an electrical resistor having a polycrystalline semiconductor material, and integrated circuit device comprising this resistor

Country Status (5)

Country Link
US (1) US4916507A (de)
EP (1) EP0107556B1 (de)
JP (1) JPH0614532B2 (de)
DE (1) DE3376166D1 (de)
FR (1) FR2534415A1 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59152657A (ja) * 1983-02-18 1984-08-31 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 高シ−ト抵抗を有する多結晶シリコン層の形成方法
GB2182488A (en) * 1985-11-02 1987-05-13 Stc Plc Integrated circuit resistors
FR2602093B1 (fr) * 1985-12-27 1988-10-14 Bull Sa Procede de fabrication d'une resistance electrique par dopage d'un materiau semiconducteur et circuit integre en resultant
KR900005038B1 (ko) * 1987-07-31 1990-07-18 삼성전자 주식회사 고저항 다결정 실리콘의 제조방법
US5037766A (en) * 1988-12-06 1991-08-06 Industrial Technology Research Institute Method of fabricating a thin film polysilicon thin film transistor or resistor
JP3082923B2 (ja) * 1989-12-26 2000-09-04 ソニー株式会社 半導体装置の製法
US5068201A (en) * 1990-05-31 1991-11-26 Sgs-Thomson Microelectronics, Inc. Method for forming a high valued resistive load element and low resistance interconnect for integrated circuits
US5462894A (en) * 1991-08-06 1995-10-31 Sgs-Thomson Microelectronics, Inc. Method for fabricating a polycrystalline silicon resistive load element in an integrated circuit
US5182627A (en) * 1991-09-30 1993-01-26 Sgs-Thomson Microelectronics, Inc. Interconnect and resistor for integrated circuits
US5212108A (en) * 1991-12-13 1993-05-18 Honeywell Inc. Fabrication of stabilized polysilicon resistors for SEU control
IT1256362B (it) * 1992-08-19 1995-12-04 St Microelectronics Srl Processo di realizzazione su semiconduttori di regioni impiantate a basso rischio di channeling
US5318915A (en) * 1993-01-25 1994-06-07 North Carolina State University At Raleigh Method for forming a p-n junction in silicon carbide
US5322802A (en) * 1993-01-25 1994-06-21 North Carolina State University At Raleigh Method of fabricating silicon carbide field effect transistor
JP3180875B2 (ja) * 1994-04-01 2001-06-25 富士電機株式会社 絶縁ゲート型サイリスタ
US5543350A (en) * 1995-09-29 1996-08-06 Chartered Semiconductor Manufacturing Pte Ltd SRAM resistor tab doping by plug implant from buried contact
US6188136B1 (en) * 1996-06-26 2001-02-13 Kabushiki Kaisha Toshiba Semiconductor device including a wiring layer having a non-doped or high resistivity polycrystal silicon portion
KR100232206B1 (ko) * 1996-12-26 1999-12-01 김영환 반도체 소자의 제조방법
US6069398A (en) * 1997-08-01 2000-05-30 Advanced Micro Devices, Inc. Thin film resistor and fabrication method thereof
US5949092A (en) * 1997-08-01 1999-09-07 Advanced Micro Devices, Inc. Ultra-high-density pass gate using dual stacked transistors having a gate structure with planarized upper surface in relation to interlayer insulator
US5888853A (en) * 1997-08-01 1999-03-30 Advanced Micro Devices, Inc. Integrated circuit including a graded grain structure for enhanced transistor formation and fabrication method thereof
US7785979B2 (en) * 2008-07-15 2010-08-31 International Business Machines Corporation Integrated circuits comprising resistors having different sheet resistances and methods of fabricating the same
JP2012182488A (ja) * 2012-05-25 2012-09-20 Renesas Electronics Corp 半導体装置及び半導体装置の製造方法
US11637173B2 (en) * 2020-09-29 2023-04-25 Globalfoundries U.S. Inc. Structure including polycrystalline resistor with dopant-including polycrystalline region thereunder

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4416049A (en) * 1970-05-30 1983-11-22 Texas Instruments Incorporated Semiconductor integrated circuit with vertical implanted polycrystalline silicon resistor
AU464038B2 (en) * 1970-12-09 1975-08-14 Philips Nv Improvements in and relating to semiconductor devices
US3886587A (en) * 1973-07-19 1975-05-27 Harris Corp Isolated photodiode array
JPS5213788A (en) * 1975-07-23 1977-02-02 Hitachi Ltd Production method of semiconductor device
US4053925A (en) * 1975-08-07 1977-10-11 Ibm Corporation Method and structure for controllng carrier lifetime in semiconductor devices
US4110776A (en) * 1976-09-27 1978-08-29 Texas Instruments Incorporated Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer
JPS5552254A (en) * 1978-10-11 1980-04-16 Nec Corp Semiconductor device
GB2075781A (en) * 1979-09-27 1981-11-18 American Micro Syst Sample and hold circuit with offset cancellation
JPS5696850A (en) * 1979-12-30 1981-08-05 Fujitsu Ltd Semiconductor device and manufacture thereof
US4367580A (en) * 1980-03-21 1983-01-11 Texas Instruments Incorporated Process for making polysilicon resistors
US4432008A (en) * 1980-07-21 1984-02-14 The Board Of Trustees Of The Leland Stanford Junior University Gold-doped IC resistor region

Also Published As

Publication number Publication date
US4916507A (en) 1990-04-10
JPS5989452A (ja) 1984-05-23
FR2534415B1 (de) 1985-01-11
FR2534415A1 (fr) 1984-04-13
EP0107556A1 (de) 1984-05-02
EP0107556B1 (de) 1988-03-30
JPH0614532B2 (ja) 1994-02-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee