DE3379621D1 - Semiconductor integrated circuit device and a method for manufacturing the same - Google Patents

Semiconductor integrated circuit device and a method for manufacturing the same

Info

Publication number
DE3379621D1
DE3379621D1 DE8383111719T DE3379621T DE3379621D1 DE 3379621 D1 DE3379621 D1 DE 3379621D1 DE 8383111719 T DE8383111719 T DE 8383111719T DE 3379621 T DE3379621 T DE 3379621T DE 3379621 D1 DE3379621 D1 DE 3379621D1
Authority
DE
Germany
Prior art keywords
manufacturing
same
integrated circuit
semiconductor integrated
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383111719T
Other languages
English (en)
Inventor
Atsuo Watanabe
Takahide Ikeda
Kiyoshi Tsukuda
Mitsuru Hirao
Touji Mukai
Tatsuya Kamei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE3379621D1 publication Critical patent/DE3379621D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits
    • H01L27/11896Masterslice integrated circuits using combined field effect/bipolar technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248Combination of bipolar and field-effect technology
    • H01L21/8249Bipolar and MOS technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
DE8383111719T 1982-11-24 1983-11-23 Semiconductor integrated circuit device and a method for manufacturing the same Expired DE3379621D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57204671A JPS5994861A (ja) 1982-11-24 1982-11-24 半導体集積回路装置及びその製造方法

Publications (1)

Publication Number Publication Date
DE3379621D1 true DE3379621D1 (en) 1989-05-18

Family

ID=16494359

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383111719T Expired DE3379621D1 (en) 1982-11-24 1983-11-23 Semiconductor integrated circuit device and a method for manufacturing the same

Country Status (5)

Country Link
US (5) US4980744A (de)
EP (1) EP0110313B1 (de)
JP (1) JPS5994861A (de)
KR (1) KR900000817B1 (de)
DE (1) DE3379621D1 (de)

Families Citing this family (70)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5955052A (ja) * 1982-09-24 1984-03-29 Hitachi Ltd 半導体集積回路装置の製造方法
JPS5994861A (ja) * 1982-11-24 1984-05-31 Hitachi Ltd 半導体集積回路装置及びその製造方法
JPH0669142B2 (ja) * 1983-04-15 1994-08-31 株式会社日立製作所 半導体集積回路装置
JPS60101965A (ja) * 1983-11-08 1985-06-06 Iwatsu Electric Co Ltd 相補型電界効果トランジスタを有する集積回路
JPS60101963A (ja) * 1983-11-08 1985-06-06 Iwatsu Electric Co Ltd 相補型電界効果トランジスタの製造方法
JPS60124964A (ja) * 1983-12-12 1985-07-04 Fujitsu Ltd 半導体装置の製造方法
DE3474883D1 (en) * 1984-01-16 1988-12-01 Texas Instruments Inc Integrated circuit having bipolar and field effect devices and method of fabrication
JPS61127147A (ja) * 1984-11-26 1986-06-14 Hitachi Ltd 半導体装置
ATE41836T1 (de) * 1985-06-03 1989-04-15 Siemens Ag Verfahren zum gleichzeitigen herstellen von bipolaren und komplementaeren mos-transistoren auf einem gemeinsamen siliziumsubstrat.
EP0224712A3 (de) * 1985-11-01 1988-02-10 Texas Instruments Incorporated Integrierte Schaltung mit bipolaren und komplementären Metalloxid-Halbleitertransistoren
US4797372A (en) * 1985-11-01 1989-01-10 Texas Instruments Incorporated Method of making a merge bipolar and complementary metal oxide semiconductor transistor device
JPH0770606B2 (ja) * 1985-11-29 1995-07-31 株式会社日立製作所 半導体装置
US4737472A (en) * 1985-12-17 1988-04-12 Siemens Aktiengesellschaft Process for the simultaneous production of self-aligned bipolar transistors and complementary MOS transistors on a common silicon substrate
US4752589A (en) * 1985-12-17 1988-06-21 Siemens Aktiengesellschaft Process for the production of bipolar transistors and complementary MOS transistors on a common silicon substrate
JPS62291165A (ja) * 1986-06-11 1987-12-17 Nec Corp 半導体装置
EP0253724A1 (de) * 1986-07-16 1988-01-20 Fairchild Semiconductor Corporation Verfahren zur gleichzeitigen Herstellung von bipolaren und komplementären Feldeffekttransistoren mit einer minimalen Anzahl von Masken
JP2635961B2 (ja) * 1986-09-26 1997-07-30 株式会社日立製作所 半導体装置の製造方法
USRE34025E (en) * 1987-02-13 1992-08-11 Kabushiki Kaisha Toshiba Semiconductor device with isolation between MOSFET and control circuit
JPS63304657A (ja) * 1987-06-04 1988-12-12 Fujitsu Ltd 半導体装置の製造方法
US5093707A (en) * 1988-04-27 1992-03-03 Kabushiki Kaisha Toshiba Semiconductor device with bipolar and cmos transistors
JPH0817179B2 (ja) * 1989-03-14 1996-02-21 株式会社東芝 半導体装置およびその製造方法
JPH0348459A (ja) * 1989-04-26 1991-03-01 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US5218224A (en) * 1989-06-14 1993-06-08 Kabushiki Kaisha Toshiba Semiconductor device including inversion preventing layers having a plurality of impurity concentration peaks in direction of depth
US5129409A (en) * 1989-06-29 1992-07-14 R. J. Reynolds Tobacco Company Extruded cigarette
JP2611450B2 (ja) * 1989-08-30 1997-05-21 日本電気株式会社 半導体集積回路及びその製造方法
DE3935538A1 (de) * 1989-10-25 1991-05-02 Thomson Brandt Gmbh Mos-logik in bicmos-schaltkreisen
JP2609746B2 (ja) * 1990-07-19 1997-05-14 株式会社東芝 半導体装置
KR930006735B1 (ko) * 1991-02-28 1993-07-23 삼성전자 주식회사 바이씨모스장치의 제조방법
US5320974A (en) * 1991-07-25 1994-06-14 Matsushita Electric Industrial Co., Ltd. Method for making semiconductor transistor device by implanting punch through stoppers
CA2090918C (en) * 1992-03-25 2006-01-17 Robert Leonard Meiring Components for smoking articles and process for making same
KR0127282B1 (ko) * 1992-05-18 1998-04-02 도요다 요시또시 반도체 장치
US5369429A (en) * 1993-10-20 1994-11-29 Lasermaster Corporation Continuous ink refill system for disposable ink jet cartridges having a predetermined ink capacity
JPH0897163A (ja) 1994-07-28 1996-04-12 Hitachi Ltd 半導体ウエハの製造方法、半導体ウエハ、半導体集積回路装置の製造方法および半導体集積回路装置
US5889315A (en) * 1994-08-18 1999-03-30 National Semiconductor Corporation Semiconductor structure having two levels of buried regions
US6007190A (en) * 1994-12-29 1999-12-28 Encad, Inc. Ink supply system for an ink jet printer having large volume ink containers
US5686947A (en) 1995-05-03 1997-11-11 Encad, Inc. Ink jet printer incorporating high volume ink reservoirs
US5770883A (en) * 1995-09-19 1998-06-23 Nippondenso Co., Ltd. Semiconductor sensor with a built-in amplification circuit
JP2751891B2 (ja) * 1995-09-29 1998-05-18 日本電気株式会社 半導体集積回路
US5999153A (en) * 1996-03-22 1999-12-07 Lind; John Thomas Soft proofing display
US6396109B1 (en) * 1996-12-06 2002-05-28 Texas Instruments Incorporated Isolated NMOS transistor fabricated in a digital BiCMOS process
US6633069B2 (en) * 1997-05-20 2003-10-14 Kabushiki Kaisha Toshiba Semiconductor device
JP3419672B2 (ja) * 1997-12-19 2003-06-23 富士通株式会社 半導体装置及びその製造方法
US6137142A (en) * 1998-02-24 2000-10-24 Sun Microsystems, Inc. MOS device structure and method for reducing PN junction leakage
US6218708B1 (en) * 1998-02-25 2001-04-17 Sun Microsystems, Inc. Back-biased MOS device and method
US6225662B1 (en) 1998-07-28 2001-05-01 Philips Semiconductors, Inc. Semiconductor structure with heavily doped buried breakdown region
JP3223895B2 (ja) * 1998-12-15 2001-10-29 日本電気株式会社 半導体装置の製造方法
US6653708B2 (en) 2000-08-08 2003-11-25 Intersil Americas Inc. Complementary metal oxide semiconductor with improved single event performance
BR0113798A (pt) * 2000-09-11 2003-07-08 Pfizer Prod Inc Derivados de resorcinol
JP4447768B2 (ja) * 2000-12-01 2010-04-07 三菱電機株式会社 フィールドmosトランジスタおよびそれを含む半導体集積回路
US6794730B2 (en) * 2000-12-31 2004-09-21 Texas Instruments Incorporated High performance PNP bipolar device fully compatible with CMOS process
JP4676069B2 (ja) * 2001-02-07 2011-04-27 パナソニック株式会社 半導体装置の製造方法
US6531410B2 (en) * 2001-02-27 2003-03-11 International Business Machines Corporation Intrinsic dual gate oxide MOSFET using a damascene gate process
US6818494B1 (en) * 2001-03-26 2004-11-16 Hewlett-Packard Development Company, L.P. LDMOS and CMOS integrated circuit and method of making
US6831346B1 (en) 2001-05-04 2004-12-14 Cypress Semiconductor Corp. Buried layer substrate isolation in integrated circuits
JP4623885B2 (ja) * 2001-08-16 2011-02-02 ルネサスエレクトロニクス株式会社 半導体記憶装置
US7064416B2 (en) * 2001-11-16 2006-06-20 International Business Machines Corporation Semiconductor device and method having multiple subcollectors formed on a common wafer
US6664608B1 (en) 2001-11-30 2003-12-16 Sun Microsystems, Inc. Back-biased MOS device
US6624497B2 (en) * 2002-02-25 2003-09-23 Intersil Americas, Inc Semiconductor device with a reduced mask count buried layer
US7453705B2 (en) * 2002-05-07 2008-11-18 Alien Technology Corporation Barrier, such as a hermetic barrier layer for O/PLED and other electronic devices on plastic
US6630377B1 (en) * 2002-09-18 2003-10-07 Chartered Semiconductor Manufacturing Ltd. Method for making high-gain vertical bipolar junction transistor structures compatible with CMOS process
US6909164B2 (en) * 2002-11-25 2005-06-21 International Business Machines Corporation High performance vertical PNP transistor and method
US7759740B1 (en) * 2004-03-23 2010-07-20 Masleid Robert P Deep well regions for routing body-bias voltage to mosfets in surface well regions having separation wells of p-type between the segmented deep n wells
JPWO2006016403A1 (ja) * 2004-08-10 2008-05-01 富士通株式会社 半導体記憶装置
US7311389B1 (en) 2005-02-09 2007-12-25 Tarry Pidgeon Ink maintenance system for ink jet cartridges
JP2007165670A (ja) * 2005-12-15 2007-06-28 Matsushita Electric Ind Co Ltd 半導体回路装置およびその設計方法
US7439119B2 (en) * 2006-02-24 2008-10-21 Agere Systems Inc. Thermally stable BiCMOS fabrication method and bipolar junction transistors formed according to the method
JP5068057B2 (ja) * 2006-10-19 2012-11-07 三菱電機株式会社 半導体装置
US7700405B2 (en) * 2007-02-28 2010-04-20 Freescale Semiconductor, Inc. Microelectronic assembly with improved isolation voltage performance and a method for forming the same
US8129793B2 (en) * 2007-12-04 2012-03-06 Renesas Electronics Corporation Semiconductor integrated device and manufacturing method for the same
TWI629785B (zh) * 2016-12-29 2018-07-11 新唐科技股份有限公司 高電壓積體電路的高電壓終端結構

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3930909A (en) * 1966-10-21 1976-01-06 U.S. Philips Corporation Method of manufacturing a semiconductor device utilizing simultaneous outdiffusion during epitaxial growth
NL145396B (nl) * 1966-10-21 1975-03-17 Philips Nv Werkwijze ter vervaardiging van een geintegreerde halfgeleiderinrichting en geintegreerde halfgeleiderinrichting, vervaardigd volgens de werkwijze.
JPS5123432B2 (de) * 1971-08-26 1976-07-16
US3935040A (en) * 1971-10-20 1976-01-27 Harris Corporation Process for forming monolithic semiconductor display
US4203126A (en) * 1975-11-13 1980-05-13 Siliconix, Inc. CMOS structure and method utilizing retarded electric field for minimum latch-up
JPS5846863B2 (ja) * 1977-08-25 1983-10-19 松下電器産業株式会社 半導体集積回路装置
JPS5493981A (en) * 1978-01-09 1979-07-25 Toshiba Corp Semiconductor device
DE2838928A1 (de) * 1978-09-07 1980-03-20 Ibm Deutschland Verfahren zum dotieren von siliciumkoerpern mit bor
US4258379A (en) * 1978-09-25 1981-03-24 Hitachi, Ltd. IIL With in and outdiffused emitter pocket
JPS5644189A (en) * 1979-09-19 1981-04-23 Hitachi Ltd Semiconductor memory
NL186662C (nl) * 1980-04-29 1992-03-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
JPS5730359A (en) * 1980-07-30 1982-02-18 Nec Corp Semiconductor device
JPS5775453A (en) * 1980-10-29 1982-05-12 Fujitsu Ltd Semiconductor device and manufacture thereof
US4684971A (en) * 1981-03-13 1987-08-04 American Telephone And Telegraph Company, At&T Bell Laboratories Ion implanted CMOS devices
JPS57186353A (en) * 1981-05-12 1982-11-16 Seiko Epson Corp Complementary metal oxide semiconductor type semiconductor device
JPS57188862A (en) * 1981-05-18 1982-11-19 Hitachi Ltd Semiconductor integrated circuit device
JPS5842250A (ja) * 1981-09-07 1983-03-11 Nec Corp 半導体装置およびその製造方法
US4528581A (en) * 1981-10-21 1985-07-09 Hughes Aircraft Company High density CMOS devices with conductively interconnected wells
NL8104862A (nl) * 1981-10-28 1983-05-16 Philips Nv Halfgeleiderinrichting, en werkwijze ter vervaardiging daarvan.
DE3149185A1 (de) * 1981-12-11 1983-06-23 Siemens AG, 1000 Berlin und 8000 München Verfahren zur herstellung benachbarter mit dotierstoffionen implantierter wannen bei der herstellung von hochintegrierten komplementaeren mos-feldeffekttransistorschaltungen
US4435895A (en) * 1982-04-05 1984-03-13 Bell Telephone Laboratories, Incorporated Process for forming complementary integrated circuit devices
JPS58225663A (ja) * 1982-06-23 1983-12-27 Toshiba Corp 半導体装置の製造方法
JPH0783252B2 (ja) * 1982-07-12 1995-09-06 株式会社日立製作所 半導体集積回路装置
JPS5955052A (ja) * 1982-09-24 1984-03-29 Hitachi Ltd 半導体集積回路装置の製造方法
DE3240778A1 (de) * 1982-11-04 1984-05-10 Siemens AG, 1000 Berlin und 8000 München Elektronischer schalter
JPS5994861A (ja) * 1982-11-24 1984-05-31 Hitachi Ltd 半導体集積回路装置及びその製造方法
US4510676A (en) * 1983-12-06 1985-04-16 International Business Machines, Corporation Method of fabricating a lateral PNP transistor
US4571275A (en) * 1983-12-19 1986-02-18 International Business Machines Corporation Method for minimizing autodoping during epitaxial deposition utilizing a graded pattern subcollector

Also Published As

Publication number Publication date
KR840006872A (ko) 1984-12-03
EP0110313A3 (en) 1986-02-05
US4921811A (en) 1990-05-01
US5672897A (en) 1997-09-30
US5508549A (en) 1996-04-16
US4980744A (en) 1990-12-25
EP0110313A2 (de) 1984-06-13
JPS5994861A (ja) 1984-05-31
KR900000817B1 (en) 1990-02-17
EP0110313B1 (de) 1989-04-12
JPH058583B2 (de) 1993-02-02
US5049967A (en) 1991-09-17

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