DE3477448D1 - Complementary mos circuit - Google Patents

Complementary mos circuit

Info

Publication number
DE3477448D1
DE3477448D1 DE8484100033T DE3477448T DE3477448D1 DE 3477448 D1 DE3477448 D1 DE 3477448D1 DE 8484100033 T DE8484100033 T DE 8484100033T DE 3477448 T DE3477448 T DE 3477448T DE 3477448 D1 DE3477448 D1 DE 3477448D1
Authority
DE
Germany
Prior art keywords
complementary mos
mos circuit
circuit
complementary
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8484100033T
Other languages
English (en)
Inventor
Yukimasa Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3477448D1 publication Critical patent/DE3477448D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205Substrate bias-voltage generators
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
DE8484100033T 1983-02-21 1984-01-03 Complementary mos circuit Expired DE3477448D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58027470A JPS59153331A (ja) 1983-02-21 1983-02-21 半導体装置

Publications (1)

Publication Number Publication Date
DE3477448D1 true DE3477448D1 (de) 1989-04-27

Family

ID=12221993

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484100033T Expired DE3477448D1 (de) 1983-02-21 1984-01-03 Complementary mos circuit

Country Status (4)

Country Link
US (1) US4837460A (de)
EP (1) EP0116820B1 (de)
JP (1) JPS59153331A (de)
DE (1) DE3477448D1 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0754628B2 (ja) * 1985-09-30 1995-06-07 株式会社東芝 半導体装置
USRE40132E1 (en) 1988-06-17 2008-03-04 Elpida Memory, Inc. Large scale integrated circuit with sense amplifier circuits for low voltage operation
JP2569777B2 (ja) * 1988-12-16 1997-01-08 日本電気株式会社 入力信号切り換え回路
US5079441A (en) * 1988-12-19 1992-01-07 Texas Instruments Incorporated Integrated circuit having an internal reference circuit to supply internal logic circuits with a reduced voltage
US4958086A (en) * 1989-05-08 1990-09-18 Motorola, Inc. Low di/dt output buffer with improved speed
US5128560A (en) * 1991-03-22 1992-07-07 Micron Technology, Inc. Boosted supply output driver circuit for driving an all N-channel output stage
US5160855A (en) * 1991-06-28 1992-11-03 Digital Equipment Corporation Floating-well CMOS output driver
CN1075690C (zh) * 1991-11-07 2001-11-28 摩托罗拉公司 混合信号处理系统及其供电方法
JP2914408B2 (ja) * 1991-11-29 1999-06-28 富士電機株式会社 高耐圧集積回路
DE69328743T2 (de) * 1992-03-30 2000-09-07 Mitsubishi Electric Corp Halbleiteranordnung
US5329184A (en) * 1992-11-05 1994-07-12 National Semiconductor Corporation Method and apparatus for feedback control of I/O characteristics of digital interface circuits
US5371419A (en) * 1992-11-23 1994-12-06 Mitsubishi Denki Kabushiki Kaisha CMOS well switching circuit
EP0602268A1 (de) * 1992-12-16 1994-06-22 Landis & Gyr Business Support AG Integrierte Schaltung mit Feldeffekt-Transistoren
US5338978A (en) * 1993-02-10 1994-08-16 National Semiconductor Corporation Full swing power down buffer circuit with multiple power supply isolation
WO1995019046A1 (en) * 1994-01-10 1995-07-13 Carnegie Mellon University Four rail circuit architecture for ultra-low power and voltage cmos circuit design
US5814845A (en) * 1995-01-10 1998-09-29 Carnegie Mellon University Four rail circuit architecture for ultra-low power and voltage CMOS circuit design
GB2300531A (en) * 1995-05-02 1996-11-06 Plessey Semiconductors Ltd Reduced swing CMOS output buffer
JPH0974347A (ja) * 1995-06-26 1997-03-18 Mitsubishi Electric Corp Mos集積回路
JP4036487B2 (ja) * 1995-08-18 2008-01-23 株式会社ルネサステクノロジ 半導体記憶装置、および半導体回路装置
GB2349999B (en) * 1996-05-28 2001-01-31 Altera Corp Techniques of fabricating integrated circuits having interfaces compatible with different operating voltage conditions
US6147511A (en) 1996-05-28 2000-11-14 Altera Corporation Overvoltage-tolerant interface for integrated circuits
US6025737A (en) * 1996-11-27 2000-02-15 Altera Corporation Circuitry for a low internal voltage integrated circuit
US6175952B1 (en) 1997-05-27 2001-01-16 Altera Corporation Technique of fabricating integrated circuits having interfaces compatible with different operating voltage conditions
JP3266527B2 (ja) * 1996-12-10 2002-03-18 富士通株式会社 出力ドライバ回路及び半導体装置
JP3732914B2 (ja) 1997-02-28 2006-01-11 株式会社ルネサステクノロジ 半導体装置
US6239612B1 (en) 1997-08-20 2001-05-29 Altera Corporation Programmable I/O cells with multiple drivers
TW462143B (en) * 1997-09-11 2001-11-01 Mitsubishi Electric Corp Semiconductor integrated circuit
US6087885A (en) * 1997-09-11 2000-07-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device allowing fast and stable transmission of signals
JP3542476B2 (ja) * 1997-12-01 2004-07-14 三菱電機株式会社 Soi構造のcmos回路
US5988819A (en) * 1998-02-17 1999-11-23 Maxim Integrated Products, Inc. Single output transistor output stage for interface applications
US6366061B1 (en) 1999-01-13 2002-04-02 Carnegie Mellon University Multiple power supply circuit architecture
US6680650B2 (en) * 2001-01-12 2004-01-20 Broadcom Corporation MOSFET well biasing scheme that migrates body effect
US20080166524A1 (en) * 2007-01-02 2008-07-10 Polyworks, Inc. Thermoformed cushioning material and method of making
US7868667B2 (en) * 2008-03-26 2011-01-11 Hynix Semiconductor Inc. Output driving device
KR101699033B1 (ko) * 2009-11-30 2017-01-24 에스케이하이닉스 주식회사 출력 드라이버
EP2953524B1 (de) 2013-02-06 2018-08-01 Freenome Holdings Inc. Systeme und verfahren für frühe krankheitserkennung und echtzeitüberwachung von krankheiten

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3855549A (en) * 1973-08-24 1974-12-17 Rca Corp Circuit, such as cmos crystal oscillator, with reduced power consumption
US4006491A (en) * 1975-05-15 1977-02-01 Motorola, Inc. Integrated circuit having internal main supply voltage regulator
US4209713A (en) * 1975-07-18 1980-06-24 Tokyo Shibaura Electric Co., Ltd. Semiconductor integrated circuit device in which difficulties caused by parasitic transistors are eliminated
US4039869A (en) * 1975-11-28 1977-08-02 Rca Corporation Protection circuit
JPS5318377A (en) * 1976-08-03 1978-02-20 Toshiba Corp Logical operation circuit
JPS5323555A (en) * 1976-08-17 1978-03-04 Nec Corp Complemen tary mos integrated circuit
JPS5935217B2 (ja) * 1977-03-31 1984-08-27 シャープ株式会社 C−mos回路
JPS6042621B2 (ja) * 1977-03-31 1985-09-24 株式会社東芝 Mos集積回路装置
JPS54159158A (en) * 1978-06-06 1979-12-15 Nec Corp Field effect transistor circuit
JPS5516539A (en) * 1978-07-20 1980-02-05 Nec Corp Level shifter circuit
JPS5591861A (en) * 1978-12-29 1980-07-11 Fujitsu Ltd Cmos logic circuit
JPS582061B2 (ja) * 1980-03-05 1983-01-13 株式会社新潟鐵工所 多成分液状プラスチツク原料混合装置の原料供給装置
US4482985A (en) * 1981-04-17 1984-11-13 Hitachi, Ltd. Semiconductor integrated circuit
JPS582061A (ja) * 1981-06-26 1983-01-07 Seiko Epson Corp Cmos集積回路
JPS5882560A (ja) * 1981-11-11 1983-05-18 Oki Electric Ind Co Ltd Cmos集積回路
US4585955B1 (en) * 1982-12-15 2000-11-21 Tokyo Shibaura Electric Co Internally regulated power voltage circuit for mis semiconductor integrated circuit

Also Published As

Publication number Publication date
EP0116820B1 (de) 1989-03-22
EP0116820A2 (de) 1984-08-29
JPS59153331A (ja) 1984-09-01
EP0116820A3 (en) 1986-06-25
JPH0412649B2 (de) 1992-03-05
US4837460A (en) 1989-06-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)