DE3479697D1 - A re-programmable pla - Google Patents
A re-programmable plaInfo
- Publication number
- DE3479697D1 DE3479697D1 DE8484100234T DE3479697T DE3479697D1 DE 3479697 D1 DE3479697 D1 DE 3479697D1 DE 8484100234 T DE8484100234 T DE 8484100234T DE 3479697 T DE3479697 T DE 3479697T DE 3479697 D1 DE3479697 D1 DE 3479697D1
- Authority
- DE
- Germany
- Prior art keywords
- programmable pla
- pla
- programmable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
- H03K19/17712—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays one of the matrices at least being reprogrammable
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/457,175 US4508977A (en) | 1983-01-11 | 1983-01-11 | Re-programmable PLA |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3479697D1 true DE3479697D1 (de) | 1989-10-12 |
Family
ID=23815735
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8484100234T Expired DE3479697D1 (de) | 1983-01-11 | 1984-01-11 | A re-programmable pla |
Country Status (6)
Country | Link |
---|---|
US (1) | US4508977A (de) |
EP (1) | EP0122363B1 (de) |
JP (1) | JPS59152729A (de) |
DE (1) | DE3479697D1 (de) |
HK (1) | HK77992A (de) |
SG (1) | SG75392G (de) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6021628A (ja) * | 1983-07-15 | 1985-02-04 | Ricoh Co Ltd | プログラマブルロジツクアレイ |
USRE34363E (en) * | 1984-03-12 | 1993-08-31 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
US4870302A (en) * | 1984-03-12 | 1989-09-26 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
US4774421A (en) * | 1984-05-03 | 1988-09-27 | Altera Corporation | Programmable logic array device using EPROM technology |
GB2171231B (en) * | 1985-02-14 | 1989-11-01 | Intel Corp | Software programmable logic array |
US4787047A (en) * | 1985-03-22 | 1988-11-22 | Intersil | Electrically erasable fused programmable logic array |
JPS61192435U (de) * | 1985-05-23 | 1986-11-29 | ||
US4763020B1 (en) * | 1985-09-06 | 1997-07-08 | Ricoh Kk | Programmable logic device having plural programmable function cells |
US4876640A (en) * | 1986-02-07 | 1989-10-24 | Advanced Micro Devices, Inc. | Logic controller having programmable logic "and" array using a programmable gray-code counter |
US4687959A (en) * | 1986-03-27 | 1987-08-18 | Motorola, Inc. | Method and apparatus for access to a PLA |
US4791603A (en) * | 1986-07-18 | 1988-12-13 | Honeywell Inc. | Dynamically reconfigurable array logic |
US4730130A (en) * | 1987-01-05 | 1988-03-08 | Motorola, Inc. | Writable array logic |
JPS63272121A (ja) * | 1987-04-30 | 1988-11-09 | Oki Electric Ind Co Ltd | ゲ−トアレイ |
JPH0611113B2 (ja) * | 1988-01-14 | 1994-02-09 | 川崎製鉄株式会社 | プログラマブル論理素子 |
EP0469393B1 (de) * | 1990-07-30 | 1999-10-06 | Texas Instruments Incorporated | Statisches Speicherfeld mit wahlfreiem Zugriff, welches mindestens eine arithmetisch-logische Einheit enthält |
WO1994022142A1 (en) * | 1993-03-17 | 1994-09-29 | Zycad Corporation | Random access memory (ram) based configurable arrays |
DE19860390A1 (de) * | 1998-12-28 | 2000-06-29 | Deutsche Telekom Ag | Programmierbarer Logikbaustein und Verfahren zur Dekodierung von Daten |
US8661394B1 (en) | 2008-09-24 | 2014-02-25 | Iowa State University Research Foundation, Inc. | Depth-optimal mapping of logic chains in reconfigurable fabrics |
US8438522B1 (en) | 2008-09-24 | 2013-05-07 | Iowa State University Research Foundation, Inc. | Logic element architecture for generic logic chains in programmable devices |
WO2012085627A1 (en) | 2010-12-23 | 2012-06-28 | Universitat Politecnica De Catalunya | Method for operating a transistor, reconfigurable processing architecture and use of a restored broken down transistor for a multiple mode operation |
US9705501B2 (en) * | 2014-10-01 | 2017-07-11 | Maxim Integrated Products, Inc. | Systems and methods for enhancing confidentiality via logic gate encryption |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1203526A (en) * | 1968-04-30 | 1970-08-26 | Int Standard Electric Corp | Electronic multiselectors |
JPS5169908A (en) * | 1974-12-16 | 1976-06-17 | Hitachi Ltd | Tsuwaromono seigyohoshiki |
US3987286A (en) * | 1974-12-20 | 1976-10-19 | International Business Machines Corporation | Time split array logic element and method of operation |
US4177452A (en) * | 1978-06-05 | 1979-12-04 | International Business Machines Corporation | Electrically programmable logic array |
US4415818A (en) * | 1979-01-16 | 1983-11-15 | Nippon Telegraph & Telephone Corp. | Programmable sequential logic circuit devices |
JPS5691534A (en) * | 1979-12-26 | 1981-07-24 | Nec Corp | Array logic circuit |
DE3015992A1 (de) * | 1980-04-25 | 1981-11-05 | Ibm Deutschland Gmbh, 7000 Stuttgart | Programmierbare logische anordnung |
JPS57129537A (en) * | 1981-02-05 | 1982-08-11 | Toshiba Corp | Programmable array circuit |
US4422072A (en) * | 1981-07-30 | 1983-12-20 | Signetics Corporation | Field programmable logic array circuit |
US4442508A (en) * | 1981-08-05 | 1984-04-10 | General Instrument Corporation | Storage cells for use in two conductor data column storage logic arrays |
-
1983
- 1983-01-11 US US06/457,175 patent/US4508977A/en not_active Expired - Lifetime
-
1984
- 1984-01-10 JP JP59003344A patent/JPS59152729A/ja active Pending
- 1984-01-11 EP EP84100234A patent/EP0122363B1/de not_active Expired
- 1984-01-11 DE DE8484100234T patent/DE3479697D1/de not_active Expired
-
1992
- 1992-07-23 SG SG753/92A patent/SG75392G/en unknown
- 1992-10-15 HK HK779/92A patent/HK77992A/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0122363B1 (de) | 1989-09-06 |
EP0122363A2 (de) | 1984-10-24 |
HK77992A (en) | 1992-10-23 |
US4508977A (en) | 1985-04-02 |
SG75392G (en) | 1992-10-02 |
EP0122363A3 (en) | 1986-05-07 |
JPS59152729A (ja) | 1984-08-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |