DE3481879D1 - Doppeltor-speicheranordnung. - Google Patents

Doppeltor-speicheranordnung.

Info

Publication number
DE3481879D1
DE3481879D1 DE8484111609T DE3481879T DE3481879D1 DE 3481879 D1 DE3481879 D1 DE 3481879D1 DE 8484111609 T DE8484111609 T DE 8484111609T DE 3481879 T DE3481879 T DE 3481879T DE 3481879 D1 DE3481879 D1 DE 3481879D1
Authority
DE
Germany
Prior art keywords
storage arrangement
double gate
gate storage
double
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484111609T
Other languages
English (en)
Inventor
Shoji Ishimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3481879D1 publication Critical patent/DE3481879D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
DE8484111609T 1983-09-29 1984-09-28 Doppeltor-speicheranordnung. Expired - Lifetime DE3481879D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58181092A JPS6072020A (ja) 1983-09-29 1983-09-29 デュアルポ−トメモリ回路

Publications (1)

Publication Number Publication Date
DE3481879D1 true DE3481879D1 (de) 1990-05-10

Family

ID=16094683

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484111609T Expired - Lifetime DE3481879D1 (de) 1983-09-29 1984-09-28 Doppeltor-speicheranordnung.

Country Status (4)

Country Link
US (1) US4633441A (de)
EP (1) EP0135940B1 (de)
JP (1) JPS6072020A (de)
DE (1) DE3481879D1 (de)

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US4821226A (en) * 1987-01-30 1989-04-11 Rca Licensing Corporation Dual port video memory system having a bit-serial address input port
US4891795A (en) * 1987-05-21 1990-01-02 Texas Instruments Incorporated Dual-port memory having pipelined serial output
JPS63300491A (ja) * 1987-05-29 1988-12-07 Nec Corp メモリ装置
US4774587A (en) * 1987-06-02 1988-09-27 Eastman Kodak Company Still video transceiver processor
US4772956A (en) * 1987-06-02 1988-09-20 Eastman Kodak Company Dual block still video compander processor
JP2598916B2 (ja) * 1987-08-14 1997-04-09 シャープ株式会社 描画装置
JPH0748301B2 (ja) * 1987-12-04 1995-05-24 富士通株式会社 半導体記憶装置
US5587962A (en) * 1987-12-23 1996-12-24 Texas Instruments Incorporated Memory circuit accommodating both serial and random access including an alternate address buffer register
US5093807A (en) * 1987-12-23 1992-03-03 Texas Instruments Incorporated Video frame storage system
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US5200925A (en) * 1988-07-29 1993-04-06 Mitsubishi Denki Kabushiki Kaisha Serial access semiconductor memory device and operating method therefor
US5267200A (en) * 1988-08-31 1993-11-30 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device and operating method thereof with transfer transistor used as a holding means
JP2659228B2 (ja) * 1988-09-20 1997-09-30 富士通株式会社 半導体メモリ
DE68925772T2 (de) * 1988-09-29 1996-10-10 Nec Corp In einem Mikrocomputersystem benutzter Programm-Daten-Speicher
US5166903A (en) * 1988-10-25 1992-11-24 International Business Machines Corporation Memory organization with arrays having an alternate data port facility
US5150328A (en) * 1988-10-25 1992-09-22 Internation Business Machines Corporation Memory organization with arrays having an alternate data port facility
US5150327A (en) * 1988-10-31 1992-09-22 Matsushita Electric Industrial Co., Ltd. Semiconductor memory and video signal processing circuit having the same
US5222043A (en) * 1989-06-29 1993-06-22 Siemens Aktiengesellschaft Circuit configuration for identification of integrated semiconductor circuitries
JP3061060B2 (ja) * 1989-09-05 2000-07-10 株式会社東芝 マルチポートメモリ
JPH03237680A (ja) * 1990-02-13 1991-10-23 Mitsubishi Electric Corp 半導体メモリ装置
GB2245463A (en) * 1990-06-18 1992-01-02 Rank Cintel Ltd Generating graphic images with run length encoded data
JP3179792B2 (ja) * 1990-07-04 2001-06-25 三菱電機株式会社 マルチ・ポート・ランダム・アクセス・メモリ
KR100214435B1 (ko) * 1990-07-25 1999-08-02 사와무라 시코 동기식 버스트 엑세스 메모리
JP2715004B2 (ja) * 1991-01-07 1998-02-16 三菱電機株式会社 半導体メモリ装置
US5224072A (en) * 1991-04-04 1993-06-29 Oki Electric Industry Co., Ltd. Read-only memory with few programming signal lines
JP3158286B2 (ja) * 1991-04-30 2001-04-23 ソニー株式会社 マルチポートメモリ
JPH05182454A (ja) * 1991-06-25 1993-07-23 Mitsubishi Electric Corp デュアルポートメモリ装置
US5325338A (en) * 1991-09-04 1994-06-28 Advanced Micro Devices, Inc. Dual port memory, such as used in color lookup tables for video systems
KR960006284B1 (ko) * 1991-10-03 1996-05-13 니뽄 덴끼 가부시끼가이샤 듀얼 포트 반도체 기억장치
US5315388A (en) * 1991-11-19 1994-05-24 General Instrument Corporation Multiple serial access memory for use in feedback systems such as motion compensated television
US5581279A (en) * 1991-12-23 1996-12-03 Cirrus Logic, Inc. VGA controller circuitry
US5900856A (en) * 1992-03-05 1999-05-04 Seiko Epson Corporation Matrix display apparatus, matrix display control apparatus, and matrix display drive apparatus
JP3582082B2 (ja) 1992-07-07 2004-10-27 セイコーエプソン株式会社 マトリクス型表示装置，マトリクス型表示制御装置及びマトリクス型表示駆動装置
JPH05274862A (ja) * 1992-03-24 1993-10-22 Mitsubishi Electric Corp 半導体メモリ装置
EP0573800B1 (de) * 1992-06-09 1997-10-15 Siemens Aktiengesellschaft Integrierte Halbleiterspeicheranordnung
DE59307527D1 (de) * 1992-06-09 1997-11-20 Siemens Ag Integrierte Halbleiterspeicheranordnung
US5432743A (en) * 1992-06-30 1995-07-11 Nec Corporation Semiconductor dynamic RAM for image processing
US5590307A (en) * 1993-01-05 1996-12-31 Sgs-Thomson Microelectronics, Inc. Dual-port data cache memory
US5369617A (en) * 1993-12-21 1994-11-29 Intel Corporation High speed memory interface for video teleconferencing applications
EP1278178A3 (de) 1994-11-17 2003-03-05 Seiko Epson Corporation Anzeigevorrichtung und elektronisches Gerät
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US5715197A (en) 1996-07-29 1998-02-03 Xilinx, Inc. Multiport RAM with programmable data port configuration
JP2000122919A (ja) * 1998-10-13 2000-04-28 Mitsubishi Electric Corp プロセッサ及びメモリ制御方法
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US6222793B1 (en) 2000-06-06 2001-04-24 Intergrated Device Technology, Inc. Memory devices having a restore start address counter
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JPS51147225A (en) * 1975-06-13 1976-12-17 Hitachi Ltd Semiconductor memory
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US4161035A (en) * 1977-10-31 1979-07-10 Israel Electro-Optical Industry Ltd. Circuitry for displaying a constantly changing M-mode output on a raster scan display
US4120048A (en) * 1977-12-27 1978-10-10 Rockwell International Corporation Memory with simultaneous sequential and random address modes
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US4347587A (en) * 1979-11-23 1982-08-31 Texas Instruments Incorporated Semiconductor integrated circuit memory device with both serial and random access arrays
JPS5727477A (en) * 1980-07-23 1982-02-13 Nec Corp Memory circuit
US4344156A (en) * 1980-10-10 1982-08-10 Inmos Corporation High speed data transfer for a semiconductor memory

Also Published As

Publication number Publication date
EP0135940A2 (de) 1985-04-03
JPH0325870B2 (de) 1991-04-09
US4633441A (en) 1986-12-30
JPS6072020A (ja) 1985-04-24
EP0135940B1 (de) 1990-04-04
EP0135940A3 (en) 1986-10-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP