DE3486144D1 - Verfahren zur herstellung einer halbleiteranordnung. - Google Patents

Verfahren zur herstellung einer halbleiteranordnung.

Info

Publication number
DE3486144D1
DE3486144D1 DE8484102143T DE3486144T DE3486144D1 DE 3486144 D1 DE3486144 D1 DE 3486144D1 DE 8484102143 T DE8484102143 T DE 8484102143T DE 3486144 T DE3486144 T DE 3486144T DE 3486144 D1 DE3486144 D1 DE 3486144D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor arrangement
semiconductor
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8484102143T
Other languages
English (en)
Other versions
DE3486144T2 (de
Inventor
Kazuo Nakazato
Tohru Nakamura
Takao Miyazaki
Nobuyoshi Natsuaki
Masahiko Ogirima
Minoru Nagata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE3486144D1 publication Critical patent/DE3486144D1/de
Application granted granted Critical
Publication of DE3486144T2 publication Critical patent/DE3486144T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/732—Vertical transistors
    • H01L29/7325—Vertical transistors having an emitter-base junction leaving at a main surface and a base-collector junction leaving at a peripheral surface of the body, e.g. mesa planar transistor
DE8484102143T 1983-03-07 1984-02-29 Verfahren zur herstellung einer halbleiteranordnung. Expired - Fee Related DE3486144T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58035815A JPS59161867A (ja) 1983-03-07 1983-03-07 半導体装置

Publications (2)

Publication Number Publication Date
DE3486144D1 true DE3486144D1 (de) 1993-06-17
DE3486144T2 DE3486144T2 (de) 1993-09-09

Family

ID=12452424

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484102143T Expired - Fee Related DE3486144T2 (de) 1983-03-07 1984-02-29 Verfahren zur herstellung einer halbleiteranordnung.

Country Status (6)

Country Link
US (1) US4819055A (de)
EP (1) EP0118102B1 (de)
JP (1) JPS59161867A (de)
KR (1) KR910006699B1 (de)
CA (1) CA1202430A (de)
DE (1) DE3486144T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5227660A (en) * 1987-11-09 1993-07-13 Hitachi, Ltd. Semiconductor device
KR920004366B1 (ko) * 1989-09-08 1992-06-04 현대전자산업 주식회사 반도체 장치의 자기 정렬 콘택 제조방법
DE58909837D1 (de) * 1989-09-22 1998-09-17 Siemens Ag Verfahren zur Herstellung eines Bipolartransistors mit verminderter Basis/Kollektor-Kapazität
DE58909884D1 (de) * 1989-09-22 2002-02-14 Infineon Technologies Ag CMOS-kompatibler Bipolartransistor mit verringerter Kollektor/Substrat-Kapazität und Verfahren zu dessen Herstellung
US5217909A (en) * 1990-07-18 1993-06-08 Siemens Aktiengesellschaft Method for manufacturing a bipolar transistor
SE513512C2 (sv) * 1994-10-31 2000-09-25 Ericsson Telefon Ab L M Halvledaranordning med ett flytande kollektorområde
US5631495A (en) * 1994-11-29 1997-05-20 International Business Machines Corporation High performance bipolar devices with plurality of base contact regions formed around the emitter layer
JP4671728B2 (ja) * 2005-03-25 2011-04-20 三洋電機株式会社 半導体レーザ装置および光ピックアップ装置
US7342293B2 (en) * 2005-12-05 2008-03-11 International Business Machines Corporation Bipolar junction transistors (BJTS) with second shallow trench isolation (STI) regions, and methods for forming same

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3600651A (en) * 1969-12-08 1971-08-17 Fairchild Camera Instr Co Bipolar and field-effect transistor using polycrystalline epitaxial deposited silicon
US3796613A (en) * 1971-06-18 1974-03-12 Ibm Method of forming dielectric isolation for high density pedestal semiconductor devices
JPS5533051A (en) * 1978-08-29 1980-03-08 Fujitsu Ltd Manufacture of semiconductor device
JPS561556A (en) * 1979-06-18 1981-01-09 Hitachi Ltd Semiconductor device
US4274891A (en) * 1979-06-29 1981-06-23 International Business Machines Corporation Method of fabricating buried injector memory cell formed from vertical complementary bipolar transistor circuits utilizing mono-poly deposition
NL8006339A (nl) * 1979-11-21 1981-06-16 Hitachi Ltd Halfgeleiderinrichting en werkwijze voor de vervaar- diging daarvan.
US4303933A (en) * 1979-11-29 1981-12-01 International Business Machines Corporation Self-aligned micrometer bipolar transistor device and process
US4512075A (en) * 1980-08-04 1985-04-23 Fairchild Camera & Instrument Corporation Method of making an integrated injection logic cell having self-aligned collector and base reduced resistance utilizing selective diffusion from polycrystalline regions
JPS5734365A (en) * 1980-08-08 1982-02-24 Ibm Symmetrical bipolar transistor
US4433470A (en) * 1981-05-19 1984-02-28 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing semiconductor device utilizing selective etching and diffusion
JPS5873156A (ja) * 1981-10-28 1983-05-02 Hitachi Ltd 半導体装置

Also Published As

Publication number Publication date
KR910006699B1 (ko) 1991-08-31
JPS59161867A (ja) 1984-09-12
US4819055A (en) 1989-04-04
EP0118102A3 (en) 1987-09-30
DE3486144T2 (de) 1993-09-09
KR840008213A (ko) 1984-12-13
CA1202430A (en) 1986-03-25
EP0118102A2 (de) 1984-09-12
EP0118102B1 (de) 1993-05-12

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee