DE3577367D1 - Halbleiterspeicheranordnung. - Google Patents

Halbleiterspeicheranordnung.

Info

Publication number
DE3577367D1
DE3577367D1 DE8585307458T DE3577367T DE3577367D1 DE 3577367 D1 DE3577367 D1 DE 3577367D1 DE 8585307458 T DE8585307458 T DE 8585307458T DE 3577367 T DE3577367 T DE 3577367T DE 3577367 D1 DE3577367 D1 DE 3577367D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
memory arrangement
arrangement
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585307458T
Other languages
English (en)
Inventor
Junji Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3577367D1 publication Critical patent/DE3577367D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
DE8585307458T 1984-10-16 1985-10-16 Halbleiterspeicheranordnung. Expired - Fee Related DE3577367D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59216786A JPS6194296A (ja) 1984-10-16 1984-10-16 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3577367D1 true DE3577367D1 (de) 1990-05-31

Family

ID=16693862

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585307458T Expired - Fee Related DE3577367D1 (de) 1984-10-16 1985-10-16 Halbleiterspeicheranordnung.

Country Status (5)

Country Link
US (1) US4616343A (de)
EP (1) EP0178921B1 (de)
JP (1) JPS6194296A (de)
KR (1) KR900008938B1 (de)
DE (1) DE3577367D1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6194295A (ja) * 1984-10-16 1986-05-13 Fujitsu Ltd 半導体記憶装置
EP0179605B1 (de) * 1984-10-17 1992-08-19 Fujitsu Limited Halbleiterspeicheranordnung mit einer seriellen Dateneingangs- und Ausgangsschaltung
US4884244A (en) * 1985-01-28 1989-11-28 Data General Corporation Method of addressing a computer memory
US4764900A (en) * 1986-03-24 1988-08-16 Motorola, Inc. High speed write technique for a memory
JPS6363196A (ja) * 1986-09-02 1988-03-19 Fujitsu Ltd 半導体記憶装置
JPS63161596A (ja) * 1986-12-25 1988-07-05 Nec Corp 半導体記憶装置
US4995004A (en) * 1989-05-15 1991-02-19 Dallas Semiconductor Corporation RAM/ROM hybrid memory architecture
WO1990014626A1 (en) * 1989-05-15 1990-11-29 Dallas Semiconductor Corporation Systems with data-token/one-wire-bus
US5210846B1 (en) * 1989-05-15 1999-06-29 Dallas Semiconductor One-wire bus architecture
JP3056498B2 (ja) * 1990-01-23 2000-06-26 松下電器産業株式会社 センスアンプ回路
US5260904A (en) * 1990-05-31 1993-11-09 Oki Electric Industry Co., Ltd. Data bus clamp circuit for a semiconductor memory device
JPH0438697A (ja) * 1990-05-31 1992-02-07 Oki Electric Ind Co Ltd 半導体記憶装置のデータバスクランプ回路
JPH04192809A (ja) * 1990-11-27 1992-07-13 Kawasaki Steel Corp プログラマブル集積回路
US5994770A (en) * 1991-07-09 1999-11-30 Dallas Semiconductor Corporation Portable electronic data carrier
US5625602A (en) * 1991-11-18 1997-04-29 Kabushiki Kaisha Toshiba NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines
US5848541A (en) * 1994-03-30 1998-12-15 Dallas Semiconductor Corporation Electrical/mechanical access control systems
US5831827A (en) * 1994-04-28 1998-11-03 Dallas Semiconductor Corporation Token shaped module for housing an electronic circuit
US5604343A (en) * 1994-05-24 1997-02-18 Dallas Semiconductor Corporation Secure storage of monetary equivalent data systems and processes
US5679944A (en) * 1994-06-15 1997-10-21 Dallas Semiconductor Corporation Portable electronic module having EPROM memory, systems and processes
US5615130A (en) * 1994-12-14 1997-03-25 Dallas Semiconductor Corp. Systems and methods to gather, store and transfer information from electro/mechanical tools and instruments
CN114067729B (zh) * 2021-11-16 2022-10-04 武汉华星光电技术有限公司 发光驱动电路及显示面板

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3898632A (en) * 1974-07-15 1975-08-05 Sperry Rand Corp Semiconductor block-oriented read/write memory
JPS51147225A (en) * 1975-06-13 1976-12-17 Hitachi Ltd Semiconductor memory
JPS5812605B2 (ja) * 1977-06-29 1983-03-09 株式会社東芝 デ−タ処理装置
US4402067A (en) * 1978-02-21 1983-08-30 Moss William E Bidirectional dual port serially controlled programmable read-only memory
US4412313A (en) * 1981-01-19 1983-10-25 Bell Telephone Laboratories, Incorporated Random access memory system having high-speed serial data paths
JPS5916195A (ja) * 1982-07-19 1984-01-27 Toshiba Corp 半導体記憶装置
JPS59132492A (ja) * 1982-12-22 1984-07-30 Fujitsu Ltd 半導体記憶装置
JPS60236184A (ja) * 1984-05-08 1985-11-22 Nec Corp 半導体メモリ

Also Published As

Publication number Publication date
EP0178921A2 (de) 1986-04-23
EP0178921A3 (en) 1988-03-30
JPS6194296A (ja) 1986-05-13
JPH0467718B2 (de) 1992-10-29
KR900008938B1 (ko) 1990-12-13
EP0178921B1 (de) 1990-04-25
US4616343A (en) 1986-10-07
KR860003606A (ko) 1986-05-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee