DE3650092D1 - E/a-steuerung mit zwei funktionen. - Google Patents

E/a-steuerung mit zwei funktionen.

Info

Publication number
DE3650092D1
DE3650092D1 DE3650092T DE3650092T DE3650092D1 DE 3650092 D1 DE3650092 D1 DE 3650092D1 DE 3650092 T DE3650092 T DE 3650092T DE 3650092 T DE3650092 T DE 3650092T DE 3650092 D1 DE3650092 D1 DE 3650092D1
Authority
DE
Germany
Prior art keywords
host computer
controller
common
status
virtual controllers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3650092T
Other languages
English (en)
Other versions
DE3650092T2 (de
Inventor
Jerrold Buggert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Unisys Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unisys Corp filed Critical Unisys Corp
Publication of DE3650092D1 publication Critical patent/DE3650092D1/de
Application granted granted Critical
Publication of DE3650092T2 publication Critical patent/DE3650092T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
DE3650092T 1985-02-28 1986-02-18 E/a-steuerung mit zwei funktionen. Expired - Fee Related DE3650092T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/707,112 US4750113A (en) 1985-02-28 1985-02-28 Dual function I/O controller
PCT/US1986/000333 WO1986005293A1 (en) 1985-02-28 1986-02-18 Dual function i/o controller

Publications (2)

Publication Number Publication Date
DE3650092D1 true DE3650092D1 (de) 1994-11-17
DE3650092T2 DE3650092T2 (de) 1995-05-24

Family

ID=24840391

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3650092T Expired - Fee Related DE3650092T2 (de) 1985-02-28 1986-02-18 E/a-steuerung mit zwei funktionen.

Country Status (8)

Country Link
US (1) US4750113A (de)
EP (1) EP0213183B1 (de)
JP (1) JPS62500475A (de)
AT (1) ATE112870T1 (de)
BR (1) BR8605616A (de)
CA (1) CA1246748A (de)
DE (1) DE3650092T2 (de)
WO (1) WO1986005293A1 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4959782A (en) * 1986-10-29 1990-09-25 United Technologies Corporation Access arbitration for an input-output controller
JPH0697412B2 (ja) * 1987-08-12 1994-11-30 ファナック株式会社 高速入出力モジュール
US4947366A (en) * 1987-10-02 1990-08-07 Advanced Micro Devices, Inc. Input/output controller incorporating address mapped input/output windows and read ahead/write behind capabilities
ES2068818T3 (es) * 1988-09-30 1995-05-01 Siemens Nixdorf Inf Syst Procedimiento para el control de la transmision de datos de un circuito de control de la conexion de unidades centrales y disposicion de circuito para la realizacion del procedimiento.
US5038275A (en) * 1988-10-07 1991-08-06 Advanced Micro Devices, Inc. Status transfer structure within a data processing system with status read indication
US5081609A (en) * 1989-01-10 1992-01-14 Bull Hn Information Systems Inc. Multiprocessor controller having time shared control store
JPH0776951B2 (ja) * 1990-10-30 1995-08-16 インターナショナル・ビジネス・マシーンズ・コーポレイション コンピュータシステム、複数の入出力アダプタによるアドレス空間共用システム、及び複数の入出力装置とコンピュータプロセッサ間の通信管理方
JPH087715B2 (ja) * 1990-11-15 1996-01-29 インターナショナル・ビジネス・マシーンズ・コーポレイション データ処理装置及びアクセス制御方法
JPH04310157A (ja) * 1991-04-09 1992-11-02 Chubu Nippon Denki Software Kk 分散処理システムのメッセージ中継方式
US5313584A (en) * 1991-11-25 1994-05-17 Unisys Corporation Multiple I/O processor system
JP3479538B2 (ja) * 1991-12-26 2003-12-15 テキサス インスツルメンツ インコーポレイテツド 半導体集積回路を製作する方法
US5499384A (en) * 1992-12-31 1996-03-12 Seiko Epson Corporation Input output control unit having dedicated paths for controlling the input and output of data between host processor and external device
US5444857A (en) * 1993-05-12 1995-08-22 Intel Corporation Method and apparatus for cycle tracking variable delay lines
US5546452A (en) * 1995-03-02 1996-08-13 Geotel Communications Corp. Communications system using a central controller to control at least one network and agent system
US5737524A (en) * 1995-05-22 1998-04-07 International Business Machines Corporation Add-in board with programmable configuration registers for use in PCI bus computers
JPH08318981A (ja) * 1995-05-24 1996-12-03 Mamoru Kamo 鶏卵容器
US5870080A (en) * 1996-03-14 1999-02-09 Gateway 2000, Inc. Electro-magnetic transceiver combined with a pointing device
US6029179A (en) * 1997-12-18 2000-02-22 International Business Machines Corporation Automated read-only volume processing in a virtual tape server
KR100257046B1 (ko) * 1998-03-03 2000-05-15 윤종용 인터페이스 기능 전환을 위한 지능형 입/출력 제어기
US6199137B1 (en) * 1999-01-05 2001-03-06 Lucent Technolgies, Inc. Method and device for controlling data flow through an IO controller
US6996640B1 (en) * 2001-08-07 2006-02-07 Adaptec, Inc. Method and system for asynchronously transferring data
US20030078820A1 (en) * 2001-10-19 2003-04-24 Ouchi Norman Ken Object based workflow route
US7734506B2 (en) 2002-04-22 2010-06-08 Norman Ken Ouchi Catalog, catalog query, and item identifier for a physical item
US7302548B1 (en) 2002-06-18 2007-11-27 Cisco Technology, Inc. System and method for communicating in a multi-processor environment
US7321985B2 (en) * 2004-02-26 2008-01-22 International Business Machines Corporation Method for achieving higher availability of computer PCI adapters
US8817621B2 (en) 2010-07-06 2014-08-26 Nicira, Inc. Network virtualization apparatus
US9525647B2 (en) 2010-07-06 2016-12-20 Nicira, Inc. Network control apparatus and method for creating and modifying logical switching elements

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3337854A (en) * 1964-07-08 1967-08-22 Control Data Corp Multi-processor using the principle of time-sharing
US3573852A (en) * 1968-08-30 1971-04-06 Texas Instruments Inc Variable time slot assignment of virtual processors
US4162520A (en) * 1976-09-30 1979-07-24 Burroughs Corporation Intelligent input-output interface control unit for input-output subsystem
US4268906A (en) * 1978-12-22 1981-05-19 International Business Machines Corporation Data processor input/output controller
US4371932A (en) * 1979-07-30 1983-02-01 International Business Machines Corp. I/O Controller for transferring data between a host processor and multiple I/O units
US4313162A (en) * 1979-12-14 1982-01-26 Burroughs Corporation I/O Subsystem using data link processors
US4371948A (en) * 1980-05-07 1983-02-01 Burroughs Corporation Train printer-data link processor
US4390964A (en) * 1980-09-09 1983-06-28 Burroughs Corporation Input/output subsystem using card reader-peripheral controller
US4430710A (en) * 1981-08-24 1984-02-07 Burroughs Corporation Subsystem controller
FR2513407B1 (fr) * 1981-09-24 1987-01-16 Finger Ulrich Systeme d'arbitrage des demandes d'acces de plusieurs processeurs a des ressources communes, par l'intermediaire d'un bus commun
US4443850A (en) * 1981-12-01 1984-04-17 Burroughs Corporation Interface circuit for subsystem controller
US4490788A (en) * 1982-09-29 1984-12-25 Schlumberger Technology Corporation Well-logging data processing system having segmented serial processor-to-peripheral data links
US4616337A (en) * 1983-03-30 1986-10-07 Burroughs Corporation Automatic read system for peripheral-controller
US4602327A (en) * 1983-07-28 1986-07-22 Motorola, Inc. Bus master capable of relinquishing bus on request and retrying bus cycle

Also Published As

Publication number Publication date
DE3650092T2 (de) 1995-05-24
EP0213183B1 (de) 1994-10-12
JPH0519180B2 (de) 1993-03-16
EP0213183A1 (de) 1987-03-11
JPS62500475A (ja) 1987-02-26
BR8605616A (pt) 1987-04-22
WO1986005293A1 (en) 1986-09-12
ATE112870T1 (de) 1994-10-15
US4750113A (en) 1988-06-07
CA1246748A (en) 1988-12-13

Similar Documents

Publication Publication Date Title
DE3650092D1 (de) E/a-steuerung mit zwei funktionen.
SE8405456D0 (sv) Mycket snabbt minnes- och minnesforvaltningssystem
US7424552B2 (en) Switch/network adapter port incorporating shared memory resources selectively accessible by a direct execution logic element and one or more dense logic devices
EP0380855A3 (de) Speicherkonfiguration zur Verwendung für Schnittstellenbildung zwischen einer Systemsteuereinheit für ein Multiprozessorsystem und dem Hauptspeicher
MY109414A (en) Bus interface logic for computer system having dual bus architecture
HK1019250A1 (en) Microprocessor architecture capable of supporting multiple heterogenous processors
DE69231452T2 (de) Fehlertolerantes Rechnersystem mit Verarbeitungseinheiten die je mindestens drei Rechnereinheiten haben
JPS56159725A (en) Module type data processor
KR900007680B1 (en) Input/output control system
EP0389001A3 (de) Mehrprozessorsteuerung für Vektorrechner
AU616604B2 (en) Dual bus microcomputer system with programmable control of lock function
EP0473277A2 (de) Vorrichtung zur Steuerung des Zugangs zu einem Datenbus
US5280588A (en) Multiple input/output devices having shared address space
EP0192578A3 (de) Mehrbusanordnung mit einem Mikroprozessor mit getrennten Befehls- und Datenschnittstellen und Cachespeichern
IE52963B1 (en) Data processing arrangements
US7054978B1 (en) Logical PCI bus
EP0396940A3 (de) Cache-Speicher und verwandtes Übereinstimmungsprotokoll
KR0171769B1 (ko) 고속 중형컴퓨터에 있어서 isdn보드의 데이터 전달방법
JPS5786968A (en) Doubled computer system
JPH0215152Y2 (de)
KR100216255B1 (ko) 멀티프로세서 시스템의 인터페이스 처리회로
KR19980055995A (ko) 프로세서간 통신 데이터의 손실을 방지할 수 있는 이중화구조를 갖는 통신시스템
DE3878044D1 (de) Schaltungsanordnung zur steuerung von parallelzugriffen zu dezentralen speichereinrichtungen (fehleradressenspeicher).
JPS6415853A (en) Memory access processing system
Benenson et al. Brookhaven fastbus/unibus interface

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee