DE3688973T2 - Verarbeitungssystem in Pipelinestruktur und Mikroprozessor mit einem derartigen System. - Google Patents
Verarbeitungssystem in Pipelinestruktur und Mikroprozessor mit einem derartigen System.Info
- Publication number
- DE3688973T2 DE3688973T2 DE86117099T DE3688973T DE3688973T2 DE 3688973 T2 DE3688973 T2 DE 3688973T2 DE 86117099 T DE86117099 T DE 86117099T DE 3688973 T DE3688973 T DE 3688973T DE 3688973 T2 DE3688973 T2 DE 3688973T2
- Authority
- DE
- Germany
- Prior art keywords
- microprocessor
- pipeline structure
- processing system
- processing
- pipeline
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/3017—Runtime instruction translation, e.g. macros
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3824—Operand accessing
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61067050A JPS62226231A (ja) | 1986-03-27 | 1986-03-27 | プロセツサ |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3688973D1 DE3688973D1 (de) | 1993-10-07 |
DE3688973T2 true DE3688973T2 (de) | 1994-02-17 |
Family
ID=13333625
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE86117099T Expired - Fee Related DE3688973T2 (de) | 1986-03-27 | 1986-12-09 | Verarbeitungssystem in Pipelinestruktur und Mikroprozessor mit einem derartigen System. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5390306A (de) |
EP (1) | EP0240606B1 (de) |
JP (1) | JPS62226231A (de) |
DE (1) | DE3688973T2 (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01255036A (ja) * | 1988-04-04 | 1989-10-11 | Toshiba Corp | マイクロプロセッサ |
JPS6453235A (en) * | 1988-05-25 | 1989-03-01 | Nec Corp | Risc type microprocessor |
JPH0769805B2 (ja) * | 1988-10-04 | 1995-07-31 | 三菱電機株式会社 | データ処理装置 |
US5293592A (en) * | 1989-04-07 | 1994-03-08 | Intel Corporatino | Decoder for pipelined system having portion indicating type of address generation and other portion controlling address generation within pipeline |
GB2230116B (en) * | 1989-04-07 | 1993-02-17 | Intel Corp | An improvement for pipelined decoding of instructions in a pipelined processor |
JPH04260929A (ja) * | 1991-01-21 | 1992-09-16 | Mitsubishi Electric Corp | データ処理装置 |
JP2847974B2 (ja) * | 1991-01-21 | 1999-01-20 | 三菱電機株式会社 | データ処理装置 |
US6061755A (en) * | 1997-04-14 | 2000-05-09 | International Business Machines Corporation | Method of layering cache and architectural specific functions to promote operation symmetry |
US5978871A (en) * | 1997-04-14 | 1999-11-02 | International Business Machines Corporation | Method of layering cache and architectural specific functions for operation splitting |
US7472259B2 (en) * | 2000-12-06 | 2008-12-30 | Analog Devices, Inc. | Multi-cycle instructions |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3725868A (en) * | 1970-10-19 | 1973-04-03 | Burroughs Corp | Small reconfigurable processor for a variety of data processing applications |
IT995722B (it) * | 1973-10-10 | 1975-11-20 | Honeywell Inf Systems Italia | Calcolatore microprogrammato a interior decore espansibile mediante riconoscimento e interpre tazione di codici di operazione aggiunti |
JPS5441039A (en) * | 1977-09-08 | 1979-03-31 | Nec Corp | Processing unit of high level language program |
JPS5621240A (en) * | 1979-07-27 | 1981-02-27 | Hitachi Ltd | Information processor |
US4415969A (en) * | 1980-02-07 | 1983-11-15 | Intel Corporation | Macroinstruction translator unit for use in a microprocessor |
CA1126406A (en) * | 1980-03-31 | 1982-06-22 | Northern Telecom Limited | Sequence control circuit for a computer |
CA1174370A (en) * | 1980-05-19 | 1984-09-11 | Hidekazu Matsumoto | Data processing unit with pipelined operands |
JPS57161943A (en) * | 1981-03-31 | 1982-10-05 | Hitachi Ltd | Data processing device |
US4797808A (en) * | 1981-06-22 | 1989-01-10 | Texas Instruments Incorporated | Microcomputer with self-test of macrocode |
US4530050A (en) * | 1981-08-26 | 1985-07-16 | Hitachi, Ltd. | Central processing unit for executing instructions of variable length having end information for operand specifiers |
JPS58106636A (ja) * | 1981-12-18 | 1983-06-25 | Hitachi Ltd | パイプライン演算装置 |
US4553205A (en) * | 1982-09-21 | 1985-11-12 | Salvatore Porchia | Flexible macro expansion process |
US4471432A (en) * | 1982-10-13 | 1984-09-11 | Wilhite John E | Method and apparatus for initiating the execution of instructions using a central pipeline execution unit |
US4914578A (en) * | 1983-04-18 | 1990-04-03 | Motorola, Inc. | Method and apparatus for interrupting a coprocessor |
WO1985000453A1 (en) * | 1983-07-11 | 1985-01-31 | Prime Computer, Inc. | Data processing system |
US4685058A (en) * | 1983-08-29 | 1987-08-04 | Amdahl Corporation | Two-stage pipelined execution unit and control stores |
JPS60120439A (ja) * | 1983-12-05 | 1985-06-27 | Nec Corp | 演算処理装置 |
US4667290A (en) * | 1984-09-10 | 1987-05-19 | 501 Philon, Inc. | Compilers using a universal intermediate language |
US4975837A (en) * | 1984-10-01 | 1990-12-04 | Unisys Corporation | Programmable unit having plural levels of subinstruction sets where a portion of the lower level is embedded in the code stream of the upper level of the subinstruction sets |
US4791551A (en) * | 1985-02-11 | 1988-12-13 | Analog Devices, Inc. | Microprogrammable devices using transparent latch |
US4823252A (en) * | 1986-03-28 | 1989-04-18 | Tandem Computers Incorporated | Overlapped control store |
US4890218A (en) * | 1986-07-02 | 1989-12-26 | Raytheon Company | Variable length instruction decoding apparatus having cross coupled first and second microengines |
US4812989A (en) * | 1986-10-15 | 1989-03-14 | Amdahl Corporation | Method for executing machine language instructions |
-
1986
- 1986-03-27 JP JP61067050A patent/JPS62226231A/ja active Granted
- 1986-12-09 DE DE86117099T patent/DE3688973T2/de not_active Expired - Fee Related
- 1986-12-09 EP EP86117099A patent/EP0240606B1/de not_active Expired - Lifetime
-
1992
- 1992-09-08 US US07/940,749 patent/US5390306A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS62226231A (ja) | 1987-10-05 |
DE3688973D1 (de) | 1993-10-07 |
EP0240606B1 (de) | 1993-09-01 |
EP0240606A2 (de) | 1987-10-14 |
US5390306A (en) | 1995-02-14 |
JPH0523447B2 (de) | 1993-04-02 |
EP0240606A3 (en) | 1989-04-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |