DE3750048T2 - Bauelement mit integrierter Schaltung und einer Zwischenschaltungsleitung. - Google Patents

Bauelement mit integrierter Schaltung und einer Zwischenschaltungsleitung.

Info

Publication number
DE3750048T2
DE3750048T2 DE3750048T DE3750048T DE3750048T2 DE 3750048 T2 DE3750048 T2 DE 3750048T2 DE 3750048 T DE3750048 T DE 3750048T DE 3750048 T DE3750048 T DE 3750048T DE 3750048 T2 DE3750048 T2 DE 3750048T2
Authority
DE
Germany
Prior art keywords
component
integrated circuit
line
circuit
intermediate circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3750048T
Other languages
English (en)
Other versions
DE3750048D1 (de
Inventor
Takamaro Kikkawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE3750048D1 publication Critical patent/DE3750048D1/de
Application granted granted Critical
Publication of DE3750048T2 publication Critical patent/DE3750048T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE3750048T 1986-03-06 1987-03-06 Bauelement mit integrierter Schaltung und einer Zwischenschaltungsleitung. Expired - Fee Related DE3750048T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4718786 1986-03-06

Publications (2)

Publication Number Publication Date
DE3750048D1 DE3750048D1 (de) 1994-07-21
DE3750048T2 true DE3750048T2 (de) 1995-01-26

Family

ID=12768098

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3750048T Expired - Fee Related DE3750048T2 (de) 1986-03-06 1987-03-06 Bauelement mit integrierter Schaltung und einer Zwischenschaltungsleitung.

Country Status (4)

Country Link
US (1) US4816895A (de)
EP (1) EP0239833B1 (de)
JP (1) JP2553544B2 (de)
DE (1) DE3750048T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2659714B2 (ja) * 1987-07-21 1997-09-30 株式会社日立製作所 半導体集積回路装置
JPH01302842A (ja) * 1988-05-31 1989-12-06 Nec Corp 多層配線構造の半導体装置
JP2769331B2 (ja) * 1988-09-12 1998-06-25 株式会社日立製作所 半導体集積回路の製造方法
US5679982A (en) * 1993-02-24 1997-10-21 Intel Corporation Barrier against metal diffusion
JP3057975B2 (ja) * 1993-09-27 2000-07-04 日本電気株式会社 集積回路の配線
US5497076A (en) * 1993-10-25 1996-03-05 Lsi Logic Corporation Determination of failure criteria based upon grain boundary electromigration in metal alloy films
US5439731A (en) * 1994-03-11 1995-08-08 Cornell Research Goundation, Inc. Interconnect structures containing blocked segments to minimize stress migration and electromigration damage
US5834845A (en) * 1995-09-21 1998-11-10 Advanced Micro Devices, Inc. Interconnect scheme for integrated circuits
US5960305A (en) * 1996-12-23 1999-09-28 Lsi Logic Corporation Method to improve uniformity/planarity on the edge die and also remove the tungsten stringers from wafer chemi-mechanical polishing
US6534869B2 (en) * 1998-07-29 2003-03-18 Advanced Micro Devices, Inc. Method for reducing stress-induced voids for 0.25 μm micron and smaller semiconductor chip technology by annealing interconnect lines prior to ILD deposition and semiconductor chip made thereby
CN111074190B (zh) * 2019-12-25 2021-12-21 江苏理工学院 一种钢材表面MoSi2复合涂层及其制备方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3423821A (en) * 1965-03-18 1969-01-28 Hitachi Ltd Method of producing thin film integrated circuits
US3702427A (en) * 1971-02-22 1972-11-07 Fairchild Camera Instr Co Electromigration resistant metallization for integrated circuits, structure and process
JPS5722885B2 (de) * 1974-02-18 1982-05-15
US4180596A (en) * 1977-06-30 1979-12-25 International Business Machines Corporation Method for providing a metal silicide layer on a substrate
US4190466A (en) * 1977-12-22 1980-02-26 International Business Machines Corporation Method for making a bipolar transistor structure utilizing self-passivating diffusion sources
US4433004A (en) * 1979-07-11 1984-02-21 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor device and a method for manufacturing the same
JPS57176746A (en) * 1981-04-21 1982-10-30 Nippon Telegr & Teleph Corp <Ntt> Semiconductor integrated circuit and manufacture thereof
US4531144A (en) * 1982-05-14 1985-07-23 Burroughs Corporation Aluminum-refractory metal interconnect with anodized periphery
WO1984001471A1 (en) * 1982-09-30 1984-04-12 Advanced Micro Devices Inc An aluminum-metal silicide interconnect structure for integrated circuits and method of manufacture thereof
US4554572A (en) * 1983-06-17 1985-11-19 Texas Instruments Incorporated Self-aligned stacked CMOS
US4507852A (en) * 1983-09-12 1985-04-02 Rockwell International Corporation Method for making a reliable ohmic contact between two layers of integrated circuit metallizations
JPS60153146A (ja) * 1984-01-23 1985-08-12 Hitachi Ltd 半導体装置のアルミニウム配線
JPS60234346A (ja) * 1984-05-07 1985-11-21 Nec Corp 半導体装置
JPS6118153A (ja) * 1984-07-04 1986-01-27 Toshiba Corp 半導体装置およびその製造方法
JPS61161740A (ja) * 1985-01-07 1986-07-22 モトロ−ラ・インコ−ポレ−テツド 多層金属化集積回路およびその製造方法

Also Published As

Publication number Publication date
DE3750048D1 (de) 1994-07-21
US4816895A (en) 1989-03-28
JPS6312153A (ja) 1988-01-19
EP0239833A3 (en) 1990-02-07
EP0239833A2 (de) 1987-10-07
JP2553544B2 (ja) 1996-11-13
EP0239833B1 (de) 1994-06-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee