DE3750217D1 - Verfahren zur Herstellung eines Halbleiterbauelementes durch Auftragen einer Metallschicht. - Google Patents

Verfahren zur Herstellung eines Halbleiterbauelementes durch Auftragen einer Metallschicht.

Info

Publication number
DE3750217D1
DE3750217D1 DE3750217T DE3750217T DE3750217D1 DE 3750217 D1 DE3750217 D1 DE 3750217D1 DE 3750217 T DE3750217 T DE 3750217T DE 3750217 T DE3750217 T DE 3750217T DE 3750217 D1 DE3750217 D1 DE 3750217D1
Authority
DE
Germany
Prior art keywords
applying
producing
metal layer
semiconductor component
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3750217T
Other languages
English (en)
Inventor
Minoru Hainesu Mizonokuc Inoue
Kouzi Fujitsu Dai Na Hashizume
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Application granted granted Critical
Publication of DE3750217D1 publication Critical patent/DE3750217D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051—Deposition of metallic or metal-silicide layers
DE3750217T 1986-12-25 1987-12-23 Verfahren zur Herstellung eines Halbleiterbauelementes durch Auftragen einer Metallschicht. Expired - Lifetime DE3750217D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61307979A JPS63162854A (ja) 1986-12-25 1986-12-25 金属膜形成方法

Publications (1)

Publication Number Publication Date
DE3750217D1 true DE3750217D1 (de) 1994-08-18

Family

ID=17975445

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3750217T Expired - Lifetime DE3750217D1 (de) 1986-12-25 1987-12-23 Verfahren zur Herstellung eines Halbleiterbauelementes durch Auftragen einer Metallschicht.

Country Status (5)

Country Link
US (1) US5071791A (de)
EP (1) EP0273715B1 (de)
JP (1) JPS63162854A (de)
KR (1) KR910002138B1 (de)
DE (1) DE3750217D1 (de)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2681466B2 (ja) * 1987-10-05 1997-11-26 日本真空技術株式会社 半導体装置の製造方法
US5472912A (en) * 1989-11-30 1995-12-05 Sgs-Thomson Microelectronics, Inc. Method of making an integrated circuit structure by using a non-conductive plug
US6271137B1 (en) 1989-11-30 2001-08-07 Stmicroelectronics, Inc. Method of producing an aluminum stacked contact/via for multilayer
DE69031903T2 (de) * 1989-11-30 1998-04-16 Sgs Thomson Microelectronics Verfahren zum Herstellen von Zwischenschicht-Kontakten
US6242811B1 (en) 1989-11-30 2001-06-05 Stmicroelectronics, Inc. Interlevel contact including aluminum-refractory metal alloy formed during aluminum deposition at an elevated temperature
US5108951A (en) * 1990-11-05 1992-04-28 Sgs-Thomson Microelectronics, Inc. Method for forming a metal contact
US5658828A (en) * 1989-11-30 1997-08-19 Sgs-Thomson Microelectronics, Inc. Method for forming an aluminum contact through an insulating layer
DE4028776C2 (de) * 1990-07-03 1994-03-10 Samsung Electronics Co Ltd Verfahren zur Bildung einer metallischen Verdrahtungsschicht und Füllen einer Kontaktöffnung in einem Halbleiterbauelement
KR960001601B1 (ko) * 1992-01-23 1996-02-02 삼성전자주식회사 반도체 장치의 접촉구 매몰방법 및 구조
US6287963B1 (en) 1990-11-05 2001-09-11 Stmicroelectronics, Inc. Method for forming a metal contact
KR920010620A (ko) * 1990-11-30 1992-06-26 원본미기재 다층 상호접속선을 위한 알루미늄 적층 접점/통로 형성방법
EP0491503A3 (de) * 1990-12-19 1992-07-22 AT&T Corp. Verfahren zur Ablagerung von Metall
JPH07109030B2 (ja) * 1991-02-12 1995-11-22 アプライド マテリアルズ インコーポレイテッド 半導体ウェーハ上にアルミニウム層をスパッタする方法
TW520072U (en) * 1991-07-08 2003-02-01 Samsung Electronics Co Ltd A semiconductor device having a multi-layer metal contact
JP2946978B2 (ja) * 1991-11-29 1999-09-13 ソニー株式会社 配線形成方法
US6051490A (en) * 1991-11-29 2000-04-18 Sony Corporation Method of forming wirings
JP3332456B2 (ja) * 1992-03-24 2002-10-07 株式会社東芝 半導体装置の製造方法及び半導体装置
DE69319993T2 (de) * 1992-09-22 1998-12-10 Sgs Thomson Microelectronics Methode zur Herstellung eines Metallkontaktes
JPH07105441B2 (ja) * 1992-11-30 1995-11-13 日本電気株式会社 半導体装置の製造方法
US5330629A (en) * 1992-12-15 1994-07-19 At&T Bell Laboratories Method for depositing aluminum layers on insulating oxide substrates
US5360524A (en) * 1993-04-13 1994-11-01 Rudi Hendel Method for planarization of submicron vias and the manufacture of semiconductor integrated circuits
US5873983A (en) * 1997-01-13 1999-02-23 Vanguard International Semiconductor Corporation Method for minimizing substrate to clamp sticking during thermal processing of thermally flowable layers
US6436246B1 (en) 1997-01-27 2002-08-20 Micron Technology, Inc. Collimated sputter deposition monitor using sheet resistance
US5994213A (en) * 1998-02-09 1999-11-30 Taiwan Semiconductor Manufacturing Company, Ltd. Aluminum plug process
US5980657A (en) * 1998-03-10 1999-11-09 Micron Technology, Inc. Alloy for enhanced filling of high aspect ratio dual damascene structures
US6316356B1 (en) 1998-03-10 2001-11-13 Micron Technology, Inc. Thermal processing of metal alloys for an improved CMP process in integrated circuit fabrication
US6183564B1 (en) 1998-11-12 2001-02-06 Tokyo Electron Limited Buffer chamber for integrating physical and chemical vapor deposition chambers together in a processing system
US6080657A (en) * 1999-07-16 2000-06-27 Taiwan Semiconductor Manufacturing Company Method of reducing AlCu hillocks
US6136709A (en) * 1999-10-06 2000-10-24 Infineon Technologies North America Corp. Metal line deposition process
US6802945B2 (en) 2003-01-06 2004-10-12 Megic Corporation Method of metal sputtering for integrated circuit metal routing

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3620837A (en) * 1968-09-16 1971-11-16 Ibm Reliability of aluminum and aluminum alloy lands
JPS6187324A (ja) * 1984-10-05 1986-05-02 Oki Electric Ind Co Ltd 半導体装置の電極配線形成方法
US4721689A (en) * 1986-08-28 1988-01-26 International Business Machines Corporation Method for simultaneously forming an interconnection level and via studs
JPS63157418A (ja) * 1986-12-22 1988-06-30 Oki Electric Ind Co Ltd 電極形成方法

Also Published As

Publication number Publication date
US5071791A (en) 1991-12-10
JPH0373629B2 (de) 1991-11-22
EP0273715A3 (en) 1989-02-08
JPS63162854A (ja) 1988-07-06
EP0273715A2 (de) 1988-07-06
KR910002138B1 (ko) 1991-04-04
EP0273715B1 (de) 1994-07-13
KR880008420A (ko) 1988-08-31

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Legal Events

Date Code Title Description
8332 No legal effect for de