DE3773507D1 - Verfahren zur herstellung eines anzeige-bildschirms mit aktiver matrix und drain-widerstaenden. - Google Patents

Verfahren zur herstellung eines anzeige-bildschirms mit aktiver matrix und drain-widerstaenden.

Info

Publication number
DE3773507D1
DE3773507D1 DE8787400162T DE3773507T DE3773507D1 DE 3773507 D1 DE3773507 D1 DE 3773507D1 DE 8787400162 T DE8787400162 T DE 8787400162T DE 3773507 T DE3773507 T DE 3773507T DE 3773507 D1 DE3773507 D1 DE 3773507D1
Authority
DE
Germany
Prior art keywords
producing
display screen
active matrix
drain resistors
resistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787400162T
Other languages
English (en)
Inventor
Francois Maurice
Joseph Richard
Bruno Vinouze
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Orange SA
Original Assignee
Francois Maurice
Joseph Richard
Bruno Vinouze
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Francois Maurice, Joseph Richard, Bruno Vinouze filed Critical Francois Maurice
Application granted granted Critical
Publication of DE3773507D1 publication Critical patent/DE3773507D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/435—Resistive materials for field effect devices, e.g. resistive gate for MOSFET or MESFET
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/10—Materials and properties semiconductor
    • G02F2202/103—Materials and properties semiconductor a-Si
DE8787400162T 1986-01-27 1987-01-23 Verfahren zur herstellung eines anzeige-bildschirms mit aktiver matrix und drain-widerstaenden. Expired - Fee Related DE3773507D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR868601083A FR2593631B1 (fr) 1986-01-27 1986-01-27 Ecran d'affichage a matrice active a resistance de grille et procedes de fabrication de cet ecran

Publications (1)

Publication Number Publication Date
DE3773507D1 true DE3773507D1 (de) 1991-11-14

Family

ID=9331497

Family Applications (2)

Application Number Title Priority Date Filing Date
DE8787400162T Expired - Fee Related DE3773507D1 (de) 1986-01-27 1987-01-23 Verfahren zur herstellung eines anzeige-bildschirms mit aktiver matrix und drain-widerstaenden.
DE8787200973T Expired - Fee Related DE3773249D1 (de) 1986-01-27 1987-01-23 Bildschirm mit aktiver matrix ohne stoertransistor und verfahren zur fabrikation dieses schirmes.

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8787200973T Expired - Fee Related DE3773249D1 (de) 1986-01-27 1987-01-23 Bildschirm mit aktiver matrix ohne stoertransistor und verfahren zur fabrikation dieses schirmes.

Country Status (6)

Country Link
US (2) US4738749A (de)
EP (2) EP0242933B1 (de)
JP (1) JP2601264B2 (de)
CA (1) CA1269162A (de)
DE (2) DE3773507D1 (de)
FR (1) FR2593631B1 (de)

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JPH0740101B2 (ja) * 1985-04-23 1995-05-01 旭硝子株式会社 薄膜トランジスタ
FR2593632B1 (fr) * 1986-01-27 1988-03-18 Maurice Francois Ecran d'affichage a matrice active et procedes de realisation de cet ecran
JPS6319876A (ja) * 1986-07-11 1988-01-27 Fuji Xerox Co Ltd 薄膜トランジスタ装置
JP2620240B2 (ja) * 1987-06-10 1997-06-11 株式会社日立製作所 液晶表示装置
JPS6412577A (en) * 1987-07-06 1989-01-17 Canon Kk Thin film transistor
US4778258A (en) * 1987-10-05 1988-10-18 General Electric Company Protective tab structure for use in the fabrication of matrix addressed thin film transistor liquid crystal displays
JPH0814668B2 (ja) * 1988-02-16 1996-02-14 シャープ株式会社 マトリックス型液晶表示パネル
JPH01251016A (ja) * 1988-03-31 1989-10-06 Seiko Instr Inc 薄膜トランジスタとその製造方法
GB2223353A (en) * 1988-09-30 1990-04-04 Philips Electronic Associated Thin-film transistor
US4965646A (en) * 1988-10-21 1990-10-23 General Electric Company Thin film transistor and crossover structure for liquid crystal displays
EP0381927A3 (de) * 1989-01-13 1991-08-14 Seiko Epson Corporation Nichtlinearer Zweirichtungswiderstand, eine ihn verwendende Flüssigkristallmatrixplatte und Verfahren zu dessen Herstellung
JP2508851B2 (ja) * 1989-08-23 1996-06-19 日本電気株式会社 液晶表示素子用アクティブマトリクス基板とその製造方法
FR2651371B1 (fr) * 1989-08-29 1991-10-18 France Etat Procede de realisation d'un ecran d'affichage a matrice active et a structure inversee.
JP2764139B2 (ja) * 1989-10-20 1998-06-11 ホシデン・フィリップス・ディスプレイ株式会社 アクティブマトリックス液晶表示素子
GB2238644B (en) * 1989-11-29 1994-02-02 Gen Electric Co Plc Matrix addressable displays
DE69022010T2 (de) * 1989-12-22 1996-04-18 Philips Electronics Nv Elektrooptische Anzeigevorrichtung mit aktiver Matrix und Speicherkondensatoren sowie Farbprojektionsapparat, der diese verwendet.
FR2662290B1 (fr) * 1990-05-15 1992-07-24 France Telecom Procede de realisation d'un ecran d'affichage a matrice active et a condensateurs de stockage et ecran obtenu par ce procede.
US5075237A (en) * 1990-07-26 1991-12-24 Industrial Technology Research Institute Process of making a high photosensitive depletion-gate thin film transistor
US5196911A (en) * 1990-07-26 1993-03-23 Industrial Technology Research Institute High photosensitive depletion-gate thin film transistor
DE4115247A1 (de) * 1991-05-10 1992-11-12 Daimler Benz Ag Fluessigkristall-anzeigevorrichtung
US5247194A (en) * 1991-05-24 1993-09-21 Samsung Electronics Co., Ltd. Thin film transistor with an increased switching rate
EP0528591A2 (de) * 1991-08-09 1993-02-24 General Electric Company Ballastwiderstand und Verfahren zum Verhindern von Kurzschlüssen in Schaltvorrichtungen in Flüssigkristallanzeigen
US5414283A (en) * 1993-11-19 1995-05-09 Ois Optical Imaging Systems, Inc. TFT with reduced parasitic capacitance
KR970006733B1 (ko) * 1993-12-14 1997-04-29 엘지전자 주식회사 박막트랜지스터 제조방법
KR0120399Y1 (ko) * 1993-12-15 1998-07-15 구자홍 액정표시장치
FR2714766B1 (fr) * 1993-12-30 1996-02-02 France Telecom Procédé de fabrication d'un écran d'affichage à matrice active.
KR0139346B1 (ko) * 1994-03-03 1998-06-15 김광호 박막 트랜지스터 액정표시장치의 제조방법
US5777703A (en) * 1994-09-30 1998-07-07 Sanyo Electric Co., Ltd. Active matrix type liquid crystal display apparatus with a projection part in the drain line
JPH09265113A (ja) * 1996-03-28 1997-10-07 Nec Corp アクティブマトリクス型液晶表示装置およびその製造方 法
JP4021045B2 (ja) * 1998-03-31 2007-12-12 株式会社アドバンスト・ディスプレイ アクティブマトリクス型表示装置
US6157048A (en) * 1998-08-05 2000-12-05 U.S. Philips Corporation Thin film transistors with elongated coiled electrodes, and large area devices containing such transistors
GB9907019D0 (en) * 1999-03-27 1999-05-19 Koninkl Philips Electronics Nv Thin film transistors and their manufacture
EP1208603A1 (de) * 1999-08-31 2002-05-29 E Ink Corporation Transistor für eine elektronische anzeigevorrichtung
GB0112563D0 (en) * 2001-05-23 2001-07-18 Koninl Philips Electronics Nv Active plate
KR100464208B1 (ko) * 2001-12-20 2005-01-03 엘지.필립스 엘시디 주식회사 액정 표시장치 및 그 구동방법
TWI261927B (en) * 2003-12-03 2006-09-11 Quanta Display Inc Method of manufacturing a thin film transistor array
US20070187685A1 (en) * 2006-02-10 2007-08-16 Chih-Chung Tu Thin film transistor and thin film transistor array substrate
TWI328878B (en) * 2006-09-15 2010-08-11 Au Optronics Corp Electrode structure of a transistor, and pixel structure and display apparatus comprising the same

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4406997A (en) * 1981-09-30 1983-09-27 International Business Machines Corporation Method and means for minimizing the effect of short circuits in flat panel displays
JPS5910988A (ja) * 1982-07-12 1984-01-20 ホシデン株式会社 カラ−液晶表示器
FR2533072B1 (fr) 1982-09-14 1986-07-18 Coissard Pierre Procede de fabrication de circuits electroniques a base de transistors en couches minces et de condensateurs
JPS6052057A (ja) * 1983-09-01 1985-03-23 Seiko Instr & Electronics Ltd 絶縁ゲ−ト電界効果型薄膜トランジスタ
JPH0627980B2 (ja) * 1984-10-17 1994-04-13 レタ・フランセ・ルプレザント・パ・ル・ミニストル・デ・ペ・テ・テ・（セントル・ナシヨナル・デチユ−ド・デ・テレコミユニカシオン） 能動マトリクスデイスプレイスクリ−ンの製造方法
US4665008A (en) * 1984-11-26 1987-05-12 Fuji Electric Co., Ltd. Method for fabricating thin-film image sensing devices
FR2579809B1 (fr) * 1985-04-02 1987-05-15 Thomson Csf Procede de realisation de matrices decommande a diodes pour ecran plat de visualisation electro-optique et ecran plat realise par ce procede
JPH06103372B2 (ja) * 1985-05-16 1994-12-14 旭硝子株式会社 薄膜能動素子基板
JPH07117821B2 (ja) * 1985-06-18 1995-12-18 三菱電機株式会社 マトリクス型表示装置の製造方法
US4624739A (en) * 1985-08-09 1986-11-25 International Business Machines Corporation Process using dry etchant to avoid mask-and-etch cycle

Also Published As

Publication number Publication date
US4738749A (en) 1988-04-19
EP0236169B1 (de) 1991-10-09
EP0236169A1 (de) 1987-09-09
DE3773249D1 (de) 1991-10-31
CA1269162A (fr) 1990-05-15
FR2593631A1 (fr) 1987-07-31
US4783147A (en) 1988-11-08
EP0242933B1 (de) 1991-09-25
JP2601264B2 (ja) 1997-04-16
JPS62209586A (ja) 1987-09-14
FR2593631B1 (fr) 1989-02-17
EP0242933A1 (de) 1987-10-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FRANCE TELECOM, PARIS, FR

8328 Change in the person/name/address of the agent

Free format text: GRUENECKER, A., DIPL.-ING. KINKELDEY, H., DIPL.-ING. DR.-ING. STOCKMAIR, W., DIPL.-ING. DR.-ING. AE.E. CAL TECH SCHUMANN, K., DIPL.-PHYS. DR.RER.NAT. JAKOB, P., DIPL.-ING. BEZOLD, G., DIPL.-CHEM. DR.RER.NAT. MEISTER, W., DIPL.-ING. HILGERS, H., DIPL.-ING. MEYER-PLATH, H., DIPL.-ING. DR.-ING. EHNOLD, A., DIPL.-ING. SCHUSTER, T., DIPL.-PHYS. GOLDBACH, K., DIPL.-ING.DR.-ING. AUFENANGER, M., DIPL.-ING. KLITZSCH, G., DIPL.-ING. VOGELSANG-WENKE, H., DIPL.-CHEM. DIPL.-BIOL.UNIV. DR.RER.NAT., PAT.-ANWAE

8381 Inventor (new situation)

Free format text: MAURICE, FRANCOIS, PERROS-GUIREC, FR RICHARD, JOSEPH, LANNION, FR VINOUZE, BRUNO, PORT-BLANC, FR

8339 Ceased/non-payment of the annual fee