DE3778408D1 - Halbleiterspeicheranordnung. - Google Patents

Halbleiterspeicheranordnung.

Info

Publication number
DE3778408D1
DE3778408D1 DE8787300484T DE3778408T DE3778408D1 DE 3778408 D1 DE3778408 D1 DE 3778408D1 DE 8787300484 T DE8787300484 T DE 8787300484T DE 3778408 T DE3778408 T DE 3778408T DE 3778408 D1 DE3778408 D1 DE 3778408D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
memory arrangement
arrangement
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787300484T
Other languages
English (en)
Inventor
Kiyohiro C O Mitsubis Furutani
Kazutami C O Mitsubish Arimoto
Koichiro C O Mitsubish Mashiko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of DE3778408D1 publication Critical patent/DE3778408D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4097Bit-line organisation, e.g. bit-line layout, folded bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18Bit line organisation; Bit line lay-out
DE8787300484T 1986-01-30 1987-01-21 Halbleiterspeicheranordnung. Expired - Fee Related DE3778408D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61020614A JPH0766659B2 (ja) 1986-01-30 1986-01-30 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3778408D1 true DE3778408D1 (de) 1992-05-27

Family

ID=12032131

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787300484T Expired - Fee Related DE3778408D1 (de) 1986-01-30 1987-01-21 Halbleiterspeicheranordnung.

Country Status (4)

Country Link
US (1) US4710789A (de)
EP (1) EP0239187B1 (de)
JP (1) JPH0766659B2 (de)
DE (1) DE3778408D1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0783062B2 (ja) * 1985-06-18 1995-09-06 株式会社東芝 マスタ−スライス型半導体装置
JPS62202397A (ja) * 1986-02-28 1987-09-07 Fujitsu Ltd 半導体記憶装置
JPS63245954A (ja) * 1987-04-01 1988-10-13 Hitachi Ltd 半導体メモリ
JPH01129440A (ja) * 1987-11-14 1989-05-22 Fujitsu Ltd 半導体装置
JPH07109878B2 (ja) * 1988-11-16 1995-11-22 株式会社東芝 半導体記憶装置
KR910009444B1 (ko) * 1988-12-20 1991-11-16 삼성전자 주식회사 반도체 메모리 장치
US5604881A (en) * 1988-12-22 1997-02-18 Framdrive Ferroelectric storage device emulating a rotating disk drive unit in a computer system and having a multiplexed optical data interface
US5592646A (en) * 1988-12-22 1997-01-07 Framdrive Ferroelectric storage device emulating a rotating disk drive unit in a computer system and having a parallel and multiplexed optical data interface
US5592645A (en) * 1988-12-22 1997-01-07 Framdrive Ferroelectric storage device emulating a rotating disk drive unit in a computer system and having a frequency modulated (FM) data interface
US5592644A (en) * 1988-12-22 1997-01-07 Framdrive Ferroelectric storage device emulating a rotating disk drive unit in a computer system and having an optical data interface
US5592642A (en) * 1988-12-22 1997-01-07 Framdrive Ferroelectric storage device emulating a rotating disk drive unit in a computer system and having an optical and parallel data interface
US5592643A (en) * 1988-12-22 1997-01-07 Framdrive Ferroelectric storage device emulating a rotating disk drive unit in acomputer system and having a parallel data interface
US5359726A (en) * 1988-12-22 1994-10-25 Thomas Michael E Ferroelectric storage device used in place of a rotating disk drive unit in a computer system
JP2591314B2 (ja) * 1989-10-27 1997-03-19 日本電気株式会社 半導体メモリ装置
US5107459A (en) * 1990-04-20 1992-04-21 International Business Machines Corporation Stacked bit-line architecture for high density cross-point memory cell array
US5170243A (en) * 1991-11-04 1992-12-08 International Business Machines Corporation Bit line configuration for semiconductor memory
US5936271A (en) * 1994-11-15 1999-08-10 Siemens Aktiengesellschaft Unit cell layout and transfer gate design for high density DRAMs having a trench capacitor with signal electrode composed of three differently doped polysilicon layers
JPH10134566A (ja) * 1996-10-31 1998-05-22 Mitsubishi Electric Corp 記憶機能を有する半導体装置及びそのデータ読み出し方法
DE19936862C1 (de) * 1999-08-05 2001-01-25 Siemens Ag Kontaktierung von Metalleiterbahnen eines integrierten Halbleiterchips
US6567329B2 (en) 2001-08-28 2003-05-20 Intel Corporation Multiple word-line accessing and accessor
JP2006517830A (ja) * 2003-01-26 2006-08-03 プレコ−ル インコ−ポレイテッド フィットネス機器の保守トラッキング及び警報システム

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56100463A (en) * 1980-01-14 1981-08-12 Toshiba Corp Semiconductor memory device
US4380803A (en) * 1981-02-10 1983-04-19 Burroughs Corporation Read-only/read-write memory
JPS592365A (ja) * 1982-06-28 1984-01-07 Fujitsu Ltd ダイナミツク型半導体記憶装置
JPS602784B2 (ja) * 1982-12-20 1985-01-23 富士通株式会社 半導体記憶装置

Also Published As

Publication number Publication date
US4710789A (en) 1987-12-01
JPH0766659B2 (ja) 1995-07-19
EP0239187B1 (de) 1992-04-22
EP0239187A3 (en) 1990-10-03
EP0239187A2 (de) 1987-09-30
JPS62177792A (ja) 1987-08-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee