DE3781336T2 - Rom-datenspeicherzelle mit einem mehrfachen zustand. - Google Patents

Rom-datenspeicherzelle mit einem mehrfachen zustand.

Info

Publication number: DE3781336T2
Authority: DE; Germany
Prior art keywords: data storage; storage cell; rom data; multiple state; state
Prior art date: 1986-07-01
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE8787108175T

Other languages

English (en)

Other versions

DE3781336D1 (de

Inventor

Claude Louis Bertin

Harish Narandas Kotecha

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

International Business Machines Corp

Original Assignee

International Business Machines Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1986-07-01

Filing date

1987-06-05

Publication date

1993-04-01

1987-06-05 Application filed by International Business Machines Corp filed Critical International Business Machines Corp

1992-10-01 Publication of DE3781336D1 publication Critical patent/DE3781336D1/de

1993-04-01 Application granted granted Critical

1993-04-01 Publication of DE3781336T2 publication Critical patent/DE3781336T2/de

2007-06-06 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Links

238000013500 data storage Methods 0.000 title 1
210000000352 storage cell Anatomy 0.000 title 1

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5692—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency read-only digital stores using storage elements with more than two stable states
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/18—Bit line organisation; Bit line lay-out
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/14—Word line organisation; Word line lay-out

DE8787108175T 1986-07-01 1987-06-05 Rom-datenspeicherzelle mit einem mehrfachen zustand. Expired - Fee Related DE3781336T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US06/880,967 US4805142A (en)	1986-07-01	1986-07-01	Multiple ROM data state, read/write memory cell

Publications (2)

Publication Number	Publication Date
DE3781336D1 DE3781336D1 (de)	1992-10-01
DE3781336T2 true DE3781336T2 (de)	1993-04-01

Family

ID=25377507

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE8787108175T Expired - Fee Related DE3781336T2 (de)	1986-07-01	1987-06-05	Rom-datenspeicherzelle mit einem mehrfachen zustand.

Country Status (4)

Country	Link
US (1)	US4805142A (de)
EP (1)	EP0250930B1 (de)
JP (1)	JPS6310399A (de)
DE (1)	DE3781336T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS58186233A (ja) *	1982-04-23	1983-10-31	Oki Electric Ind Co Ltd	トランスポンダ装置における電波返送方式
JPH03200089A (ja) *	1989-12-28	1991-09-02	Nippon Kouro Hiyoushiki Kyokai	トランスポンダの応答データ検出方法
US6222762B1 (en)	1992-01-14	2001-04-24	Sandisk Corporation	Multi-state memory
US5712180A (en) *	1992-01-14	1998-01-27	Sundisk Corporation	EEPROM with split gate source side injection
US5313421A (en) *	1992-01-14	1994-05-17	Sundisk Corporation	EEPROM with split gate source side injection
US7071060B1 (en) *	1996-02-28	2006-07-04	Sandisk Corporation	EEPROM with split gate source side infection with sidewall spacers
US8199576B2 (en) *	2009-04-08	2012-06-12	Sandisk 3D Llc	Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a double-global-bit-line architecture
US7983065B2 (en) *	2009-04-08	2011-07-19	Sandisk 3D Llc	Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines
US8351236B2 (en)	2009-04-08	2013-01-08	Sandisk 3D Llc	Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture
US20110297912A1 (en)	2010-06-08	2011-12-08	George Samachisa	Non-Volatile Memory Having 3d Array of Read/Write Elements with Vertical Bit Lines and Laterally Aligned Active Elements and Methods Thereof
US8526237B2 (en)	2010-06-08	2013-09-03	Sandisk 3D Llc	Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereof

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3541531A (en) *	1967-02-07	1970-11-17	Bell Telephone Labor Inc	Semiconductive memory array wherein operating power is supplied via information paths
US3618052A (en) *	1969-12-05	1971-11-02	Cogar Corp	Bistable memory with predetermined turn-on state
US4095281A (en) *	1976-03-04	1978-06-13	Rca Corporation	Random access-erasable read only memory cell
US4134151A (en) *	1977-05-02	1979-01-09	Electronic Memories & Magnetics Corporation	Single sense line memory cell
US4158239A (en) *	1977-12-20	1979-06-12	International Business Machines Corporation	Resistive gate FET flip-flop storage cell
JPS54146935A (en) *	1978-05-10	1979-11-16	Nec Corp	Mask programmable read/write memory
US4202044A (en) *	1978-06-13	1980-05-06	International Business Machines Corporation	Quaternary FET read only memory
US4327424A (en) *	1980-07-17	1982-04-27	International Business Machines Corporation	Read-only storage using enhancement-mode, depletion-mode or omitted gate field-effect transistors
US4462088A (en) *	1981-11-03	1984-07-24	International Business Machines Corporation	Array design using a four state cell for double density
US4546453A (en) *	1982-06-22	1985-10-08	Motorola, Inc.	Four-state ROM cell with increased differential between states
US4583201A (en) *	1983-09-08	1986-04-15	International Business Machines Corporation	Resistor personalized memory device using a resistive gate fet

1986
- 1986-07-01 US US06/880,967 patent/US4805142A/en not_active Expired - Fee Related
1987
- 1987-03-13 JP JP62057041A patent/JPS6310399A/ja active Granted
- 1987-06-05 DE DE8787108175T patent/DE3781336T2/de not_active Expired - Fee Related
- 1987-06-05 EP EP87108175A patent/EP0250930B1/de not_active Expired - Lifetime

Also Published As

Publication number	Publication date
DE3781336D1 (de)	1992-10-01
US4805142A (en)	1989-02-14
EP0250930A3 (en)	1989-11-23
JPH0439760B2 (de)	1992-06-30
JPS6310399A (ja)	1988-01-16
EP0250930B1 (de)	1992-08-26
EP0250930A2 (de)	1988-01-07

Legal Events

Date	Code	Title	Description
1993-09-23	8364	No opposition during term of opposition
1998-06-10	8339	Ceased/non-payment of the annual fee

Publication	Publication Date	Title
DE344894T1 (de)	1991-07-04	Speicherzelle.
DE3686626T2 (de)	1993-01-28	Speicherzelle.
DE3484955D1 (de)	1991-09-26	Halbleiterspeicher mit einer stapelstruktur.
DE68913702D1 (de)	1994-04-14	Datenspeicherkassette mit einer Schreib-Schutz-Anordnung.
DE3681602D1 (de)	1991-10-31	Halbleiterspeicheranordnung mit speicherzellen mit gestapelten kapazitaeten und verfahren zu ihrer herstellung.
DE3588042D1 (de)	1995-08-24	Dynamischer Halbleiterspeicher mit einer statischen Datenspeicherzelle.
DE3587400T2 (de)	1993-12-23	Datenspeicherungsanordnung.
DE3775161D1 (de)	1992-01-23	Saugfaehiger artikel mit einem dichten doppelrand.
DE3788536T2 (de)	1994-06-09	Katheterhalterung mit einem Katheter zusammengebaut.
DE3587329D1 (de)	1993-06-17	Speicheranordnung mit datenzugriffsteuerung.
IT8520249A0 (it)	1985-04-05	Batteria di accumulatori.
DE3684214D1 (de)	1992-04-16	Strahlungsfeste speicherzelle.
DE3585889D1 (de)	1992-05-27	Behaelter mit verschlussstopfen.
DE3688581T2 (de)	1993-12-23	Sortierverfahren in einem hierarchisch geordneten Speichersystem.
DE3781336D1 (de)	1992-10-01	Rom-datenspeicherzelle mit einem mehrfachen zustand.
DE3771252D1 (de)	1991-08-14	Speicher mit gleichzeitig adressierbaren speicherelementen.
DE3680543D1 (de)	1991-08-29	Lagersystem mit mehreren eingaengen.
DE3580768D1 (de)	1991-01-17	Datenspeicherelement.
DE3850567D1 (de)	1994-08-11	DRAM-Zelle mit verstärkter Ladung.
DE3883935T2 (de)	1994-01-05	Halbleiterspeicheranordnung mit einem seriellen Zugriffsspeicher.
DE3669465D1 (de)	1990-04-19	Ablagekasten mit stauraum.
DE58909149D1 (de)	1995-05-11	Addierzelle mit einem Summen- und einem Carryteil.
DE3586718D1 (de)	1992-11-05	Festwertspeicher mit interdigitalen bitzeilen.
DE3750872T2 (de)	1995-07-27	Nichtflüchtige speicherzelle.
DE3782808T2 (de)	1993-04-01	Halbleiterspeicheranordnung mit einem bitspaltenhochziehungsbetrieb.