DE3784210D1 - Unterbrechungssteuerungsverfahren in einem mehrprozessorsystem. - Google Patents
Unterbrechungssteuerungsverfahren in einem mehrprozessorsystem.Info
- Publication number
- DE3784210D1 DE3784210D1 DE8787902716T DE3784210T DE3784210D1 DE 3784210 D1 DE3784210 D1 DE 3784210D1 DE 8787902716 T DE8787902716 T DE 8787902716T DE 3784210 T DE3784210 T DE 3784210T DE 3784210 D1 DE3784210 D1 DE 3784210D1
- Authority
- DE
- Germany
- Prior art keywords
- control method
- multiprocessor system
- interrupt control
- interrupt
- multiprocessor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61086921A JPS62243058A (ja) | 1986-04-15 | 1986-04-15 | マルチプロセツサシステムの割込制御方法 |
PCT/JP1987/000225 WO1987006370A1 (en) | 1986-04-15 | 1987-04-10 | Interrupt control method in a multiprocessor system |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3784210D1 true DE3784210D1 (de) | 1993-03-25 |
DE3784210T2 DE3784210T2 (de) | 1993-06-03 |
Family
ID=13900318
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8787902716T Expired - Fee Related DE3784210T2 (de) | 1986-04-15 | 1987-04-10 | Unterbrechungssteuerungsverfahren in einem mehrprozessorsystem. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4930070A (de) |
EP (1) | EP0263886B1 (de) |
JP (1) | JPS62243058A (de) |
DE (1) | DE3784210T2 (de) |
WO (1) | WO1987006370A1 (de) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3888353T2 (de) * | 1987-05-01 | 1994-11-17 | Digital Equipment Corp | Unterbrechungsknoten zum vorsehen von unterbrechungsanforderungen auf einem anstehenden bus. |
DE3800523A1 (de) * | 1988-01-11 | 1989-07-20 | Siemens Ag | Datenverarbeitungssystem |
US4959781A (en) * | 1988-05-16 | 1990-09-25 | Stardent Computer, Inc. | System for assigning interrupts to least busy processor that already loaded same class of interrupt routines |
IT1227711B (it) * | 1988-11-18 | 1991-05-06 | Caluso Torino | Sistema multiprocessore di elaborazione dati a risorse distribuite condivise e prevenzione di stallo. |
US5206948A (en) * | 1989-12-22 | 1993-04-27 | Bull Hn Information Systems Inc. | Bus monitor with means for selectively capturing trigger conditions |
KR940001878B1 (ko) * | 1990-03-08 | 1994-03-10 | 가부시끼가이샤 히다찌세이사꾸쇼 | 멀티 프로세서시스템 및 인터럽션 제어장치 |
US5265255A (en) * | 1990-09-24 | 1993-11-23 | International Business Machines Corp. | Personal computer system with interrupt controller |
US5410710A (en) * | 1990-12-21 | 1995-04-25 | Intel Corporation | Multiprocessor programmable interrupt controller system adapted to functional redundancy checking processor systems |
US5613128A (en) * | 1990-12-21 | 1997-03-18 | Intel Corporation | Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller |
JPH04246763A (ja) * | 1991-01-31 | 1992-09-02 | Nec Corp | マルチプロセッサ回路 |
JPH0689269A (ja) * | 1991-02-13 | 1994-03-29 | Hewlett Packard Co <Hp> | プロセッサの制御装置、プロセッサの休止装置およびそれらの方法 |
JP3208590B2 (ja) * | 1992-02-28 | 2001-09-17 | ソニー株式会社 | シリアル制御装置 |
JP3171925B2 (ja) * | 1992-04-30 | 2001-06-04 | 株式会社日立製作所 | データ処理装置 |
US5581770A (en) * | 1992-06-04 | 1996-12-03 | Mitsubishi Denki Kabushiki Kaisha | Floating interruption handling system and method |
US5423008A (en) * | 1992-08-03 | 1995-06-06 | Silicon Graphics, Inc. | Apparatus and method for detecting the activities of a plurality of processors on a shared bus |
EP0602858A1 (de) * | 1992-12-18 | 1994-06-22 | International Business Machines Corporation | Vorrichtung und Verfahren zur Unterbrechungsbedienung in einem Mehrrechnersystem |
JP3261665B2 (ja) * | 1993-01-29 | 2002-03-04 | インターナショナル・ビジネス・マシーンズ・コーポレーション | データ転送方法及びデータ処理システム |
JP2502932B2 (ja) * | 1993-01-29 | 1996-05-29 | インターナショナル・ビジネス・マシーンズ・コーポレイション | デ―タ転送方法及びデ―タ処理システム |
US5481724A (en) * | 1993-04-06 | 1996-01-02 | International Business Machines Corp. | Peer to peer computer-interrupt handling |
CA2123447C (en) * | 1993-09-20 | 1999-02-16 | Richard L. Arndt | Scalable system interrupt structure for a multiprocessing system |
JPH07105023A (ja) * | 1993-09-20 | 1995-04-21 | Internatl Business Mach Corp <Ibm> | データ処理システム内でスプリアス割込みを検出するための方法及び装置 |
US5692199A (en) * | 1993-10-28 | 1997-11-25 | Elonex I.P. Holdings, Ltd. | Personal digital assistant module having a host interconnect bus without an interrupt line and which handles interrupts as addresses associated with specific interrupts in memory |
SG67906A1 (en) * | 1993-12-16 | 1999-10-19 | Intel Corp | Multiple programmable interrupt controllers in a multi-processor system |
US5745770A (en) * | 1993-12-27 | 1998-04-28 | Intel Corporation | Method and apparatus for servicing simultaneous I/O trap and debug traps in a microprocessor |
US5619706A (en) * | 1995-03-02 | 1997-04-08 | Intel Corporation | Method and apparatus for switching between interrupt delivery mechanisms within a multi-processor system |
JP3287283B2 (ja) * | 1997-10-20 | 2002-06-04 | 日本電気株式会社 | Pciバスの割り込みステアリング回路 |
US6339808B1 (en) * | 1999-01-04 | 2002-01-15 | Advanced Micro Devices, Inc. | Address space conversion to retain software compatibility in new architectures |
US8984199B2 (en) * | 2003-07-31 | 2015-03-17 | Intel Corporation | Inter-processor interrupts |
US20050283555A1 (en) * | 2004-06-22 | 2005-12-22 | General Electric Company | Computer system and method for transmitting interrupt messages through a parallel communication bus |
US20050283554A1 (en) * | 2004-06-22 | 2005-12-22 | General Electric Company | Computer system and method for queuing interrupt messages in a device coupled to a parallel communication bus |
US7225285B1 (en) * | 2004-09-07 | 2007-05-29 | Altera Corporation | Assigning interrupts in multi-master systems |
US20080109624A1 (en) * | 2006-11-03 | 2008-05-08 | Gilbert Jeffrey D | Multiprocessor system with private memory sections |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50115732A (de) * | 1974-02-22 | 1975-09-10 | ||
US4268904A (en) * | 1978-02-15 | 1981-05-19 | Tokyo Shibaura Electric Co., Ltd. | Interruption control method for multiprocessor system |
JPS5741727A (en) * | 1980-08-25 | 1982-03-09 | Hitachi Ltd | Interruption controlling sysyem |
US4604500A (en) * | 1981-12-02 | 1986-08-05 | At&T Bell Laboratories | Multiprocessing interrupt arrangement |
JPS58136862A (ja) * | 1982-02-05 | 1983-08-15 | 旭化成株式会社 | 畦パイル経編地及びその製法 |
JPS58178468A (ja) * | 1982-04-14 | 1983-10-19 | Omron Tateisi Electronics Co | デ−タ処理システムの割込方式 |
JPS59136862A (ja) * | 1983-01-26 | 1984-08-06 | Hitachi Ltd | マルチコンピユ−タシステムにおける割込み制御装置 |
US4769768A (en) * | 1983-09-22 | 1988-09-06 | Digital Equipment Corporation | Method and apparatus for requesting service of interrupts by selected number of processors |
JPS6095678A (ja) * | 1983-10-28 | 1985-05-29 | Mitsubishi Electric Corp | マルチプロセツサシステム |
JPS6159565A (ja) * | 1984-08-31 | 1986-03-27 | Hitachi Ltd | マルチコンピユ−タシステムの割込入力装置 |
JPH06159565A (ja) * | 1992-11-18 | 1994-06-07 | Mitsubishi Plastics Ind Ltd | 離脱防止管継手 |
-
1986
- 1986-04-15 JP JP61086921A patent/JPS62243058A/ja active Pending
-
1987
- 1987-04-10 WO PCT/JP1987/000225 patent/WO1987006370A1/ja active IP Right Grant
- 1987-04-10 EP EP87902716A patent/EP0263886B1/de not_active Expired - Lifetime
- 1987-04-10 DE DE8787902716T patent/DE3784210T2/de not_active Expired - Fee Related
- 1987-04-10 US US07/138,459 patent/US4930070A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE3784210T2 (de) | 1993-06-03 |
JPS62243058A (ja) | 1987-10-23 |
EP0263886A1 (de) | 1988-04-20 |
EP0263886A4 (de) | 1989-10-11 |
EP0263886B1 (de) | 1993-02-17 |
US4930070A (en) | 1990-05-29 |
WO1987006370A1 (en) | 1987-10-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |