DE3786594T2 - Speicherverwaltungseinheit für Digitalsignalprozessor. - Google Patents

Speicherverwaltungseinheit für Digitalsignalprozessor.

Info

Publication number
DE3786594T2
DE3786594T2 DE87301799T DE3786594T DE3786594T2 DE 3786594 T2 DE3786594 T2 DE 3786594T2 DE 87301799 T DE87301799 T DE 87301799T DE 3786594 T DE3786594 T DE 3786594T DE 3786594 T2 DE3786594 T2 DE 3786594T2
Authority
DE
Germany
Prior art keywords
memory
management unit
user
memory management
specified
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE87301799T
Other languages
English (en)
Other versions
DE3786594T3 (de
DE3786594D1 (de
Inventor
Bu-Chin Wang
Marita E Daly
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=25271044&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE3786594(T2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE3786594D1 publication Critical patent/DE3786594D1/de
Application granted granted Critical
Publication of DE3786594T2 publication Critical patent/DE3786594T2/de
Publication of DE3786594T3 publication Critical patent/DE3786594T3/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/355—Indexed addressing
    • G06F9/3552—Indexed addressing using wraparound, e.g. modulo or circular addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
DE3786594T 1986-03-04 1987-03-02 Speicherverwaltungseinheit für Digitalsignalprozessor. Expired - Fee Related DE3786594T3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/836,025 US4935867A (en) 1986-03-04 1986-03-04 Signal processor memory management unit with indirect addressing using selectable offsets and modulo values for indexed address calculations

Publications (3)

Publication Number Publication Date
DE3786594D1 DE3786594D1 (de) 1993-08-26
DE3786594T2 true DE3786594T2 (de) 1994-01-27
DE3786594T3 DE3786594T3 (de) 1998-04-30

Family

ID=25271044

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3786594T Expired - Fee Related DE3786594T3 (de) 1986-03-04 1987-03-02 Speicherverwaltungseinheit für Digitalsignalprozessor.

Country Status (5)

Country Link
US (2) US4935867A (de)
EP (1) EP0245922B2 (de)
JP (1) JP3027970B2 (de)
AT (1) ATE91814T1 (de)
DE (1) DE3786594T3 (de)

Families Citing this family (105)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4833602A (en) * 1987-06-29 1989-05-23 International Business Machines Corporation Signal generator using modulo means
KR920006283B1 (ko) * 1988-02-19 1992-08-03 미쯔비시덴끼 가부시끼가이샤 디지탈신호 처리방식
JPH01226066A (ja) * 1988-03-04 1989-09-08 Hitachi Ltd ディジタル信号処理プロセッサ
US5829054A (en) * 1989-05-04 1998-10-27 Texas Instruments Incorporated Devices and systems with parallel logic unit operable on data memory locations
US5327541A (en) * 1989-10-13 1994-07-05 Texas Instruments Inc. Global rotation of data in synchronous vector processor
EP0429733B1 (de) * 1989-11-17 1999-04-28 Texas Instruments Incorporated Multiprozessor mit Koordinatenschalter zwischen Prozessoren und Speichern
FR2666916A1 (fr) * 1990-09-19 1992-03-20 Alcatel Radiotelephone Vanne regulatrice de debit.
US5623621A (en) * 1990-11-02 1997-04-22 Analog Devices, Inc. Apparatus for generating target addresses within a circular buffer including a register for storing position and size of the circular buffer
EP0555382B1 (de) * 1990-11-02 1996-03-27 Analog Devices, Inc. Adressengenerator für einen ringpuffer
JPH0594546A (ja) * 1991-02-05 1993-04-16 American Teleph & Telegr Co <Att> デジタルプロセツサ
US5367648A (en) * 1991-02-20 1994-11-22 International Business Machines Corporation General purpose memory access scheme using register-indirect mode
DE69325207T2 (de) * 1992-06-15 1999-12-09 Koninkl Philips Electronics Nv Prozessor zur Verarbeitung zeitdiskreter Signale
US5386534A (en) * 1992-10-27 1995-01-31 Motorola, Inc. Data processing system for generating symmetrical range of addresses of instructing-address-value with the use of inverting sign value
US5463749A (en) * 1993-01-13 1995-10-31 Dsp Semiconductors Ltd Simplified cyclical buffer
JP3904244B2 (ja) 1993-09-17 2007-04-11 株式会社ルネサステクノロジ シングル・チップ・データ処理装置
JP3452655B2 (ja) * 1993-09-27 2003-09-29 株式会社日立製作所 ディジタル信号処理プロセッサおよびそれを用いて命令を実行する方法
US5426600A (en) * 1993-09-27 1995-06-20 Hitachi America, Ltd. Double precision division circuit and method for digital signal processor
US5381360A (en) * 1993-09-27 1995-01-10 Hitachi America, Ltd. Modulo arithmetic addressing circuit
US5740404A (en) * 1993-09-27 1998-04-14 Hitachi America Limited Digital signal processor with on-chip select decoder and wait state generator
US5440747A (en) * 1993-09-27 1995-08-08 Hitachi America, Ltd. Data processor with control logic for storing operation mode status and associated method
JP3532975B2 (ja) * 1993-09-27 2004-05-31 株式会社ルネサステクノロジ マイクロコンピュータおよびそれを用いて命令を実行する方法
US5513374A (en) * 1993-09-27 1996-04-30 Hitachi America, Inc. On-chip interface and DMA controller with interrupt functions for digital signal processor
JP3449566B2 (ja) * 1994-01-28 2003-09-22 株式会社リコー アドレス発生装置
US5524223A (en) * 1994-01-31 1996-06-04 Motorola, Inc. Instruction accelerator for processing loop instructions with address generator using multiple stored increment values
US5511017A (en) * 1994-06-01 1996-04-23 Exponential Technology, Inc. Reduced-modulus address generation using sign-extension and correction
US5790443A (en) * 1994-06-01 1998-08-04 S3 Incorporated Mixed-modulo address generation using shadow segment registers
US6735683B2 (en) 1994-09-14 2004-05-11 Hitachi, Ltd. Single-chip microcomputer with hierarchical internal bus structure having data and address signal lines coupling CPU with other processing elements
US5628026A (en) * 1994-12-05 1997-05-06 Motorola, Inc. Multi-dimensional data transfer in a data processing system and method therefor
US5659695A (en) * 1995-06-02 1997-08-19 Motorola, Inc. Method and apparatus utilizing simultaneous memory reads for increasing memory access bandwidth in a digital signal processor
US6901392B1 (en) * 1995-09-04 2005-05-31 Matsushita Electric Industrial Co., Ltd. Information filtering method and apparatus for preferentially taking out information having a high necessity
US6366930B1 (en) 1996-04-12 2002-04-02 Computer Associates Think, Inc. Intelligent data inventory & asset management systems method and apparatus
GB9622685D0 (en) * 1996-10-31 1997-01-08 Sgs Thomson Microelectronics An integrated circuit device and method of communication therewith
US6049858A (en) * 1997-08-27 2000-04-11 Lucent Technologies Inc. Modulo address generator with precomputed comparison and correction terms
US5983333A (en) * 1997-08-27 1999-11-09 Lucent Technologies Inc. High speed module address generator
US6047364A (en) * 1997-08-27 2000-04-04 Lucent Technologies Inc. True modulo addressing generator
US6073228A (en) * 1997-09-18 2000-06-06 Lucent Technologies Inc. Modulo address generator for generating an updated address
US6275984B1 (en) 1998-11-20 2001-08-14 Sega Of America, Inc. System and method for delaying indirect register offset resolution
US6594710B1 (en) * 1999-05-26 2003-07-15 Nec Electronics, Inc. Apparatus and method for a random access peripheral unit
US6598177B1 (en) 1999-10-01 2003-07-22 Stmicroelectronics Ltd. Monitoring error conditions in an integrated circuit
US6449712B1 (en) 1999-10-01 2002-09-10 Hitachi, Ltd. Emulating execution of smaller fixed-length branch/delay slot instructions with a sequence of larger fixed-length instructions
US7793261B1 (en) 1999-10-01 2010-09-07 Stmicroelectronics Limited Interface for transferring debug information
US6779145B1 (en) 1999-10-01 2004-08-17 Stmicroelectronics Limited System and method for communicating with an integrated circuit
US6574651B1 (en) 1999-10-01 2003-06-03 Hitachi, Ltd. Method and apparatus for arithmetic operation on vectored data
US6434665B1 (en) 1999-10-01 2002-08-13 Stmicroelectronics, Inc. Cache memory store buffer
US6460174B1 (en) 1999-10-01 2002-10-01 Stmicroelectronics, Ltd. Methods and models for use in designing an integrated circuit
US6408381B1 (en) 1999-10-01 2002-06-18 Hitachi, Ltd. Mechanism for fast access to control space in a pipeline processor
US6553460B1 (en) 1999-10-01 2003-04-22 Hitachi, Ltd. Microprocessor having improved memory management unit and cache memory
US7000078B1 (en) * 1999-10-01 2006-02-14 Stmicroelectronics Ltd. System and method for maintaining cache coherency in a shared memory system
US6826191B1 (en) 1999-10-01 2004-11-30 Stmicroelectronics Ltd. Packets containing transaction attributes
US6502210B1 (en) 1999-10-01 2002-12-31 Stmicroelectronics, Ltd. Microcomputer debug architecture and method
US6298394B1 (en) 1999-10-01 2001-10-02 Stmicroelectronics, Ltd. System and method for capturing information on an interconnect in an integrated circuit
US6615370B1 (en) 1999-10-01 2003-09-02 Hitachi, Ltd. Circuit for storing trace information
US6412047B2 (en) 1999-10-01 2002-06-25 Stmicroelectronics, Inc. Coherency protocol
US6629115B1 (en) 1999-10-01 2003-09-30 Hitachi, Ltd. Method and apparatus for manipulating vectored data
US6546480B1 (en) 1999-10-01 2003-04-08 Hitachi, Ltd. Instructions for arithmetic operations on vectored data
US6349371B1 (en) 1999-10-01 2002-02-19 Stmicroelectronics Ltd. Circuit for storing information
US6693914B1 (en) 1999-10-01 2004-02-17 Stmicroelectronics, Inc. Arbitration mechanism for packet transmission
US6601189B1 (en) 1999-10-01 2003-07-29 Stmicroelectronics Limited System and method for communicating with an integrated circuit
US6487683B1 (en) 1999-10-01 2002-11-26 Stmicroelectronics Limited Microcomputer debug architecture and method
US6591369B1 (en) 1999-10-01 2003-07-08 Stmicroelectronics, Ltd. System and method for communicating with an integrated circuit
US6463553B1 (en) 1999-10-01 2002-10-08 Stmicroelectronics, Ltd. Microcomputer debug architecture and method
US6351803B2 (en) 1999-10-01 2002-02-26 Hitachi Ltd. Mechanism for power efficient processing in a pipeline processor
US6457118B1 (en) 1999-10-01 2002-09-24 Hitachi Ltd Method and system for selecting and using source operands in computer system instructions
US6557119B1 (en) 1999-10-01 2003-04-29 Stmicroelectronics Limited Microcomputer debug architecture and method
US6701405B1 (en) 1999-10-01 2004-03-02 Hitachi, Ltd. DMA handshake protocol
US6918065B1 (en) 1999-10-01 2005-07-12 Hitachi, Ltd. Method for compressing and decompressing trace information
US6598128B1 (en) 1999-10-01 2003-07-22 Hitachi, Ltd. Microprocessor having improved memory management unit and cache memory
US6590907B1 (en) 1999-10-01 2003-07-08 Stmicroelectronics Ltd. Integrated circuit with additional ports
US6772325B1 (en) * 1999-10-01 2004-08-03 Hitachi, Ltd. Processor architecture and operation for exploiting improved branch control instruction
US7266728B1 (en) 1999-10-01 2007-09-04 Stmicroelectronics Ltd. Circuit for monitoring information on an interconnect
JP2001142692A (ja) * 1999-10-01 2001-05-25 Hitachi Ltd ２つの異なる固定長命令セットを実行するマイクロプロセッサ、マイクロコンピュータおよび命令実行方法
US6542983B1 (en) 1999-10-01 2003-04-01 Hitachi, Ltd. Microcomputer/floating point processor interface and method
US6732307B1 (en) 1999-10-01 2004-05-04 Hitachi, Ltd. Apparatus and method for storing trace information
US6684348B1 (en) 1999-10-01 2004-01-27 Hitachi, Ltd. Circuit for processing trace information
US6633971B2 (en) 1999-10-01 2003-10-14 Hitachi, Ltd. Mechanism for forward data in a processor pipeline using a single pipefile connected to the pipeline
US6412043B1 (en) 1999-10-01 2002-06-25 Hitachi, Ltd. Microprocessor having improved memory management unit and cache memory
US6665816B1 (en) 1999-10-01 2003-12-16 Stmicroelectronics Limited Data shift register
US6859891B2 (en) 1999-10-01 2005-02-22 Stmicroelectronics Limited Apparatus and method for shadowing processor information
US6530047B1 (en) 1999-10-01 2003-03-04 Stmicroelectronics Limited System and method for communicating with an integrated circuit
US6567932B2 (en) 1999-10-01 2003-05-20 Stmicroelectronics Limited System and method for communicating with an integrated circuit
US7260745B1 (en) 1999-10-01 2007-08-21 Stmicroelectronics Ltd. Detection of information on an interconnect
US6629207B1 (en) 1999-10-01 2003-09-30 Hitachi, Ltd. Method for loading instructions or data into a locked way of a cache memory
US7072817B1 (en) 1999-10-01 2006-07-04 Stmicroelectronics Ltd. Method of designing an initiator in an integrated circuit
US6820195B1 (en) 1999-10-01 2004-11-16 Hitachi, Ltd. Aligning load/store data with big/little endian determined rotation distance control
US6928073B2 (en) * 1999-10-01 2005-08-09 Stmicroelectronics Ltd. Integrated circuit implementing packet transmission
US6252821B1 (en) * 1999-12-29 2001-06-26 Intel Corporation Method and apparatus for memory address decode in memory subsystems supporting a large number of memory devices
US6721875B1 (en) * 2000-02-22 2004-04-13 Hewlett-Packard Development Company, L.P. Method and apparatus for implementing a single-syllable IP-relative branch instruction and a long IP-relative branch instruction in a processor which fetches instructions in bundle form
US6463518B1 (en) * 2000-06-19 2002-10-08 Philips Electronics No. America Corp. Generation of memory addresses for accessing a memory utilizing scheme registers
US6647484B1 (en) 2000-09-19 2003-11-11 3 Dsp Corporation Transpose address mode in general purpose DSP processor
CN1315058C (zh) * 2002-02-07 2007-05-09 旺宏电子股份有限公司 存储器中的循环寻址的地址产生装置及其集成电路
US7293155B2 (en) 2003-05-30 2007-11-06 Intel Corporation Management of access to data from memory
GB2402757B (en) * 2003-06-11 2005-11-02 Advanced Risc Mach Ltd Address offset generation within a data processing system
US7213099B2 (en) * 2003-12-30 2007-05-01 Intel Corporation Method and apparatus utilizing non-uniformly distributed DRAM configurations and to detect in-range memory address matches
US7594102B2 (en) * 2004-12-15 2009-09-22 Stmicroelectronics, Inc. Method and apparatus for vector execution on a scalar machine
US7533238B2 (en) * 2005-08-19 2009-05-12 International Business Machines Corporation Method for limiting the size of a local storage of a processor
US7849125B2 (en) 2006-07-07 2010-12-07 Via Telecom Co., Ltd Efficient computation of the modulo operation based on divisor (2n-1)
US7650322B2 (en) * 2006-10-23 2010-01-19 Analog Devices, Inc. Method and apparatus for mapping the primary operational sequences of an algorithm in a compute unit having an internal random access memory
US8667597B2 (en) * 2008-06-25 2014-03-04 Lockheed Martin Corporation Systems, methods, and products for secure code execution
US9405561B2 (en) 2012-08-08 2016-08-02 Nvidia Corporation Method and system for memory overlays for portable function pointers
US10509725B2 (en) 2013-03-08 2019-12-17 Oracle International Corporation Flushing by copying entries in a non-coherent cache to main memory
US20140258635A1 (en) * 2013-03-08 2014-09-11 Oracle International Corporation Invalidating entries in a non-coherent cache
US20140310484A1 (en) * 2013-04-16 2014-10-16 Nvidia Corporation System and method for globally addressable gpu memory
US9881592B2 (en) 2013-10-08 2018-01-30 Nvidia Corporation Hardware overlay assignment
US9543963B2 (en) 2015-01-30 2017-01-10 International Business Machines Corporation Modulo-m binary counter
US10180829B2 (en) * 2015-12-15 2019-01-15 Nxp Usa, Inc. System and method for modulo addressing vectorization with invariant code motion

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3883853A (en) * 1973-08-02 1975-05-13 Burroughs Corp Address generator for rotating data storage devices
US3943495A (en) * 1973-12-26 1976-03-09 Xerox Corporation Microprocessor with immediate and indirect addressing
US3949378A (en) * 1974-12-09 1976-04-06 The United States Of America As Represented By The Secretary Of The Navy Computer memory addressing employing base and index registers
CH613540A5 (de) * 1975-02-26 1979-09-28 Siemens Ag
US4047247A (en) * 1976-04-07 1977-09-06 Honeywell Information Systems Inc. Address formation in a microprogrammed data processing system
US4150434A (en) * 1976-05-08 1979-04-17 Tokyo Shibaura Electric Co., Ltd. Matrix arithmetic apparatus
US4169289A (en) * 1977-07-08 1979-09-25 Bell Telephone Laboratories, Incorporated Data processor with improved cyclic data buffer apparatus
US4202035A (en) * 1977-11-25 1980-05-06 Mcdonnell Douglas Corporation Modulo addressing apparatus for use in a microprocessor
US4202305A (en) * 1978-07-25 1980-05-13 Wabash, Inc. Capacitor discharge ignition system with timing stabilization arrangement
FR2472231B1 (fr) * 1979-12-20 1986-02-21 Cii Honeywell Bull Dispositif d'adressage d'elements d'informations dans une table a plusieurs entrees, enregistree dans une memoire
US4627017A (en) * 1980-10-22 1986-12-02 International Business Machines Corporation Address range determination
JPS58208981A (ja) * 1982-05-28 1983-12-05 Nec Corp アドレス制御回路
JPS5922165A (ja) * 1982-07-28 1984-02-04 Nippon Telegr & Teleph Corp <Ntt> アドレス制御回路
US4531200A (en) * 1982-12-02 1985-07-23 International Business Machines Corporation Indexed-indirect addressing using prefix codes
JPS60129853A (ja) * 1983-12-19 1985-07-11 Matsushita Electric Ind Co Ltd アドレス発生装置
NL8304442A (nl) * 1983-12-27 1985-07-16 Koninkl Philips Electronics Nv Geintegreerde en programmeerbare processor voor woordsgewijze digitale signaalbewerking.
JPS60173653A (ja) * 1984-02-20 1985-09-07 Oki Electric Ind Co Ltd Ｄｍａ制御装置
FR2561429B1 (fr) * 1984-03-13 1986-09-19 Trt Telecom Radio Electr Dispositif d'adressage pour fournir a une memoire des codes d'adresse
JPS60195643A (ja) * 1984-03-19 1985-10-04 Oki Electric Ind Co Ltd デ−タ処理装置
US4584666A (en) * 1984-06-21 1986-04-22 Motorola, Inc. Method and apparatus for signed and unsigned bounds check
JPS616745A (ja) * 1984-06-21 1986-01-13 Matsushita Electric Ind Co Ltd アドレス発生装置
US4763250A (en) * 1985-04-01 1988-08-09 Motorola, Inc. Paged memory management unit having variable number of translation table levels

Also Published As

Publication number Publication date
EP0245922A3 (en) 1990-08-16
US5440705A (en) 1995-08-08
DE3786594T3 (de) 1998-04-30
DE3786594D1 (de) 1993-08-26
EP0245922B1 (de) 1993-07-21
US4935867A (en) 1990-06-19
JPS62208146A (ja) 1987-09-12
ATE91814T1 (de) 1993-08-15
EP0245922A2 (de) 1987-11-19
JP3027970B2 (ja) 2000-04-04
EP0245922B2 (de) 1997-07-23

Similar Documents

Publication Publication Date Title
DE3786594T2 (de) Speicherverwaltungseinheit für Digitalsignalprozessor.
KR840001368A (ko) 데이타 처리 시스템에서의 선택적 캐쉬 클리어링 방법과 장치
NO940148D0 (no) Fremgangsmaate for administrsjon av hukommelse
CA2022656A1 (en) Translation look-aside buffer for a computer memory system
WO2000010126A3 (en) Trilinear texture filtering with optimized memory access
CA2027226A1 (en) Information Processing System
KR880011665A (ko) 디스크 파일 개방방법
JPS5454536A (en) Data processor
EP0365117A3 (de) Datenverarbeitungsvorrichtung mit Cache-Speicher
KR960015368A (ko) 데이타 프로세싱 시스템
ES2100102T3 (es) Disposicion con unidades maestras-esclavas.
CA2081913A1 (en) Method and apparatus for managing page zero memory accesses in a multi-processor system
JP3013631B2 (ja) キャッシュメモリ同期方法
JPS54128639A (en) Control system for cash memory
EP0206050A3 (de) Virtuell adressierter Cache-Speicher mit physikalischen Etiketten
KR920013174A (ko) 스마트 카드를 이용한 근태관리 시스팀
KR900000773A (ko) 캐쉬 메모리 유닛을 액세스하기 위해 가상 어드레스를 실제 어드레스로 번역하는 장치 및 방법
JPS52144942A (en) Information processing system in the health insurance doctor point calculator
JPS55157054A (en) Disc cash unit
EP0376253A3 (de) Informationsverarbeitungsvorrichtung mit Cache-Speicher
SU542907A1 (ru) Способ стереоскопической съемки рельефа на универсальном стереофотограмметрическом приборе
JPS6115251A (ja) 仮想記憶制御方式
KR890009877A (ko) 1-아실-2-피라졸린유도체의 제조방법
JPS5637878A (en) Cash memory control system
EP0339157A3 (de) Einrichtung zur Adressenübersetzung für einen Rechnerspeicher

Legal Events

Date Code Title Description
8363 Opposition against the patent
8366 Restricted maintained after opposition proceedings
8339 Ceased/non-payment of the annual fee