DE3789334D1 - Digitale adaptive Abstimmung. - Google Patents

Digitale adaptive Abstimmung.

Info

Publication number
DE3789334D1
DE3789334D1 DE87305580T DE3789334T DE3789334D1 DE 3789334 D1 DE3789334 D1 DE 3789334D1 DE 87305580 T DE87305580 T DE 87305580T DE 3789334 T DE3789334 T DE 3789334T DE 3789334 D1 DE3789334 D1 DE 3789334D1
Authority
DE
Germany
Prior art keywords
digital adaptive
adaptive tuning
tuning
digital
adaptive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE87305580T
Other languages
English (en)
Inventor
Brian Ralph Larson
Donald Bruce Bennett
Thomas Ormond Wolff
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Unisys Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unisys Corp filed Critical Unisys Corp
Application granted granted Critical
Publication of DE3789334D1 publication Critical patent/DE3789334D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/18Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187Voting techniques
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/18Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
DE87305580T 1986-06-27 1987-06-23 Digitale adaptive Abstimmung. Expired - Lifetime DE3789334D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/879,695 US4723242A (en) 1986-06-27 1986-06-27 Digital adaptive voting

Publications (1)

Publication Number Publication Date
DE3789334D1 true DE3789334D1 (de) 1994-04-21

Family

ID=25374696

Family Applications (1)

Application Number Title Priority Date Filing Date
DE87305580T Expired - Lifetime DE3789334D1 (de) 1986-06-27 1987-06-23 Digitale adaptive Abstimmung.

Country Status (4)

Country Link
US (1) US4723242A (de)
EP (1) EP0251658B1 (de)
JP (1) JPS638943A (de)
DE (1) DE3789334D1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4829198A (en) * 1987-04-10 1989-05-09 International Business Machines Corporation Fault tolerant logical circuitry
US5586252A (en) * 1994-05-24 1996-12-17 International Business Machines Corporation System for failure mode and effects analysis
US5691723A (en) * 1995-09-11 1997-11-25 E-Systems, Inc. Apparatus and method for encoding and decoding data on tactical air navigation and distance measuring equipment signals
US8095841B2 (en) * 2008-08-19 2012-01-10 Formfactor, Inc. Method and apparatus for testing semiconductor devices with autonomous expected value generation

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3544778A (en) * 1967-11-29 1970-12-01 Westinghouse Electric Corp Decision network
JPS5039976B1 (de) * 1968-11-20 1975-12-20
GB1253309A (en) * 1969-11-21 1971-11-10 Marconi Co Ltd Improvements in or relating to data processing arrangements
DE2202231A1 (de) * 1972-01-18 1973-07-26 Siemens Ag Verarbeitungssystem mit verdreifachten systemeinheiten
US3783250A (en) * 1972-02-25 1974-01-01 Nasa Adaptive voting computer system
US4015246A (en) * 1975-04-14 1977-03-29 The Charles Stark Draper Laboratory, Inc. Synchronous fault tolerant multi-processor system
DE2740840A1 (de) * 1977-08-09 1979-02-22 Bbc Brown Boveri & Cie Anlage zur ueberwachung der aussagekraft von auf einer anzahl n funktionell parallelgeschalteter datenkanaelen aufgebrachter elektrischer daten sowie deren verwendung
US4326291A (en) * 1979-04-11 1982-04-20 Sperry Rand Corporation Error detection system
US4342083A (en) * 1980-02-05 1982-07-27 The Bendix Corporation Communication system for a multiple-computer system
DE3036655A1 (de) * 1980-09-29 1982-05-13 Siemens AG, 1000 Berlin und 8000 München Verfahren zur erkennung von digitalinformation bei einer digitalen informationsuebertragung, insbesondere informationsuebertragung in mobilfunk-kommunikationssystemen
EP0053577A1 (de) * 1980-12-03 1982-06-09 Felix Kappler Einrichtung zum selbsttätigen Verschliessen eines Aufbewahrungsbehälters
US4593396A (en) * 1982-10-08 1986-06-03 August Systems Process for a fault-tolerant data processing system with error detection and resistance to fault propagation
JPS5985153A (ja) * 1982-11-08 1984-05-17 Hitachi Ltd 冗長化制御装置
US4562575A (en) * 1983-07-07 1985-12-31 Motorola, Inc. Method and apparatus for the selection of redundant system modules
US4570261A (en) * 1983-12-09 1986-02-11 Motorola, Inc. Distributed fault isolation and recovery system and method
US4551814A (en) * 1983-12-12 1985-11-05 Aerojet-General Corporation Functionally redundant logic network architectures
US4551815A (en) * 1983-12-12 1985-11-05 Aerojet-General Corporation Functionally redundant logic network architectures with logic selection means
US4617475A (en) * 1984-03-30 1986-10-14 Trilogy Computer Development Partners, Ltd. Wired logic voting circuit

Also Published As

Publication number Publication date
EP0251658A2 (de) 1988-01-07
JPS638943A (ja) 1988-01-14
US4723242A (en) 1988-02-02
EP0251658B1 (de) 1994-03-16
EP0251658A3 (en) 1989-11-15

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Legal Events

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