DE3789604D1 - Datenprozessor zur parallelen Ausführung von miteinander im Konflikt stehenden Befehlen. - Google Patents

Datenprozessor zur parallelen Ausführung von miteinander im Konflikt stehenden Befehlen.

Info

Publication number
DE3789604D1
DE3789604D1 DE3789604T DE3789604T DE3789604D1 DE 3789604 D1 DE3789604 D1 DE 3789604D1 DE 3789604 T DE3789604 T DE 3789604T DE 3789604 T DE3789604 T DE 3789604T DE 3789604 D1 DE3789604 D1 DE 3789604D1
Authority
DE
Germany
Prior art keywords
data processor
parallel execution
conflicting commands
conflicting
commands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3789604T
Other languages
English (en)
Other versions
DE3789604T2 (de
Inventor
Eiki Kamada
Yooichi Shintani
Kazunori Kuriyama
Tohru Shonai
Kiyoshi Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE3789604D1 publication Critical patent/DE3789604D1/de
Application granted granted Critical
Publication of DE3789604T2 publication Critical patent/DE3789604T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
DE3789604T 1986-11-28 1987-11-24 Datenprozessor zur parallelen Ausführung von miteinander im Konflikt stehenden Befehlen. Expired - Fee Related DE3789604T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61281720A JPH0810430B2 (ja) 1986-11-28 1986-11-28 情報処理装置

Publications (2)

Publication Number Publication Date
DE3789604D1 true DE3789604D1 (de) 1994-05-19
DE3789604T2 DE3789604T2 (de) 1994-07-21

Family

ID=17643043

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3789604T Expired - Fee Related DE3789604T2 (de) 1986-11-28 1987-11-24 Datenprozessor zur parallelen Ausführung von miteinander im Konflikt stehenden Befehlen.

Country Status (4)

Country Link
US (1) US4928226A (de)
EP (1) EP0269980B1 (de)
JP (1) JPH0810430B2 (de)
DE (1) DE3789604T2 (de)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2783285B2 (ja) * 1988-08-10 1998-08-06 株式会社日立製作所 情報処理装置
JP2810068B2 (ja) * 1988-11-11 1998-10-15 株式会社日立製作所 プロセッサシステム、コンピュータシステム及び命令処理方法
US5167026A (en) * 1989-02-03 1992-11-24 Digital Equipment Corporation Simultaneously or sequentially decoding multiple specifiers of a variable length pipeline instruction based on detection of modified value of specifier registers
US5073855A (en) * 1989-06-30 1991-12-17 Bull Hn Information Systems Inc. Resource conflict detection method and apparatus included in a pipelined processing unit
US5745723A (en) * 1989-09-04 1998-04-28 Mitsubishi Denki Kabushiki Kaisha Data processing system capable of execution of plural instructions in parallel
US5615349A (en) * 1990-09-04 1997-03-25 Mitsubishi Denki Kabushiki Kaisha Data processing system capable of execution of plural instructions in parallel
JPH07120284B2 (ja) * 1989-09-04 1995-12-20 三菱電機株式会社 データ処理装置
US5123108A (en) * 1989-09-11 1992-06-16 Wang Laboratories, Inc. Improved cpu pipeline having register file bypass and working register bypass on update/access address compare
JP2816248B2 (ja) * 1989-11-08 1998-10-27 株式会社日立製作所 データプロセッサ
JPH03154947A (ja) * 1989-11-13 1991-07-02 Nec Corp 情報処理装置
US5295249A (en) * 1990-05-04 1994-03-15 International Business Machines Corporation Compounding preprocessor for cache for identifying multiple instructions which may be executed in parallel
US5432918A (en) * 1990-06-29 1995-07-11 Digital Equipment Corporation Method and apparatus for ordering read and write operations using conflict bits in a write queue
EP0463965B1 (de) * 1990-06-29 1998-09-09 Digital Equipment Corporation Sprungvorhersageeinheit für hochleistungsfähigen Prozessor
US5471591A (en) * 1990-06-29 1995-11-28 Digital Equipment Corporation Combined write-operand queue and read-after-write dependency scoreboard
US5450555A (en) * 1990-06-29 1995-09-12 Digital Equipment Corporation Register logging in pipelined computer using register log queue of register content changes and base queue of register log queue pointers for respective instructions
JP2834292B2 (ja) * 1990-08-15 1998-12-09 株式会社日立製作所 データ・プロセッサ
JP2642529B2 (ja) * 1991-04-30 1997-08-20 株式会社東芝 並列プロセッサーの命令分配処理装置
US5539911A (en) 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
EP0547247B1 (de) 1991-07-08 2001-04-04 Seiko Epson Corporation Risc-prozessor mit dehnbarer architektur
US5493687A (en) 1991-07-08 1996-02-20 Seiko Epson Corporation RISC microprocessor architecture implementing multiple typed register sets
JP2779557B2 (ja) * 1991-07-09 1998-07-23 三菱電機株式会社 並列演算処理装置
JP2685999B2 (ja) * 1991-07-15 1997-12-08 株式会社ピーエフユー 並列実行方式
US5283874A (en) * 1991-10-21 1994-02-01 Intel Corporation Cross coupling mechanisms for simultaneously completing consecutive pipeline instructions even if they begin to process at the same microprocessor of the issue fee
EP0544083A3 (en) * 1991-11-26 1994-09-14 Ibm Interleaved risc-type parallel processor and processing methods
WO1993020505A2 (en) 1992-03-31 1993-10-14 Seiko Epson Corporation Superscalar risc instruction scheduling
DE69308548T2 (de) 1992-05-01 1997-06-12 Seiko Epson Corp Vorrichtung und verfahren zum befehlsabschluss in einem superskalaren prozessor.
EP0682789B1 (de) 1992-12-31 1998-09-09 Seiko Epson Corporation System und verfahren zur änderung der namen von registern
US5628021A (en) 1992-12-31 1997-05-06 Seiko Epson Corporation System and method for assigning tags to control instruction processing in a superscalar processor
CA2123442A1 (en) * 1993-09-20 1995-03-21 David S. Ray Multiple execution unit dispatch with instruction dependency
JPH07200289A (ja) * 1993-12-28 1995-08-04 Fujitsu Ltd 情報処理装置
US20050071830A1 (en) * 2003-09-30 2005-03-31 Starcore, Llc Method and system for processing a sequence of instructions

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5621240A (en) * 1979-07-27 1981-02-27 Hitachi Ltd Information processor
JPS5928793B2 (ja) 1979-09-06 1984-07-16 ロス・オペレ−テイング・バルブ・カンパニ− 複式安全弁
JPS57155666A (en) * 1981-03-20 1982-09-25 Fujitsu Ltd Instruction controlling system of vector processor
US4532589A (en) * 1981-12-02 1985-07-30 Hitachi, Ltd. Digital data processor with two operation units
JPS58176151A (ja) * 1982-04-06 1983-10-15 石川島播磨重工業株式会社 セメント焼成設備のクリンカ品質制御方法
JPS58176751A (ja) 1982-04-09 1983-10-17 Hitachi Ltd 命令語解読ユニツト
JPS58189739A (ja) * 1982-04-30 1983-11-05 Hitachi Ltd デ−タ処理システム
JPS58189738A (ja) * 1982-04-30 1983-11-05 Hitachi Ltd デ−タ処理システム
JPS592143A (ja) * 1982-06-29 1984-01-07 Hitachi Ltd 情報処理装置
JPS5932045A (ja) * 1982-08-16 1984-02-21 Hitachi Ltd 情報処理装置
JPH063584B2 (ja) * 1983-12-19 1994-01-12 株式会社日立製作所 情報処理装置
JPH0658631B2 (ja) * 1983-12-19 1994-08-03 株式会社日立製作所 デ−タ処理装置
JPS61160142A (ja) * 1984-12-29 1986-07-19 Hitachi Ltd デ−タ処理装置
JPH0762823B2 (ja) * 1985-05-22 1995-07-05 株式会社日立製作所 デ−タ処理装置

Also Published As

Publication number Publication date
EP0269980A2 (de) 1988-06-08
EP0269980B1 (de) 1994-04-13
JPS63136138A (ja) 1988-06-08
US4928226A (en) 1990-05-22
EP0269980A3 (en) 1990-04-04
JPH0810430B2 (ja) 1996-01-31
DE3789604T2 (de) 1994-07-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee