DE3880569T2 - Verfahren zum Zussamenbau einer Halbleiterchip-Packung mit automatischer Bandmontage. - Google Patents

Verfahren zum Zussamenbau einer Halbleiterchip-Packung mit automatischer Bandmontage.

Info

Publication number
DE3880569T2
DE3880569T2 DE88306472T DE3880569T DE3880569T2 DE 3880569 T2 DE3880569 T2 DE 3880569T2 DE 88306472 T DE88306472 T DE 88306472T DE 3880569 T DE3880569 T DE 3880569T DE 3880569 T2 DE3880569 T2 DE 3880569T2
Authority
DE
Germany
Prior art keywords
assembling
semiconductor chip
chip package
tape assembly
automatic tape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE88306472T
Other languages
English (en)
Other versions
DE3880569D1 (de
Inventor
Ralph W Doe
Steven P Hansen
Kenneth M Brown
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of DE3880569D1 publication Critical patent/DE3880569D1/de
Application granted granted Critical
Publication of DE3880569T2 publication Critical patent/DE3880569T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01059—Praseodymium [Pr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
DE88306472T 1987-07-16 1988-07-14 Verfahren zum Zussamenbau einer Halbleiterchip-Packung mit automatischer Bandmontage. Expired - Fee Related DE3880569T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/073,991 US4843695A (en) 1987-07-16 1987-07-16 Method of assembling tab bonded semiconductor chip package

Publications (2)

Publication Number Publication Date
DE3880569D1 DE3880569D1 (de) 1993-06-03
DE3880569T2 true DE3880569T2 (de) 1993-11-18

Family

ID=22117045

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88306472T Expired - Fee Related DE3880569T2 (de) 1987-07-16 1988-07-14 Verfahren zum Zussamenbau einer Halbleiterchip-Packung mit automatischer Bandmontage.

Country Status (9)

Country Link
US (1) US4843695A (de)
EP (1) EP0299775B1 (de)
JP (1) JPS6490546A (de)
KR (1) KR890003019A (de)
CN (1) CN1012602B (de)
AU (1) AU601054B2 (de)
CA (1) CA1297597C (de)
DE (1) DE3880569T2 (de)
IL (1) IL87095A (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5593973A (en) * 1987-09-04 1997-01-14 Hemispherx Biopharma Inc. Treatment of viral hepatitis with mismatched dsRNA
US5115299A (en) * 1989-07-13 1992-05-19 Gte Products Corporation Hermetically sealed chip carrier with ultra violet transparent cover
US5142444A (en) * 1989-08-31 1992-08-25 Hewlett-Packard Company Demountable tape-automated bonding system
US5559369A (en) * 1989-10-02 1996-09-24 Advanced Micro Devices, Inc. Ground plane for plastic encapsulated integrated circuit die packages
US5073521A (en) * 1989-11-15 1991-12-17 Olin Corporation Method for housing a tape-bonded electronic device and the package employed
US5113565A (en) * 1990-07-06 1992-05-19 International Business Machines Corp. Apparatus and method for inspection and alignment of semiconductor chips and conductive lead frames
EP0472866A3 (en) * 1990-07-23 1994-09-07 Nat Semiconductor Corp Ferroelectric device packaging techniques
US5239806A (en) * 1990-11-02 1993-08-31 Ak Technology, Inc. Thermoplastic semiconductor package and method of producing it
JPH0477260U (de) * 1990-11-17 1992-07-06
US6111308A (en) * 1991-06-05 2000-08-29 Advanced Micro Devices, Inc. Ground plane for plastic encapsulated integrated circuit die packages
KR100259335B1 (ko) * 1991-12-23 2000-09-01 김영환 리드 온 칩 및 칩 온 리드 구조 패키지 조립방법
CA2120280C (en) * 1994-03-30 1998-08-18 Chris J. Stratas Method and apparatus for retention of a fragile conductive trace with a protective clamp
US5650593A (en) * 1994-05-26 1997-07-22 Amkor Electronics, Inc. Thermally enhanced chip carrier package
US5827999A (en) * 1994-05-26 1998-10-27 Amkor Electronics, Inc. Homogeneous chip carrier package
SG64848A1 (en) * 1995-12-05 2002-12-17 Advanced Systems Automation Shaftless roller for lead forming apparatus
US5834336A (en) * 1996-03-12 1998-11-10 Texas Instruments Incorporated Backside encapsulation of tape automated bonding device
SE510861C2 (sv) * 1997-07-11 1999-06-28 Ericsson Telefon Ab L M Anordning och förfarande i elektroniksystem
CN100345295C (zh) * 2003-12-22 2007-10-24 奇景光电股份有限公司 半导体封装构造
US7295433B2 (en) * 2005-10-28 2007-11-13 Delphi Technologies, Inc. Electronics assembly having multiple side cooling and method
CN101740413B (zh) * 2009-12-15 2013-04-17 天水七四九电子有限公司 Csop陶瓷小外形封装方法
KR101214671B1 (ko) * 2011-10-27 2012-12-21 삼성전기주식회사 전자 부품 내장형 인쇄회로기판 및 그 제조 방법
JP6162643B2 (ja) 2014-05-21 2017-07-12 三菱電機株式会社 半導体装置
JP6848802B2 (ja) * 2017-10-11 2021-03-24 三菱電機株式会社 半導体装置
CN110600384A (zh) * 2019-08-29 2019-12-20 宜特(上海)检测技术有限公司 用于芯片的局部封胶方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3374537A (en) * 1965-03-22 1968-03-26 Philco Ford Corp Method of connecting leads to a semiconductive device
DE1614575A1 (de) * 1966-08-16 1970-05-27 Signetics Corp Aufbau einer integrierten Schaltung und Verfahren zum Herstellen dieses Aufbaues
US3984620A (en) * 1975-06-04 1976-10-05 Raytheon Company Integrated circuit chip test and assembly package
US4472876A (en) * 1981-08-13 1984-09-25 Minnesota Mining And Manufacturing Company Area-bonding tape
JPS60165748A (ja) * 1984-02-08 1985-08-28 Toshiba Corp リ−ドフレ−ム
DE3512628A1 (de) * 1984-04-11 1985-10-17 Moran, Peter, Cork Packung fuer eine integrierte schaltung
US4631820A (en) * 1984-08-23 1986-12-30 Canon Kabushiki Kaisha Mounting assembly and mounting method for an electronic component
JPS61168247A (ja) * 1985-01-19 1986-07-29 Nec Kansai Ltd セラミツクパツケ−ジ
JPS6263449A (ja) * 1986-08-01 1987-03-20 Hitachi Ltd 半導体装置の製造法
US4914741A (en) * 1987-06-08 1990-04-03 Digital Equipment Corporation Tape automated bonding semiconductor package
KR0181471B1 (ko) * 1990-07-27 1999-05-15 윌리암 피.브레이든 컴퓨터 데이타 경로배정 시스템

Also Published As

Publication number Publication date
CN1012602B (zh) 1991-05-08
IL87095A (en) 1991-08-16
AU601054B2 (en) 1990-08-30
DE3880569D1 (de) 1993-06-03
CN1031446A (zh) 1989-03-01
EP0299775A3 (en) 1990-01-17
EP0299775B1 (de) 1993-04-28
KR890003019A (ko) 1989-04-12
JPH0474862B2 (de) 1992-11-27
US4843695A (en) 1989-07-04
CA1297597C (en) 1992-03-17
EP0299775A2 (de) 1989-01-18
JPS6490546A (en) 1989-04-07
IL87095A0 (en) 1988-12-30
AU1894488A (en) 1989-01-19

Similar Documents

Publication Publication Date Title
DE3880569T2 (de) Verfahren zum Zussamenbau einer Halbleiterchip-Packung mit automatischer Bandmontage.
DE3781247D1 (de) Verfahren zum herstellen einer halbleiteranordnung mit mindestens zwei halbleiterchips.
DE3852291D1 (de) Automatische Bandmontagen-Packung für einen Halbleiterchip mit Entkupplung.
DE3583934D1 (de) Verfahren zum herstellen einer halbleiterverbundanordnung.
DE68903535D1 (de) System zum automatischen positionieren einer vielzahl von werkzeugtraegern.
DE3483579D1 (de) Verfahren zum herstellen einer leiterbahn.
DE69031350D1 (de) Mehrschichtpackung mit einer vertieften höhlung für einen halbleiter-chip
DE68917995T2 (de) Verfahren zum Herstellen einer Halbleitervorrichtung.
DE3686600D1 (de) Verfahren zum herstellen einer harzumhuellten halbleiteranordnung.
DE68919549T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung.
DE3686990D1 (de) Verfahren zum herstellen einer halbleiteranordnung wobei ein filmtraegerband angewendet wird.
DE3586109D1 (de) Verfahren zum herstellen einer verbindungsstruktur von einer halbleiteranordnung.
DE3483531D1 (de) Verfahren zum herstellen einer integrierten halbleiterschaltkreisanordnung mit einem misfet.
KR840009181A (ko) 반도체 장치의 제조방법
DE68920094T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung.
DE68906034T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung.
DE3671324D1 (de) Verfahren zum herstellen einer halbleiteranordnung.
DE3574525D1 (de) Verfahren zum herstellen von kontakten auf einer halbleitervorrichtung.
KR870009466A (ko) 패케이지 구조를 갖는 반도체장치 제조방법
DE3889018T2 (de) Halbleiterpackung mit automatischer Bandmontage.
DE3788119T2 (de) Verfahren zum Herstellen einer Halbleitervorrichtung mit vermindertem Verpackungsdruck.
KR850005729A (ko) 반도체 장치의 제조방법
DE3852124T2 (de) Verfahren zum Herstellen einer Halbleiteranordnung vom harzumhüllten Typ.
DE3883856D1 (de) Verfahren zum Herstellen einer Halbleiteranordnung.
NL188923C (nl) Werkwijze ter vervaardiging van een halfgeleiderinrichting.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee