DE3880750D1 - Vertikale transistor-/kapazitaetspeicherzellen-struktur und herstellungsverfahren dafuer. - Google Patents

Vertikale transistor-/kapazitaetspeicherzellen-struktur und herstellungsverfahren dafuer.

Info

Publication number
DE3880750D1
DE3880750D1 DE8888108135T DE3880750T DE3880750D1 DE 3880750 D1 DE3880750 D1 DE 3880750D1 DE 8888108135 T DE8888108135 T DE 8888108135T DE 3880750 T DE3880750 T DE 3880750T DE 3880750 D1 DE3880750 D1 DE 3880750D1
Authority
DE
Germany
Prior art keywords
manufacturing
cell structure
storage cell
method therefor
capacity storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888108135T
Other languages
English (en)
Other versions
DE3880750T2 (de
Inventor
Wei Hwang
Nicky C Lu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3880750D1 publication Critical patent/DE3880750D1/de
Publication of DE3880750T2 publication Critical patent/DE3880750T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66181—Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors with potential-jump barrier or surface barrier
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945—Trench capacitors
DE88108135T 1987-07-20 1988-05-20 Vertikale Transistor-/Kapazitätspeicherzellen-Struktur und Herstellungsverfahren dafür. Expired - Fee Related DE3880750T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/075,791 US4816884A (en) 1987-07-20 1987-07-20 High density vertical trench transistor and capacitor memory cell structure and fabrication method therefor

Publications (2)

Publication Number Publication Date
DE3880750D1 true DE3880750D1 (de) 1993-06-09
DE3880750T2 DE3880750T2 (de) 1993-10-28

Family

ID=22128011

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88108135T Expired - Fee Related DE3880750T2 (de) 1987-07-20 1988-05-20 Vertikale Transistor-/Kapazitätspeicherzellen-Struktur und Herstellungsverfahren dafür.

Country Status (6)

Country Link
US (1) US4816884A (de)
EP (1) EP0300157B1 (de)
JP (1) JPS6437865A (de)
BR (1) BR8803623A (de)
CA (1) CA1285333C (de)
DE (1) DE3880750T2 (de)

Families Citing this family (83)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5017504A (en) * 1986-12-01 1991-05-21 Mitsubishi Denki Kabushiki Kaisha Vertical type MOS transistor and method of formation thereof
JPS63237460A (ja) * 1987-03-25 1988-10-03 Mitsubishi Electric Corp 半導体装置
US5028980A (en) * 1988-12-21 1991-07-02 Texas Instruments Incorporated Trench capacitor with expanded area
US4954854A (en) * 1989-05-22 1990-09-04 International Business Machines Corporation Cross-point lightly-doped drain-source trench transistor and fabrication process therefor
US5124766A (en) * 1989-06-30 1992-06-23 Texas Instruments Incorporated Filament channel transistor interconnected with a conductor
JP2529781B2 (ja) * 1990-04-03 1996-09-04 エレクトロニクス アンド テレコミュニケーションズ リサーチ インスティテュート 垂直トランジスタ―を有するスタック−トレンチ構造のｄｒａｍセルおよびその製造方法
JPH04212450A (ja) * 1990-04-11 1992-08-04 Mitsubishi Electric Corp 半導体記憶装置およびその製造方法
US5107459A (en) * 1990-04-20 1992-04-21 International Business Machines Corporation Stacked bit-line architecture for high density cross-point memory cell array
US4988637A (en) * 1990-06-29 1991-01-29 International Business Machines Corp. Method for fabricating a mesa transistor-trench capacitor memory cell structure
US5055898A (en) * 1991-04-30 1991-10-08 International Business Machines Corporation DRAM memory cell having a horizontal SOI transfer device disposed over a buried storage node and fabrication methods therefor
TW313677B (de) * 1991-08-14 1997-08-21 Gold Star Electronics
US5365097A (en) * 1992-10-05 1994-11-15 International Business Machines Corporation Vertical epitaxial SOI transistor, memory cell and fabrication methods
US5363327A (en) * 1993-01-19 1994-11-08 International Business Machines Corporation Buried-sidewall-strap two transistor one capacitor trench cell
EP0683921B1 (de) * 1993-02-04 2004-06-16 Cornell Research Foundation, Inc. Mikrostrukturen und einzelmask, einkristall-herstellungsverfahren
US5641694A (en) * 1994-12-22 1997-06-24 International Business Machines Corporation Method of fabricating vertical epitaxial SOI transistor
US6236079B1 (en) 1997-12-02 2001-05-22 Kabushiki Kaisha Toshiba Dynamic semiconductor memory device having a trench capacitor
US6069390A (en) 1998-01-15 2000-05-30 International Business Machines Corporation Semiconductor integrated circuits with mesas
US6177299B1 (en) 1998-01-15 2001-01-23 International Business Machines Corporation Transistor having substantially isolated body and method of making the same
US6369418B1 (en) 1998-03-19 2002-04-09 Lsi Logic Corporation Formation of a novel DRAM cell
US6177699B1 (en) * 1998-03-19 2001-01-23 Lsi Logic Corporation DRAM cell having a verticle transistor and a capacitor formed on the sidewalls of a trench isolation
US6037620A (en) * 1998-06-08 2000-03-14 International Business Machines Corporation DRAM cell with transfer device extending along perimeter of trench storage capacitor
US5915183A (en) * 1998-06-26 1999-06-22 International Business Machines Corporation Raised source/drain using recess etch of polysilicon
US6140175A (en) * 1999-03-03 2000-10-31 International Business Machines Corporation Self-aligned deep trench DRAM array device
US6376873B1 (en) 1999-04-07 2002-04-23 International Business Machines Corporation Vertical DRAM cell with robust gate-to-storage node isolation
US6281539B1 (en) * 2000-03-31 2001-08-28 International Business Machines Corporation Structure and process for 6F2 DT cell having vertical MOSFET and large storage capacitance
DE10027913A1 (de) * 2000-05-31 2001-12-13 Infineon Technologies Ag Speicherzelle mit einem Grabenkondensator
US6621112B2 (en) * 2000-12-06 2003-09-16 Infineon Technologies Ag DRAM with vertical transistor and trench capacitor memory cells and methods of fabrication
US6774426B2 (en) 2000-12-19 2004-08-10 Micron Technology, Inc. Flash cell with trench source-line connection
US6537920B1 (en) * 2001-03-16 2003-03-25 Advanced Micro Devices, Inc. Formation of vertical transistors using block copolymer lithography
TWI230392B (en) 2001-06-18 2005-04-01 Innovative Silicon Sa Semiconductor device
US6620676B2 (en) * 2001-06-29 2003-09-16 International Business Machines Corporation Structure and methods for process integration in vertical DRAM cell fabrication
JP4212838B2 (ja) * 2002-06-26 2009-01-21 カルピス株式会社 抗アレルギー剤
US6727540B2 (en) * 2002-08-23 2004-04-27 International Business Machines Corporation Structure and method of fabricating embedded DRAM having a vertical device array and a bordered bitline contact
KR100854816B1 (ko) * 2003-03-13 2008-08-27 기린 홀딩스 가부시키가이샤 항알레르기용 조성물
US6909137B2 (en) * 2003-04-07 2005-06-21 International Business Machines Corporation Method of creating deep trench capacitor using a P+ metal electrode
US20040228168A1 (en) 2003-05-13 2004-11-18 Richard Ferrant Semiconductor memory device and method of operating same
US7335934B2 (en) 2003-07-22 2008-02-26 Innovative Silicon S.A. Integrated circuit device, and method of fabricating same
DE10345460B4 (de) * 2003-09-30 2007-01-04 Infineon Technologies Ag Verfahren zur Herstellung eines Lochgraben-Speicherkondensators in einem Halbleitersubstrat
US7485910B2 (en) * 2005-04-08 2009-02-03 International Business Machines Corporation Simplified vertical array device DRAM/eDRAM integration: method and structure
US7606066B2 (en) 2005-09-07 2009-10-20 Innovative Silicon Isi Sa Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same
US7683430B2 (en) 2005-12-19 2010-03-23 Innovative Silicon Isi Sa Electrically floating body memory cell and array, and method of operating or controlling same
US7492632B2 (en) 2006-04-07 2009-02-17 Innovative Silicon Isi Sa Memory array having a programmable word length, and method of operating same
WO2007128738A1 (en) 2006-05-02 2007-11-15 Innovative Silicon Sa Semiconductor memory cell and array using punch-through to program and read same
US8069377B2 (en) 2006-06-26 2011-11-29 Micron Technology, Inc. Integrated circuit having memory array including ECC and column redundancy and method of operating the same
US7542340B2 (en) 2006-07-11 2009-06-02 Innovative Silicon Isi Sa Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same
WO2008090475A2 (en) 2007-01-26 2008-07-31 Innovative Silicon S.A. Floating-body dram transistor comprising source/drain regions separated from the gated body region
US8518774B2 (en) 2007-03-29 2013-08-27 Micron Technology, Inc. Manufacturing process for zero-capacitor random access memory circuits
US8064274B2 (en) 2007-05-30 2011-11-22 Micron Technology, Inc. Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same
US8085594B2 (en) 2007-06-01 2011-12-27 Micron Technology, Inc. Reading technique for memory cell with electrically floating body transistor
WO2009039169A1 (en) 2007-09-17 2009-03-26 Innovative Silicon S.A. Refreshing data of memory cells with electrically floating body transistors
US8536628B2 (en) 2007-11-29 2013-09-17 Micron Technology, Inc. Integrated circuit having memory cell array including barriers, and method of manufacturing same
US8349662B2 (en) 2007-12-11 2013-01-08 Micron Technology, Inc. Integrated circuit having memory cell array, and method of manufacturing same
US20090159947A1 (en) * 2007-12-19 2009-06-25 International Business Machines Corporation SIMPLIFIED VERTICAL ARRAY DEVICE DRAM/eDRAM INTEGRATION
US8773933B2 (en) 2012-03-16 2014-07-08 Micron Technology, Inc. Techniques for accessing memory cells
US8014195B2 (en) 2008-02-06 2011-09-06 Micron Technology, Inc. Single transistor memory cell
US8189376B2 (en) 2008-02-08 2012-05-29 Micron Technology, Inc. Integrated circuit having memory cells including gate material having high work function, and method of manufacturing same
US7957206B2 (en) 2008-04-04 2011-06-07 Micron Technology, Inc. Read circuitry for an integrated circuit having memory cells and/or a memory cell array, and method of operating same
US7947543B2 (en) 2008-09-25 2011-05-24 Micron Technology, Inc. Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation
US7933140B2 (en) 2008-10-02 2011-04-26 Micron Technology, Inc. Techniques for reducing a voltage swing
US7924630B2 (en) 2008-10-15 2011-04-12 Micron Technology, Inc. Techniques for simultaneously driving a plurality of source lines
US8223574B2 (en) 2008-11-05 2012-07-17 Micron Technology, Inc. Techniques for block refreshing a semiconductor memory device
US8213226B2 (en) 2008-12-05 2012-07-03 Micron Technology, Inc. Vertical transistor memory cell and array
US8319294B2 (en) 2009-02-18 2012-11-27 Micron Technology, Inc. Techniques for providing a source line plane
US8710566B2 (en) 2009-03-04 2014-04-29 Micron Technology, Inc. Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device
US8748959B2 (en) 2009-03-31 2014-06-10 Micron Technology, Inc. Semiconductor memory device
US8139418B2 (en) 2009-04-27 2012-03-20 Micron Technology, Inc. Techniques for controlling a direct injection semiconductor memory device
US8508994B2 (en) 2009-04-30 2013-08-13 Micron Technology, Inc. Semiconductor device with floating gate and electrically floating body
US8498157B2 (en) 2009-05-22 2013-07-30 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8537610B2 (en) 2009-07-10 2013-09-17 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US9076543B2 (en) 2009-07-27 2015-07-07 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8199595B2 (en) 2009-09-04 2012-06-12 Micron Technology, Inc. Techniques for sensing a semiconductor memory device
US8174881B2 (en) 2009-11-24 2012-05-08 Micron Technology, Inc. Techniques for reducing disturbance in a semiconductor device
US8310893B2 (en) 2009-12-16 2012-11-13 Micron Technology, Inc. Techniques for reducing impact of array disturbs in a semiconductor memory device
US8416636B2 (en) 2010-02-12 2013-04-09 Micron Technology, Inc. Techniques for controlling a semiconductor memory device
US8411513B2 (en) 2010-03-04 2013-04-02 Micron Technology, Inc. Techniques for providing a semiconductor memory device having hierarchical bit lines
US8576631B2 (en) 2010-03-04 2013-11-05 Micron Technology, Inc. Techniques for sensing a semiconductor memory device
US8369177B2 (en) 2010-03-05 2013-02-05 Micron Technology, Inc. Techniques for reading from and/or writing to a semiconductor memory device
EP3511982A1 (de) 2010-03-15 2019-07-17 Micron Technology, Inc. Verfahren zur bereitstellung einer halbleiterspeichervorrichtung
US8411524B2 (en) 2010-05-06 2013-04-02 Micron Technology, Inc. Techniques for refreshing a semiconductor memory device
US8652925B2 (en) 2010-07-19 2014-02-18 International Business Machines Corporation Method of fabricating isolated capacitors and structure thereof
US8531878B2 (en) 2011-05-17 2013-09-10 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US9559216B2 (en) 2011-06-06 2017-01-31 Micron Technology, Inc. Semiconductor memory device and method for biasing same
CN110557969B (zh) * 2018-04-03 2023-05-16 深圳市汇顶科技股份有限公司 阻变式存储器的制造方法和阻变式存储器

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583269A (ja) * 1981-06-30 1983-01-10 Fujitsu Ltd 縦型ｍｏｓダイナミツクメモリ−セル
JPS5919366A (ja) * 1982-07-23 1984-01-31 Hitachi Ltd 半導体記憶装置
JPS5982761A (ja) * 1982-11-04 1984-05-12 Hitachi Ltd 半導体メモリ
US4651184A (en) * 1984-08-31 1987-03-17 Texas Instruments Incorporated Dram cell and array
JPS61179571A (ja) * 1984-09-27 1986-08-12 テキサス　インスツルメンツ　インコ−ポレイテツド メモリセルおよびそのアレイ
EP0180026B1 (de) * 1984-10-31 1992-01-08 Texas Instruments Incorporated DRAM-Zelle und Verfahren
CN1004734B (zh) * 1984-12-07 1989-07-05 得克萨斯仪器公司 动态随机存取存贮器单元(dram)和生产方法
US4649625A (en) * 1985-10-21 1987-03-17 International Business Machines Corporation Dynamic memory device having a single-crystal transistor on a trench capacitor structure and a fabrication method therefor

Also Published As

Publication number Publication date
BR8803623A (pt) 1989-02-08
US4816884A (en) 1989-03-28
EP0300157B1 (de) 1993-05-05
DE3880750T2 (de) 1993-10-28
JPS6437865A (en) 1989-02-08
EP0300157A2 (de) 1989-01-25
CA1285333C (en) 1991-06-25
EP0300157A3 (en) 1989-09-13

Similar Documents

Publication Publication Date Title
DE3880750D1 (de) Vertikale transistor-/kapazitaetspeicherzellen-struktur und herstellungsverfahren dafuer.
DE3885185D1 (de) Vertikal-Trench-Transistor-/Kapazitätsspeicherzellen-Struktur und Herstellungsverfahren dafür.
DE3882557D1 (de) Dram-zelle und herstellungsverfahren.
KR870005471A (ko) 적층형 용량을 갖는 반도체 메모리와 그의 제조방법
DE3681602D1 (de) Halbleiterspeicheranordnung mit speicherzellen mit gestapelten kapazitaeten und verfahren zu ihrer herstellung.
DE3686626D1 (de) Speicherzelle.
DE344894T1 (de) Speicherzelle.
DE3584709D1 (de) Dynamische speicherzelle mit wahlfreiem zugriff (dram).
DE3888632D1 (de) Schichtstruktur für eine Speicherzelle für eine dynamische Speicheranordnung mit wahlfreiem Zugriff und Herstellungsverfahren dafür.
DE68908937D1 (de) Speicher und statische Speicherzelle; Speicherungsverfahren.
DE3684214D1 (de) Strahlungsfeste speicherzelle.
DE3884891D1 (de) Aktive Matrixzelle und deren Herstellungsverfahren.
DE3851402D1 (de) Integrierte sonnenzelle und herstellungsverfahren.
DE3585731D1 (de) Dram-zelle und verfahren.
EP0177066A3 (en) Semiconductor memory device with information storage vertical trench capacitor and method of manufacturing the same
DE3766152D1 (de) Elektrochemische speicherzelle.
DE3879766D1 (de) Halbleiter speicherzelle.
DE3585136D1 (de) Dram-zelle und verfahren.
DE68915603D1 (de) BIC-Speicherzellenstruktur und Herstellungsverfahren dafür.
BR8807806A (pt) Celula eletroquimica
DE3750872D1 (de) Nichtflüchtige speicherzelle.
DE3854005D1 (de) Speicherzelle.
DE3850048D1 (de) Speicherzellenzugriff.
DE3685717D1 (de) Speicherzellenanordnung.
DE3675347D1 (de) Halbleiterspeicher und herstellungsverfahren.

Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee