DE3889525T2 - Zwangsmässige Synchronisation zweier Impulsfolgen. - Google Patents

Zwangsmässige Synchronisation zweier Impulsfolgen.

Info

Publication number
DE3889525T2
DE3889525T2 DE3889525T DE3889525T DE3889525T2 DE 3889525 T2 DE3889525 T2 DE 3889525T2 DE 3889525 T DE3889525 T DE 3889525T DE 3889525 T DE3889525 T DE 3889525T DE 3889525 T2 DE3889525 T2 DE 3889525T2
Authority
DE
Germany
Prior art keywords
pulse trains
forced synchronization
synchronization
forced
trains
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3889525T
Other languages
English (en)
Other versions
DE3889525D1 (de
Inventor
Michael Joseph Azevedo
Charles Anthony Corchero
Donald John Lang
Gilbert Rouse Woodman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE3889525D1 publication Critical patent/DE3889525D1/de
Application granted granted Critical
Publication of DE3889525T2 publication Critical patent/DE3889525T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H04L7/0012—Synchronisation information channels, e.g. clock distribution lines by comparing receiver clock with transmitter clock
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S331/00—Oscillators
    • Y10S331/02—Phase locked loop having lock indicating or detecting means
DE3889525T 1987-11-17 1988-10-26 Zwangsmässige Synchronisation zweier Impulsfolgen. Expired - Fee Related DE3889525T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/121,667 US4868514A (en) 1987-11-17 1987-11-17 Apparatus and method for digital compensation of oscillator drift

Publications (2)

Publication Number Publication Date
DE3889525D1 DE3889525D1 (de) 1994-06-16
DE3889525T2 true DE3889525T2 (de) 1994-11-10

Family

ID=22398093

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3889525T Expired - Fee Related DE3889525T2 (de) 1987-11-17 1988-10-26 Zwangsmässige Synchronisation zweier Impulsfolgen.

Country Status (4)

Country Link
US (1) US4868514A (de)
EP (1) EP0318155B1 (de)
JP (1) JPH0779236B2 (de)
DE (1) DE3889525T2 (de)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4931986A (en) * 1989-03-03 1990-06-05 Ncr Corporation Computer system clock generator for generating tuned multiple clock signals
US4985639A (en) * 1989-07-07 1991-01-15 Hewlett-Packard Company Logic edge timing generation
US5258660A (en) * 1990-01-16 1993-11-02 Cray Research, Inc. Skew-compensated clock distribution system
GB2241620B (en) * 1990-02-13 1994-11-30 Matsushita Electric Ind Co Ltd A pulse signal delay device
FR2670343B1 (fr) * 1990-12-10 2003-07-04 Aerospatiale Procede de synchronisation de deux suites d'impulsions numeriques s et rf a haute frequence et dispositif pour la mise en óoeuvre du procede.
US5204559A (en) * 1991-01-23 1993-04-20 Vitesse Semiconductor Corporation Method and apparatus for controlling clock skew
FR2676605B1 (fr) * 1991-05-17 1996-12-20 Thomson Video Equip Boucle a verrouillage de phase numerique et recepteur comportant une telle boucle.
US5245231A (en) * 1991-12-30 1993-09-14 Dell Usa, L.P. Integrated delay line
DE69326193D1 (de) * 1992-05-26 1999-10-07 Digital Equipment Corp Phasenregelkreis mit einer Zustandsmaschine
US5218314A (en) * 1992-05-29 1993-06-08 National Semiconductor Corporation High resolution, multi-frequency digital phase-locked loop
US5867695A (en) * 1992-10-16 1999-02-02 International Business Machines Corp. Method and system for reduced metastability between devices which communicate and operate at different clock frequencies
US5811998A (en) * 1993-01-28 1998-09-22 Digital Equipment Corporation State machine phase lock loop
JP3247190B2 (ja) * 1993-04-13 2002-01-15 三菱電機株式会社 位相同期回路および集積回路装置
DE4447764C2 (de) * 1993-04-13 2002-02-21 Mitsubishi Electric Corp Phase-Locked-Schaltung
SE501190C2 (sv) * 1993-04-28 1994-12-05 Ellemtel Utvecklings Ab Digitalt styrd kristalloscillator
US5515403A (en) * 1994-06-21 1996-05-07 Dsc Communications Corporation Apparatus and method for clock alignment and switching
US5507029A (en) * 1995-01-11 1996-04-09 International Business Machines Corporation Method for minimizing the time skew of electrical signals in very large scale integrated circuits
KR100201711B1 (ko) * 1995-04-28 1999-06-15 오우라 히로시 지연 시간 제어 회로
JP3499051B2 (ja) * 1995-06-22 2004-02-23 株式会社アドバンテスト タイミング信号発生回路
US5712583A (en) * 1995-11-13 1998-01-27 International Business Machines Corporation Clock phase alignment using frequency comparison
US5638019A (en) * 1995-11-17 1997-06-10 International Business Machines Corporation Accurately generating precisely skewed clock signals
US5805088A (en) * 1996-11-01 1998-09-08 International Business Machines Corporation High speed asynchronous serial to parallel data converter
US5964846A (en) * 1997-07-07 1999-10-12 International Business Machines Corporation System and method for mapping processor clock values in a multiprocessor system
KR100261216B1 (ko) * 1997-11-21 2000-07-01 윤종용 프로그래머블 지연라인
KR100269316B1 (ko) 1997-12-02 2000-10-16 윤종용 동기지연회로가결합된지연동기루프(dll)및위상동기루프(pll)
US6069506A (en) * 1998-05-20 2000-05-30 Micron Technology, Inc. Method and apparatus for improving the performance of digital delay locked loop circuits
DE19910415B4 (de) * 1999-03-10 2010-12-09 Robert Bosch Gmbh Verfahren und Vorrichtung zum Abstimmen eines ersten Oszillators mit einem zweiten Oszillator
US6441666B1 (en) 2000-07-20 2002-08-27 Silicon Graphics, Inc. System and method for generating clock signals
KR100385232B1 (ko) * 2000-08-07 2003-05-27 삼성전자주식회사 서로 다른 주파수를 가지는 클럭 신호들을 동기화시키는회로
US6738922B1 (en) 2000-10-06 2004-05-18 Vitesse Semiconductor Corporation Clock recovery unit which uses a detected frequency difference signal to help establish phase lock between a transmitted data signal and a recovered clock signal
DE10064929A1 (de) * 2000-12-23 2002-07-04 Alcatel Sa Verfahren und Kompensationsmodul zur Phasenkompensation von Taktsignalen
WO2002056476A1 (fr) * 2001-01-15 2002-07-18 Sanyo Electric Co., Ltd. Circuit pll (boucle a verrouillage de phase)
US7231008B2 (en) * 2002-11-15 2007-06-12 Vitesse Semiconductor Corporation Fast locking clock and data recovery unit
DE10301239B4 (de) * 2003-01-15 2005-04-28 Infineon Technologies Ag Verfahren und Vorrichtung zur Erzeugung von verzögerten Signalen
US6970045B1 (en) 2003-06-25 2005-11-29 Nel Frequency Controls, Inc. Redundant clock module
US7253671B2 (en) * 2004-06-28 2007-08-07 Intelliserv, Inc. Apparatus and method for compensating for clock drift in downhole drilling components
US7088156B2 (en) * 2004-08-31 2006-08-08 Micron Technology, Inc. Delay-locked loop having a pre-shift phase detector
JP4940726B2 (ja) * 2006-03-29 2012-05-30 日本電気株式会社 クロック遅延補正回路
CN101599807A (zh) * 2009-06-19 2009-12-09 中兴通讯股份有限公司 一种使主备时钟相位对齐的方法和装置
US8483344B2 (en) 2011-06-13 2013-07-09 Stephen C. Dillinger Fast lock serializer-deserializer (SERDES) architecture
US8884666B2 (en) * 2011-08-02 2014-11-11 Ps4 Luxco S.A.R.L. Clock generator
US9106400B2 (en) * 2012-10-23 2015-08-11 Futurewei Technologies, Inc. Hybrid timing recovery for burst mode receiver in passive optical networks
CN111179987B (zh) * 2019-12-11 2022-03-29 深圳市国微电子有限公司 3d堆叠存储器、时钟偏斜消除方法及时钟偏斜消除电路
TWI743791B (zh) * 2020-05-18 2021-10-21 瑞昱半導體股份有限公司 多晶片系統、晶片與時脈同步方法

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3440546A (en) * 1965-11-15 1969-04-22 Ibm Variable period and pulse width delay line pulse generating system
US3505478A (en) * 1966-04-13 1970-04-07 Nippon Electric Co Clock frequency converter for time division multiplexed pulse communication system
US3593158A (en) * 1969-06-04 1971-07-13 Control Data Corp Variable frequency pulse generator
US3599011A (en) * 1969-07-16 1971-08-10 Us Navy Delay line clock
US4051440A (en) * 1973-05-15 1977-09-27 Tektronix, Inc. Phase locked demodulator
US3829790A (en) * 1973-09-14 1974-08-13 Gte Automatic Electric Lab Inc Clock distribution circuit
CA1073096A (en) * 1975-10-01 1980-03-04 Walter Arnstein Time base error corrector
US4025874A (en) * 1976-04-30 1977-05-24 Rockwell International Corporation Master/slave clock arrangement for providing reliable clock signal
US4019143A (en) * 1976-05-10 1977-04-19 Bell Telephone Laboratories, Incorporated Standby apparatus for clock signal generators
US4055814A (en) * 1976-06-14 1977-10-25 Pertec Computer Corporation Phase locked loop for synchronizing VCO with digital data pulses
GB1529116A (en) * 1976-06-25 1978-10-18 Indesit Receiver having a device for tuning the receiver to a selected signal frequency for reception by the receiver
US4065796A (en) * 1976-09-22 1977-12-27 Hewlett-Packard Company Digital data decoder
US4119796A (en) * 1976-11-01 1978-10-10 Versitron, Inc. Automatic data synchronizer
US4105932A (en) * 1976-11-24 1978-08-08 Tektronix, Inc. "Slewed pulse" scope sweep calibrator
US4137503A (en) * 1977-09-01 1979-01-30 Honeywell Inc. Phase shifting apparatus
US4165490A (en) * 1977-12-19 1979-08-21 International Business Machines Corporation Clock pulse generator with selective pulse delay and pulse width control
US4223404A (en) * 1978-04-26 1980-09-16 Raytheon Company Apparatus for recycling complete cycles of a stored periodic signal
US4290022A (en) * 1979-04-16 1981-09-15 General Electric Company Digitally programmable phase shifter
US4282493A (en) * 1979-07-02 1981-08-04 Motorola, Inc. Redundant clock signal generating circuitry
US4316148A (en) * 1979-09-04 1982-02-16 Sperry Corporation Variable frequency logic clock
DE2945331C2 (de) * 1979-11-09 1984-05-30 Nixdorf Computer Ag, 4790 Paderborn Vorrichtung in einer Signal-oder Datenverarbeitungsanlage zur Einstellung einer Signalverarbeitungsschaltung
NL183214C (nl) * 1980-01-31 1988-08-16 Philips Nv Inrichting voor het synchroniseren van de fase van een lokaal opgewekt kloksignaal met de fase van een ingangssignaal.
US4338569A (en) * 1980-03-11 1982-07-06 Control Data Corporation Delay lock loop
US4412342A (en) * 1981-12-18 1983-10-25 Gte Automatic Electric Labs Inc. Clock synchronization system
US4511859A (en) * 1982-08-30 1985-04-16 At&T Bell Laboratories Apparatus for generating a common output signal as a function of any of a plurality of diverse input signals
EP0106904B1 (de) * 1982-10-22 1985-06-26 Deutsche ITT Industries GmbH IC-Satz aus zwei integrierten Schaltungen mit einer PLL-Schleife für Farbfernsehempfänger
US4479216A (en) * 1982-12-22 1984-10-23 At&T Bell Laboratories Skew-free clock circuit for integrated circuit chip
US4514647A (en) * 1983-08-01 1985-04-30 At&T Bell Laboratories Chipset synchronization arrangement
US4546269A (en) * 1983-12-01 1985-10-08 Control Data Corporation Method and apparatus for optimally tuning clock signals for digital computers
JPS60204121A (ja) * 1984-03-29 1985-10-15 Fujitsu Ltd 位相同期回路
US4560939A (en) * 1984-04-02 1985-12-24 Sperry Corporation Synchronized selectable rate clocking system
DE3443924A1 (de) * 1984-12-01 1986-06-05 Philips Patentverwaltung Gmbh, 2000 Hamburg Schaltungsanordnung zum ableiten eines stellsignals
US4698600A (en) * 1985-02-04 1987-10-06 International Business Machines Corporation Clock phase discriminator
US4682121A (en) * 1985-02-04 1987-07-21 International Business Machines Corporation Phase discriminator and data standardizer

Also Published As

Publication number Publication date
DE3889525D1 (de) 1994-06-16
US4868514A (en) 1989-09-19
JPH022214A (ja) 1990-01-08
EP0318155A1 (de) 1989-05-31
JPH0779236B2 (ja) 1995-08-23
EP0318155B1 (de) 1994-05-11

Similar Documents

Publication Publication Date Title
DE3889525T2 (de) Zwangsmässige Synchronisation zweier Impulsfolgen.
ES2025255B3 (es) Metodo para la produccion de 1 - olefinpolimeros
DE3850339D1 (de) "Master/Slave"-Synchronisierungsschaltung und -verfahren.
DE3764800D1 (de) Gleitschiene.
NO172862C (no) Trykkpulsgenerator
DE69020641T2 (de) Synchronisation einer Sequenz.
IS3339A7 (is) Ný efnablanda lyfja
DE3850162T2 (de) Rahmensynchronisierungsapparat.
ES555200A0 (es) Procedimiento para la produccion de derivados del morfinano
NO872498L (no) FremgangsmŸte for synkronisering av to binŸrpulstog.
FR2627655B1 (fr) Circuit de reconnaissance de synchronisation ligne
DE3882168D1 (de) Synchronisierungs-taktsignalerzeuger.
DE3578225D1 (de) Pulssynchronisationseinrichtung.
NO882630D0 (no) Oljeblandinger med oeket viskositet og fremgangsmaate for fremstilling derav.
NO854794L (no) Fremgangsmaate for reell-tids klokkesynkronisering.
ES2018757B3 (es) Procedimiento para la produccion de polvometalurgica de levas
DK559288A (da) Farmaceutisk praeparat for piperidinoalkanolderivater
DE3851483T2 (de) Digitale-Synchronisierung.
DE3886203T2 (de) Prozessor-Prozessor-Synchronisierung.
BE892637A (fr) Circuit de synchronisation
IT8721057A0 (it) Complesso anti-tremolio per un separatore di umpulsi di sincronizzazione.
IT8719363A0 (it) Procedimento per la produzione di calcourea.
DE8708530U1 (de) Gardinenschienenhalter
FR2596600B1 (fr) Generateur de signaux de synchronisation programmable
ES554184A0 (es) Procedimiento de producir interferona humana.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee