DE50115869D1 - Verfahren zur Herstellung eines Bipolartransistors - Google Patents

Verfahren zur Herstellung eines Bipolartransistors

Info

Publication number
DE50115869D1
DE50115869D1 DE50115869T DE50115869T DE50115869D1 DE 50115869 D1 DE50115869 D1 DE 50115869D1 DE 50115869 T DE50115869 T DE 50115869T DE 50115869 T DE50115869 T DE 50115869T DE 50115869 D1 DE50115869 D1 DE 50115869D1
Authority
DE
Germany
Prior art keywords
base
layer
undercut
lead
cutout
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE50115869T
Other languages
English (en)
Inventor
Martin Franosch
Herbert Schaefer
Thomas Meister
Reinhard Stengl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE50115869T priority Critical patent/DE50115869D1/de
Application granted granted Critical
Publication of DE50115869D1 publication Critical patent/DE50115869D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H01L29/66287—Silicon vertical transistors with a single crystalline emitter, collector or base including extrinsic, link or graft base formed on the silicon substrate, e.g. by epitaxy, recrystallisation, after insulating device isolation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/732—Vertical transistors
    • H01L29/7322—Vertical transistors having emitter-base and base-collector junctions leaving at the same surface of the body, e.g. planar transistor
DE50115869T 2000-02-08 2001-02-07 Verfahren zur Herstellung eines Bipolartransistors Expired - Lifetime DE50115869D1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE50115869T DE50115869D1 (de) 2000-02-08 2001-02-07 Verfahren zur Herstellung eines Bipolartransistors

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10005442A DE10005442A1 (de) 2000-02-08 2000-02-08 Bipolartransistor
PCT/EP2001/001324 WO2001059845A2 (de) 2000-02-08 2001-02-07 Bipolartransistor
DE50115869T DE50115869D1 (de) 2000-02-08 2001-02-07 Verfahren zur Herstellung eines Bipolartransistors

Publications (1)

Publication Number Publication Date
DE50115869D1 true DE50115869D1 (de) 2011-06-16

Family

ID=7630164

Family Applications (2)

Application Number Title Priority Date Filing Date
DE10005442A Withdrawn DE10005442A1 (de) 2000-02-08 2000-02-08 Bipolartransistor
DE50115869T Expired - Lifetime DE50115869D1 (de) 2000-02-08 2001-02-07 Verfahren zur Herstellung eines Bipolartransistors

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE10005442A Withdrawn DE10005442A1 (de) 2000-02-08 2000-02-08 Bipolartransistor

Country Status (5)

Country Link
US (2) US6867105B2 (de)
EP (1) EP1254482B1 (de)
AT (1) ATE508475T1 (de)
DE (2) DE10005442A1 (de)
WO (1) WO2001059845A2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10160509A1 (de) * 2001-11-30 2003-06-12 Ihp Gmbh Halbleitervorrichtung und Verfahren zu ihrer Herstellung
US6888255B2 (en) * 2003-05-30 2005-05-03 Texas Instruments Incorporated Built-up bump pad structure and method for same
US7049201B2 (en) * 2003-11-06 2006-05-23 Chartered Semionductor Manufacturing Ltd. Method and apparatus for a heterojunction bipolar transistor using self-aligned epitaxy
WO2009141753A1 (en) * 2008-05-21 2009-11-26 Nxp B.V. A method of manufacturing a bipolar transistor semiconductor device and semiconductor devices obtained thereby
US7816221B2 (en) * 2008-06-26 2010-10-19 Freescale Semiconductor, Inc. Dielectric ledge for high frequency devices
US8536012B2 (en) 2011-07-06 2013-09-17 International Business Machines Corporation Bipolar junction transistors with a link region connecting the intrinsic and extrinsic bases
DE202013012442U1 (de) 2013-10-21 2016-11-23 Federal-Mogul Bremsbelag Gmbh Trägerkörper für einen Bremsbelag einer Scheibenbremse mit Tilgermasse zur Veränderung der Schwingung
DE102016216084B8 (de) 2016-08-26 2021-12-23 Infineon Technologies Dresden Gmbh Verfahren zum Herstellen eines Bipolartransistors
US11640975B2 (en) 2021-06-17 2023-05-02 Nxp Usa, Inc. Silicided collector structure

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5296391A (en) * 1982-03-24 1994-03-22 Nec Corporation Method of manufacturing a bipolar transistor having thin base region
JP2793837B2 (ja) * 1989-05-10 1998-09-03 株式会社日立製作所 半導体装置の製造方法およびヘテロ接合バイポーラトランジスタ
DE69130598T2 (de) * 1990-08-31 1999-07-08 Nec Corp Bipolartransistor und dessen Herstellungsverfahren
US5391503A (en) * 1991-05-13 1995-02-21 Sony Corporation Method of forming a stacked semiconductor device wherein semiconductor layers and insulating films are sequentially stacked and forming openings through such films and etchings using one of the insulating films as a mask
DE59209271D1 (de) * 1991-09-23 1998-05-14 Siemens Ag Verfahren zur Herstellung eines seitlich begrenzten, einkristallinen Gebietes in einem Bipolartransistor
US5422203A (en) * 1992-09-28 1995-06-06 Bell Communications Research, Inc. Rapid reversible intercalation of lithium into carbon secondary battery electrodes
ATE169350T1 (de) * 1992-12-04 1998-08-15 Siemens Ag Verfahren zur herstellung eines seitlich begrenzten, einkristallinen gebietes mittels selektiver epitaxie und dessen anwendung zur herstellung eines bipolartransistors sowie eines mos-transistors
JP2531355B2 (ja) * 1993-06-30 1996-09-04 日本電気株式会社 バイポ―ラトランジスタおよびその製造方法
JP2551353B2 (ja) * 1993-10-07 1996-11-06 日本電気株式会社 半導体装置及びその製造方法
JP2630237B2 (ja) * 1993-12-22 1997-07-16 日本電気株式会社 半導体装置及びその製造方法
JP2720793B2 (ja) * 1994-05-12 1998-03-04 日本電気株式会社 半導体装置の製造方法
JP2606141B2 (ja) * 1994-06-16 1997-04-30 日本電気株式会社 半導体装置およびその製造方法
JP2629644B2 (ja) * 1995-03-22 1997-07-09 日本電気株式会社 半導体装置の製造方法
JP2746225B2 (ja) * 1995-10-16 1998-05-06 日本電気株式会社 半導体装置及びその製造方法
EP0834189B1 (de) * 1996-03-29 2004-07-14 Koninklijke Philips Electronics N.V. Herstellung einer halbleiteranordnung mit einer epitaxialen halbleiterschicht
EP0818829A1 (de) * 1996-07-12 1998-01-14 Hitachi, Ltd. Bipolartransistor und dessen Herstellungsverfahren
KR100233834B1 (ko) * 1996-12-09 1999-12-01 한흥섭 규소/규소게르마늄 쌍극자 트랜지스터 제조방법
JP3658745B2 (ja) * 1998-08-19 2005-06-08 株式会社ルネサステクノロジ バイポーラトランジスタ

Also Published As

Publication number Publication date
ATE508475T1 (de) 2011-05-15
DE10005442A1 (de) 2001-08-16
EP1254482B1 (de) 2011-05-04
WO2001059845A2 (de) 2001-08-16
US20050006723A1 (en) 2005-01-13
US6867105B2 (en) 2005-03-15
EP1254482A2 (de) 2002-11-06
US20030020139A1 (en) 2003-01-30
WO2001059845A3 (de) 2002-05-10
US7135757B2 (en) 2006-11-14

Similar Documents

Publication Publication Date Title
ATE309025T1 (de) Verfahren zur herstellung vertikaler hohlnadeln aus einem halbleitersubstrat
DE50115869D1 (de) Verfahren zur Herstellung eines Bipolartransistors
EP1248299A3 (de) Bipolartransistor mit isoliertem Gate und Verfahren zu dessen Herstellung
ATE516596T1 (de) Verfahren zur herstellung einer vertikalen, metall-oxid-halbleiter-feldeffektdiode
ATE249331T1 (de) Verfahren zur herstellung eines stopfenteils oder kappenteils
DE60101454D1 (de) Verfahren und vorrichtung zur herstellung eines minimal verziehenden dosendeckels
EP1684356A3 (de) Übergangsbipolartransistor
DE60233319D1 (de) C-implantierung für verbesserte produktivität von sige-bipolartransistoren
KR880001058A (ko) 헤테로 접합형 바이폴러트랜지스터의 제조방법
EP1199913A3 (de) Verfahren zur Herstellung von Leiterfolie-Trägergehäuse-Einheiten
ATE302744T1 (de) Verfahren zur herstellung von 1-menthol
TW374248B (en) Use of MeV implantation to form vertically modulated n+ buried layer in an NPN bipolar transistor
ATE509174T1 (de) Verbundprofil und verfahren zur herstellung eines verbundprofils
DE50114178D1 (de) Verfahren zur herstellung von schnellen vertikalen npn-bipolartransistoren und komplementären mos-transistoren auf einem chip
DE50214252D1 (de) Verfahren zur herstellung einer schichtelektrode fde
ATE490558T1 (de) Vertikaler bipolartransistor und verfahren zu seiner herstellung
DE602006020430D1 (de) Verfahren zur herstellung eines bipolartransistors
CN208004982U (zh) 用于轨道车辆的点焊电极座
WO2003050876A3 (en) Self aligned compact bipolar junction transistor layout, and method of making same
DE69132505D1 (de) Verfahren zur Herstellung einer Halbleiteranordnung mit einem Bipolartransistor
WO2001063644A3 (de) Verfahren zur herstellung von bipolaren transistoren im bicmos-verfahren
ATE320934T1 (de) Verfahren und vorrichtung zur herstellung eines kantenprofils für eine verglasung
DE10345460A1 (de) Verfahren zur Herstellung eines Lochgraben-Speicherkondensators in einem Halbleitersubstrat und Lochgraben-Speicherkondensator
KR880013256A (ko) 헤테로접합형 바이폴라트랜지스터 및 그 제조방법
ATE484074T1 (de) Halbleitervorrichtung und verfahren zu deren herstellung