DE58908974D1 - Datengesteuerter Arrayprozessor. - Google Patents

Datengesteuerter Arrayprozessor.

Info

Publication number
DE58908974D1
DE58908974D1 DE58908974T DE58908974T DE58908974D1 DE 58908974 D1 DE58908974 D1 DE 58908974D1 DE 58908974 T DE58908974 T DE 58908974T DE 58908974 T DE58908974 T DE 58908974T DE 58908974 D1 DE58908974 D1 DE 58908974D1
Authority
DE
Germany
Prior art keywords
array processor
data controlled
controlled array
data
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE58908974T
Other languages
English (en)
Inventor
Ulrich Dr Ing Schmidt
Knut Dipl Ing Caesar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
Original Assignee
Deutsche ITT Industries GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH filed Critical Deutsche ITT Industries GmbH
Application granted granted Critical
Publication of DE58908974D1 publication Critical patent/DE58908974D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/82Architectures of general purpose stored program computers data or demand driven
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356Indirect interconnection networks
    • G06F15/17368Indirect interconnection networks non hierarchical topologies
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17337Direct connection machines, e.g. completely connected computers, point to point communication networks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023Two dimensional arrays, e.g. mesh, torus
DE58908974T 1989-11-21 1989-11-21 Datengesteuerter Arrayprozessor. Expired - Fee Related DE58908974D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP89121506A EP0428770B1 (de) 1989-11-21 1989-11-21 Datengesteuerter Arrayprozessor

Publications (1)

Publication Number Publication Date
DE58908974D1 true DE58908974D1 (de) 1995-03-16

Family

ID=8202144

Family Applications (1)

Application Number Title Priority Date Filing Date
DE58908974T Expired - Fee Related DE58908974D1 (de) 1989-11-21 1989-11-21 Datengesteuerter Arrayprozessor.

Country Status (6)

Country Link
US (1) US5410723A (de)
EP (1) EP0428770B1 (de)
JP (1) JP2852808B2 (de)
KR (1) KR910010350A (de)
CN (1) CN1051995A (de)
DE (1) DE58908974D1 (de)

Families Citing this family (109)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4308178C2 (de) * 1993-03-15 1995-09-07 Mir Patent Lizenzverwertungen Homogene Rechnerstruktur
US5717947A (en) * 1993-03-31 1998-02-10 Motorola, Inc. Data processing system and method thereof
IL107657A (en) * 1993-11-18 1997-01-10 Scitex Corp Ltd Method for transferring documents
US6072944A (en) * 1995-09-08 2000-06-06 Iq Systems, Inc. Methods and apparatus for distributed processing and rapid ASIC development
US5922061A (en) * 1995-10-20 1999-07-13 Iq Systems Methods and apparatus for implementing high speed data communications
US5687326A (en) * 1995-10-20 1997-11-11 I. Q. Systems, Inc. Methods and apparatus for implementing a high speed serial link and serial data bus
US5943242A (en) * 1995-11-17 1999-08-24 Pact Gmbh Dynamically reconfigurable data processing system
US7266725B2 (en) * 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
US5815728A (en) * 1996-03-01 1998-09-29 Raytheon Company Processor array
DE19651075A1 (de) 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
US6338106B1 (en) 1996-12-20 2002-01-08 Pact Gmbh I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures
US6581126B1 (en) * 1996-12-20 2003-06-17 Plx Technology, Inc. Method, system and apparatus for a computer subsystem interconnection using a chain of bus repeaters
DE19654595A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
DE19654593A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh Umkonfigurierungs-Verfahren für programmierbare Bausteine zur Laufzeit
EP1329816B1 (de) * 1996-12-27 2011-06-22 Richter, Thomas Verfahren zum selbständigen dynamischen Umladen von Datenflussprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o.dgl.)
DE19654846A1 (de) 1996-12-27 1998-07-09 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.)
JPH10191356A (ja) * 1996-12-27 1998-07-21 Oki Electric Ind Co Ltd 画像符号化装置
US6052729A (en) * 1997-01-29 2000-04-18 Iq Systems, Inc. Event-reaction communication protocol in an object oriented processor array
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
DE19704728A1 (de) * 1997-02-08 1998-08-13 Pact Inf Tech Gmbh Verfahren zur Selbstsynchronisation von konfigurierbaren Elementen eines programmierbaren Bausteines
DE19704742A1 (de) * 1997-02-11 1998-09-24 Pact Inf Tech Gmbh Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand
US6502180B1 (en) * 1997-09-12 2002-12-31 California Institute Of Technology Asynchronous circuits with pipelined completion process
US9092595B2 (en) 1997-10-08 2015-07-28 Pact Xpp Technologies Ag Multiprocessor having associated RAM units
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
DE19861088A1 (de) * 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen
US6836838B1 (en) 1998-06-29 2004-12-28 Cisco Technology, Inc. Architecture for a processor complex of an arrayed pipelined processing engine
US6195739B1 (en) 1998-06-29 2001-02-27 Cisco Technology, Inc. Method and apparatus for passing data among processor complex stages of a pipelined processing engine
US6513108B1 (en) 1998-06-29 2003-01-28 Cisco Technology, Inc. Programmable processing engine for efficiently processing transient data
JP3161420B2 (ja) 1998-07-30 2001-04-25 日本電気株式会社 非同期インタフェースシステム
US6173386B1 (en) 1998-12-14 2001-01-09 Cisco Technology, Inc. Parallel processor with debug capability
US6920562B1 (en) 1998-12-18 2005-07-19 Cisco Technology, Inc. Tightly coupled software protocol decode with hardware data encryption
US6711227B1 (en) * 1999-02-05 2004-03-23 Broadcom Corporation Synchronizing method and apparatus
WO2000077652A2 (de) 1999-06-10 2000-12-21 Pact Informationstechnologie Gmbh Sequenz-partitionierung auf zellstrukturen
US6681341B1 (en) 1999-11-03 2004-01-20 Cisco Technology, Inc. Processor isolation method for integrated multi-processor systems
US6529983B1 (en) 1999-11-03 2003-03-04 Cisco Technology, Inc. Group and virtual locking mechanism for inter processor synchronization
US7308559B2 (en) * 2000-02-29 2007-12-11 International Business Machines Corporation Digital signal processor with cascaded SIMD organization
US6892237B1 (en) 2000-03-28 2005-05-10 Cisco Technology, Inc. Method and apparatus for high-speed parsing of network messages
US6505269B1 (en) 2000-05-16 2003-01-07 Cisco Technology, Inc. Dynamic addressing mapping to eliminate memory resource contention in a symmetric multiprocessor system
EP2226732A3 (de) 2000-06-13 2016-04-06 PACT XPP Technologies AG Cachehierarchie für einen Multicore-Prozessor
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
JP2004517386A (ja) 2000-10-06 2004-06-10 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト 方法および装置
US20040015899A1 (en) * 2000-10-06 2004-01-22 Frank May Method for processing data
GB2370380B (en) 2000-12-19 2003-12-31 Picochip Designs Ltd Processor architecture
US6990555B2 (en) 2001-01-09 2006-01-24 Pact Xpp Technologies Ag Method of hierarchical caching of configuration data having dataflow processors and modules having two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)
US9436631B2 (en) 2001-03-05 2016-09-06 Pact Xpp Technologies Ag Chip including memory element storing higher level memory data on a page by page basis
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US9250908B2 (en) 2001-03-05 2016-02-02 Pact Xpp Technologies Ag Multi-processor bus and cache interconnection system
WO2005045692A2 (en) * 2003-08-28 2005-05-19 Pact Xpp Technologies Ag Data processing device and method
US7210129B2 (en) 2001-08-16 2007-04-24 Pact Xpp Technologies Ag Method for translating programs for reconfigurable architectures
US7581076B2 (en) 2001-03-05 2009-08-25 Pact Xpp Technologies Ag Methods and devices for treating and/or processing data
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US9552047B2 (en) 2001-03-05 2017-01-24 Pact Xpp Technologies Ag Multiprocessor having runtime adjustable clock and clock dependent power supply
US7844796B2 (en) * 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
US9141390B2 (en) 2001-03-05 2015-09-22 Pact Xpp Technologies Ag Method of processing data with an array of data processors according to application ID
US7657877B2 (en) 2001-06-20 2010-02-02 Pact Xpp Technologies Ag Method for processing data
US10031733B2 (en) 2001-06-20 2018-07-24 Scientia Sol Mentis Ag Method for processing data
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7434191B2 (en) 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
US7577822B2 (en) 2001-12-14 2009-08-18 Pact Xpp Technologies Ag Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization
AU2003208266A1 (en) 2002-01-19 2003-07-30 Pact Xpp Technologies Ag Reconfigurable processor
AU2003214003A1 (en) * 2002-02-18 2003-09-09 Pact Xpp Technologies Ag Bus systems and method for reconfiguration
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
US9170812B2 (en) 2002-03-21 2015-10-27 Pact Xpp Technologies Ag Data processing system having integrated pipelined array data processor
US7657861B2 (en) 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
WO2004021176A2 (de) 2002-08-07 2004-03-11 Pact Xpp Technologies Ag Verfahren und vorrichtung zur datenverarbeitung
US7394284B2 (en) * 2002-09-06 2008-07-01 Pact Xpp Technologies Ag Reconfigurable sequencer structure
KR20050085545A (ko) * 2002-12-12 2005-08-29 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 코프로세서, 코프로세싱 시스템, 집적 회로, 수신기, 기능유닛 및 인터페이싱 방법
WO2004073317A2 (en) * 2003-02-13 2004-08-26 Philips Intellectual Property & Standards Gmbh Method of monitoring the communication in a network
GB2398650B (en) * 2003-02-21 2006-09-20 Picochip Designs Ltd Communications in a processor array
US7827386B2 (en) * 2003-06-30 2010-11-02 Intel Corporation Controlling memory access devices in a data driven architecture mesh array
JP4423953B2 (ja) * 2003-07-09 2010-03-03 株式会社日立製作所 半導体集積回路
US7937557B2 (en) 2004-03-16 2011-05-03 Vns Portfolio Llc System and method for intercommunication between computers in an array
WO2006092825A1 (ja) * 2005-02-28 2006-09-08 Fujitsu Limited 信号処理装置および信号処理システム
US7478222B2 (en) * 2005-03-29 2009-01-13 Karl M. Fant Programmable pipeline array
US7386683B2 (en) * 2005-03-29 2008-06-10 International Business Machines Corporation Method and apparatus for filtering snoop requests in a point-to-point interconnect architecture
US7589584B1 (en) * 2005-04-01 2009-09-15 Altera Corporation Programmable voltage regulator with dynamic recovery circuits
EP1880274A2 (de) * 2005-04-22 2008-01-23 Altrix Logic, Inc. Gruppe von datenverarbeitungselementen mit verbindung variabler präzision
US7904695B2 (en) 2006-02-16 2011-03-08 Vns Portfolio Llc Asynchronous power saving computer
CN100383728C (zh) * 2005-08-25 2008-04-23 应广科技股份有限公司 可执行等待及延后指令的程序地址运算器架构
GB2430052A (en) * 2005-09-07 2007-03-14 Tandberg Television Asa CPU with a buffer memory directly available to an arithmetic logic unit
US7281942B2 (en) * 2005-11-18 2007-10-16 Ideal Industries, Inc. Releasable wire connector
WO2007082730A1 (de) 2006-01-18 2007-07-26 Pact Xpp Technologies Ag Hardwaredefinitionsverfahren
ATE475927T1 (de) * 2006-02-16 2010-08-15 Vns Portfolio Llc Asynchroner stromsparender computer
US7966481B2 (en) 2006-02-16 2011-06-21 Vns Portfolio Llc Computer system and method for executing port communications without interrupting the receiving computer
US7904615B2 (en) 2006-02-16 2011-03-08 Vns Portfolio Llc Asynchronous computer communication
EP1821211A3 (de) * 2006-02-16 2008-06-18 Technology Properties Limited Kooperatives Multitaskingverfahren in einem Multiprozessorsystem
US7617383B2 (en) * 2006-02-16 2009-11-10 Vns Portfolio Llc Circular register arrays of a computer
US7913069B2 (en) 2006-02-16 2011-03-22 Vns Portfolio Llc Processor and method for executing a program loop within an instruction word
ATE495491T1 (de) * 2006-02-16 2011-01-15 Vns Portfolio Llc Ausführung von anweisungen direkt von der eingabequelle aus
US8612201B2 (en) * 2006-04-11 2013-12-17 Cadence Design Systems, Inc. Hardware emulation system having a heterogeneous cluster of processors
JP2008047031A (ja) * 2006-08-21 2008-02-28 Kumamoto Univ 並列演算装置
US7555637B2 (en) * 2007-04-27 2009-06-30 Vns Portfolio Llc Multi-port read/write operations based on register bits set for indicating select ports and transfer directions
GB2454865B (en) * 2007-11-05 2012-06-13 Picochip Designs Ltd Power control
US8078829B2 (en) * 2007-12-12 2011-12-13 Itt Manufacturing Enterprises, Inc. Scaleable array of micro-engines for waveform processing
US20100023730A1 (en) * 2008-07-24 2010-01-28 Vns Portfolio Llc Circular Register Arrays of a Computer
GB2466661B (en) * 2009-01-05 2014-11-26 Intel Corp Rake receiver
GB2470037B (en) 2009-05-07 2013-07-10 Picochip Designs Ltd Methods and devices for reducing interference in an uplink
GB2470771B (en) 2009-06-05 2012-07-18 Picochip Designs Ltd A method and device in a communication network
GB2470891B (en) 2009-06-05 2013-11-27 Picochip Designs Ltd A method and device in a communication network
GB2474071B (en) 2009-10-05 2013-08-07 Picochip Designs Ltd Femtocell base station
CN102053815B (zh) * 2009-11-05 2012-10-31 上海华虹集成电路有限责任公司 同步fifo电路系统
GB2482869B (en) 2010-08-16 2013-11-06 Picochip Designs Ltd Femtocell access control
GB2489716B (en) 2011-04-05 2015-06-24 Intel Corp Multimode base system
GB2489919B (en) 2011-04-05 2018-02-14 Intel Corp Filter
GB2491098B (en) 2011-05-16 2015-05-20 Intel Corp Accessing a base station
US11182337B1 (en) * 2020-05-01 2021-11-23 Intel Corporation Computing efficient cross channel operations in parallel computing machines using systolic arrays
DE102020132088A1 (de) 2020-05-01 2021-11-04 Intel Corporation Berechnung effizienter kanalübergreifender operationen in parallelrechenmaschinen mit systolischen arrays
US11902129B1 (en) 2023-03-24 2024-02-13 T-Mobile Usa, Inc. Vendor-agnostic real-time monitoring of telecommunications networks

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4298936A (en) * 1979-11-15 1981-11-03 Analogic Corporation Array Processor
US4365292A (en) * 1979-11-26 1982-12-21 Burroughs Corporation Array processor architecture connection network
US4663706A (en) * 1982-10-28 1987-05-05 Tandem Computers Incorporated Multiprocessor multisystem communications network
US4720780A (en) * 1985-09-17 1988-01-19 The Johns Hopkins University Memory-linked wavefront array processor
CA1286031C (en) * 1986-06-27 1991-07-09 Ichiro Tamitani Processor array comprising processors connected selectively in series or in parallel
US4985832A (en) * 1986-09-18 1991-01-15 Digital Equipment Corporation SIMD array processing system with routing networks having plurality of switching stages to transfer messages among processors
US4891787A (en) * 1986-12-17 1990-01-02 Massachusetts Institute Of Technology Parallel processing system with processor array having SIMD/MIMD instruction processing
JPS63192153A (ja) * 1987-02-05 1988-08-09 Agency Of Ind Science & Technol 並列デ−タ処理装置
US5058001A (en) * 1987-03-05 1991-10-15 International Business Machines Corporation Two-dimensional array of processing elements for emulating a multi-dimensional network
US5081701A (en) * 1987-04-20 1992-01-14 Tandem Computers Incorporated System for controlling data transfer using transfer handshake protocol using transfer complete and transfer inhibit signals
US4896265A (en) * 1988-03-28 1990-01-23 General Electric Company Parallel broadcasting method and apparatus
US4888739A (en) * 1988-06-15 1989-12-19 Cypress Semiconductor Corporation First-in first-out buffer memory with improved status flags
JPH0254383A (ja) * 1988-08-18 1990-02-23 Mitsubishi Electric Corp アレイプロセッサ
EP0428771B1 (de) * 1989-11-21 1995-02-01 Deutsche ITT Industries GmbH Zweiwege-Datenübergabe-Einrichtung

Also Published As

Publication number Publication date
US5410723A (en) 1995-04-25
JP2852808B2 (ja) 1999-02-03
EP0428770A1 (de) 1991-05-29
EP0428770B1 (de) 1995-02-01
JPH03176757A (ja) 1991-07-31
KR910010350A (ko) 1991-06-29
CN1051995A (zh) 1991-06-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: MICRONAS INTERMETALL GMBH, 79108 FREIBURG, DE

8327 Change in the person/name/address of the patent owner

Owner name: MICRONAS GMBH, 79108 FREIBURG, DE

8339 Ceased/non-payment of the annual fee