DE60000941D1 - Verfahren zur herstellung einer chip-karte mit kontakten mit kostengünstigem dielektrikum - Google Patents
Verfahren zur herstellung einer chip-karte mit kontakten mit kostengünstigem dielektrikumInfo
- Publication number
- DE60000941D1 DE60000941D1 DE60000941T DE60000941T DE60000941D1 DE 60000941 D1 DE60000941 D1 DE 60000941D1 DE 60000941 T DE60000941 T DE 60000941T DE 60000941 T DE60000941 T DE 60000941T DE 60000941 D1 DE60000941 D1 DE 60000941D1
- Authority
- DE
- Germany
- Prior art keywords
- grid
- chip card
- contacts
- producing
- cost
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07743—External electrical contacts
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
- H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9906584A FR2794265B1 (fr) | 1999-05-25 | 1999-05-25 | Procede de fabrication de cartes a puce a contact avec dielectrique bas cout |
PCT/FR2000/001265 WO2000072253A1 (fr) | 1999-05-25 | 2000-05-11 | Procede de fabrication de cartes a puce a contact avec dielectrique bas cout |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60000941D1 true DE60000941D1 (de) | 2003-01-16 |
DE60000941T2 DE60000941T2 (de) | 2003-09-04 |
Family
ID=9545962
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60000941T Expired - Fee Related DE60000941T2 (de) | 1999-05-25 | 2000-05-11 | Verfahren zur herstellung einer chip-karte mit kontakten mit kostengünstigem dielektrikum |
Country Status (9)
Country | Link |
---|---|
US (1) | US6617672B1 (de) |
EP (1) | EP1190379B1 (de) |
CN (1) | CN1351732A (de) |
AT (1) | ATE229205T1 (de) |
AU (1) | AU4575400A (de) |
DE (1) | DE60000941T2 (de) |
ES (1) | ES2188541T3 (de) |
FR (1) | FR2794265B1 (de) |
WO (1) | WO2000072253A1 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004044834A1 (en) * | 2002-11-12 | 2004-05-27 | Koninklijke Philips Electronics N.V. | Data carrier with a module with a reinforcement strip |
EP2447886A1 (de) * | 2010-10-07 | 2012-05-02 | Gemalto SA | Gesichertes elektronisches Modul, Vorrichtung mit gesichertem elektronischen Modul, und entsprechendes Herstellungsverfahren |
CN103473593B (zh) * | 2012-06-05 | 2018-10-19 | 德昌电机(深圳)有限公司 | 智能卡、智能卡接触垫载板及其制造方法 |
CN117642747A (zh) * | 2021-07-15 | 2024-03-01 | 兰克森控股公司 | 引线框架、智能卡的卡本体、智能卡以及形成智能卡的方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4222516A (en) * | 1975-12-31 | 1980-09-16 | Compagnie Internationale Pour L'informatique Cii-Honeywell Bull | Standardized information card |
NL191959B (nl) * | 1981-03-24 | 1996-07-01 | Gao Ges Automation Org | Identificatiekaart met IC-bouwsteen en dragerelement voor een IC-bouwsteen. |
JPH074995B2 (ja) * | 1986-05-20 | 1995-01-25 | 株式会社東芝 | Icカ−ド及びその製造方法 |
JPH01108095A (ja) * | 1987-10-20 | 1989-04-25 | Ryoden Kasei Co Ltd | Icカード |
FR2632100B1 (fr) | 1988-05-25 | 1992-02-21 | Schlumberger Ind Sa | Procede de realisation d'une carte a memoire electronique et cartes a memoire electronique obtenue par la mise en oeuvre dudit procede |
EP0688050A1 (de) * | 1994-06-15 | 1995-12-20 | Philips Cartes Et Systemes | Montageverfahren für IC-Karte und so erhaltene Karte |
FR2733553B1 (fr) * | 1995-04-25 | 1997-07-11 | Pem Sa Protection Electrolytiq | Dispositif de contre-collage pour la solidarisation d'une bande metallique et d'une bande de materiau isolant |
FR2741191B1 (fr) * | 1995-11-14 | 1998-01-09 | Sgs Thomson Microelectronics | Procede de fabrication d'un micromodule, notamment pour cartes a puces |
JPH09327990A (ja) * | 1996-06-11 | 1997-12-22 | Toshiba Corp | カード型記憶装置 |
-
1999
- 1999-05-25 FR FR9906584A patent/FR2794265B1/fr not_active Expired - Fee Related
-
2000
- 2000-05-11 AT AT00927328T patent/ATE229205T1/de not_active IP Right Cessation
- 2000-05-11 CN CN00807970A patent/CN1351732A/zh active Pending
- 2000-05-11 AU AU45754/00A patent/AU4575400A/en not_active Abandoned
- 2000-05-11 EP EP00927328A patent/EP1190379B1/de not_active Expired - Lifetime
- 2000-05-11 ES ES00927328T patent/ES2188541T3/es not_active Expired - Lifetime
- 2000-05-11 DE DE60000941T patent/DE60000941T2/de not_active Expired - Fee Related
- 2000-05-11 WO PCT/FR2000/001265 patent/WO2000072253A1/fr active IP Right Grant
- 2000-05-11 US US09/979,709 patent/US6617672B1/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
WO2000072253A1 (fr) | 2000-11-30 |
US6617672B1 (en) | 2003-09-09 |
FR2794265A1 (fr) | 2000-12-01 |
ES2188541T3 (es) | 2003-07-01 |
EP1190379B1 (de) | 2002-12-04 |
FR2794265B1 (fr) | 2003-09-19 |
DE60000941T2 (de) | 2003-09-04 |
AU4575400A (en) | 2000-12-12 |
EP1190379A1 (de) | 2002-03-27 |
CN1351732A (zh) | 2002-05-29 |
ATE229205T1 (de) | 2002-12-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8339 | Ceased/non-payment of the annual fee |