DE60001461D1 - Architektur für ein eingang-/ausganggerät zur behandlung von unterschiedlichen signaleigenschaften - Google Patents
Architektur für ein eingang-/ausganggerät zur behandlung von unterschiedlichen signaleigenschaftenInfo
- Publication number
- DE60001461D1 DE60001461D1 DE60001461T DE60001461T DE60001461D1 DE 60001461 D1 DE60001461 D1 DE 60001461D1 DE 60001461 T DE60001461 T DE 60001461T DE 60001461 T DE60001461 T DE 60001461T DE 60001461 D1 DE60001461 D1 DE 60001461D1
- Authority
- DE
- Germany
- Prior art keywords
- signals
- conditioning
- circuitry
- signal
- control circuitry
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Amplifiers (AREA)
- Electronic Switches (AREA)
- Dc Digital Transmission (AREA)
- Selective Calling Equipment (AREA)
- Analogue/Digital Conversion (AREA)
- Networks Using Active Elements (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14783999P | 1999-08-09 | 1999-08-09 | |
US09/481,585 US6362768B1 (en) | 1999-08-09 | 2000-01-12 | Architecture for an input and output device capable of handling various signal characteristics |
PCT/US2000/021617 WO2001011478A1 (en) | 1999-08-09 | 2000-08-08 | Architecture for an input and output device capable of handling various signal characteristics |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60001461D1 true DE60001461D1 (de) | 2003-03-27 |
DE60001461T2 DE60001461T2 (de) | 2003-12-04 |
Family
ID=26845278
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60001461T Expired - Fee Related DE60001461T2 (de) | 1999-08-09 | 2000-08-08 | Architektur für ein eingang-/ausganggerät zur behandlung von unterschiedlichen signaleigenschaften |
Country Status (8)
Country | Link |
---|---|
US (1) | US6362768B1 (de) |
EP (1) | EP1204928B1 (de) |
JP (1) | JP2003506789A (de) |
AT (1) | ATE233002T1 (de) |
AU (1) | AU6761200A (de) |
CA (1) | CA2381626A1 (de) |
DE (1) | DE60001461T2 (de) |
WO (1) | WO2001011478A1 (de) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6925428B1 (en) * | 2000-05-19 | 2005-08-02 | The United States Of America As Represented By The Secretary Of The Navy | Multifunctional, multi-input, missile signal measurement apparatus |
US6794919B1 (en) * | 2000-09-29 | 2004-09-21 | Intel Corporation | Devices and methods for automatically producing a clock signal that follows the master clock signal |
JP3910868B2 (ja) * | 2002-03-19 | 2007-04-25 | 富士通株式会社 | 集積回路 |
US7558903B2 (en) * | 2003-04-11 | 2009-07-07 | The Boeing Company | Interfacing a legacy data bus with a wideband wireless data resource utilizing an embedded bus controller |
US7039748B2 (en) * | 2003-06-12 | 2006-05-02 | Broadcom Corporation | Memory mapped I/O bus selection |
NL1024730C2 (nl) * | 2003-11-07 | 2005-05-10 | Beijer Automotive B V | Koppelelement voor een voertuigbesturingssysteem. |
US7246023B2 (en) * | 2004-01-26 | 2007-07-17 | Ranko, Llc | Flexible process optimizer |
US20050289613A1 (en) * | 2004-06-18 | 2005-12-29 | Honeywell International Inc. | Control architecture for audio/video (A/V) systems |
US7320064B2 (en) * | 2004-07-23 | 2008-01-15 | Honeywell International Inc. | Reconfigurable computing architecture for space applications |
US20060136626A1 (en) * | 2004-12-17 | 2006-06-22 | Avritch Steven A | Reconfigurable input/output interface |
US20070046781A1 (en) * | 2005-08-29 | 2007-03-01 | Honeywell International Inc. | Systems and methods for processing digital video data |
US8141437B2 (en) | 2006-03-29 | 2012-03-27 | Ortho Sensing Technologies, Llc | Force monitoring system |
US20080022081A1 (en) * | 2006-07-18 | 2008-01-24 | Honeywell International Inc. | Local controller for reconfigurable processing elements |
US8327117B2 (en) * | 2008-08-29 | 2012-12-04 | Rolls-Royce Corporation | Reconfigurable FADEC with flash based FPGA control channel and ASIC sensor signal processor for aircraft engine control |
US8751069B2 (en) * | 2011-06-16 | 2014-06-10 | The Boeing Company | Dynamically reconfigurable electrical interface |
CN102517641A (zh) * | 2011-12-20 | 2012-06-27 | 北京京仪世纪电子股份有限公司 | 网络单晶炉信号采集器 |
CN104155896A (zh) * | 2014-07-30 | 2014-11-19 | 奉化市宇创产品设计有限公司 | 激光漂移量反馈控制电路 |
US10623130B2 (en) * | 2017-07-27 | 2020-04-14 | Rolls-Royce North American Technologes, Inc. | Determining a frequency for propulsor engine communication sessions |
US11158234B2 (en) | 2018-07-22 | 2021-10-26 | Novatek Microelectronics Corp. | Channel circuit of source driver |
US10848149B2 (en) * | 2018-07-22 | 2020-11-24 | Novatek Microelectronics Corp. | Channel circuit of source driver and operation method thereof |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04111145A (ja) | 1990-08-31 | 1992-04-13 | Mitsubishi Electric Corp | マイクロコンピュータ |
FR2681160B1 (fr) | 1991-09-05 | 1995-03-24 | Telemecanique | Dispositif d'entree ou de sortie, notamment pour automate programmable. |
EP0543037B1 (de) | 1991-11-19 | 1995-09-13 | Siemens Aktiengesellschaft | In einen integrierten Schaltkreis integrierte parametrierbare Ausgabeschaltung |
KR0179968B1 (ko) * | 1993-08-31 | 1999-05-01 | 김광호 | 사운드신호 출력회로 및 그 방법 |
US6202198B1 (en) * | 1998-04-21 | 2001-03-13 | Neoprobe Corporation | Programmable integrated analog input/output circuit with distributed matching memory array |
US6081215A (en) * | 1998-07-06 | 2000-06-27 | Motorola, Inc. | High speed interlaced analog interface |
-
2000
- 2000-01-12 US US09/481,585 patent/US6362768B1/en not_active Expired - Fee Related
- 2000-08-08 EP EP00955401A patent/EP1204928B1/de not_active Expired - Lifetime
- 2000-08-08 JP JP2001516061A patent/JP2003506789A/ja active Pending
- 2000-08-08 WO PCT/US2000/021617 patent/WO2001011478A1/en active IP Right Grant
- 2000-08-08 CA CA002381626A patent/CA2381626A1/en not_active Abandoned
- 2000-08-08 AU AU67612/00A patent/AU6761200A/en not_active Abandoned
- 2000-08-08 DE DE60001461T patent/DE60001461T2/de not_active Expired - Fee Related
- 2000-08-08 AT AT00955401T patent/ATE233002T1/de not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE60001461T2 (de) | 2003-12-04 |
CA2381626A1 (en) | 2001-02-15 |
AU6761200A (en) | 2001-03-05 |
EP1204928A1 (de) | 2002-05-15 |
JP2003506789A (ja) | 2003-02-18 |
ATE233002T1 (de) | 2003-03-15 |
WO2001011478A1 (en) | 2001-02-15 |
US6362768B1 (en) | 2002-03-26 |
EP1204928B1 (de) | 2003-02-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8339 | Ceased/non-payment of the annual fee |