DE60040578D1 - Entkoppeltes Abrufen und Ausführen von Befehlen mit statischer Verzweigungsvorhersage - Google Patents
Entkoppeltes Abrufen und Ausführen von Befehlen mit statischer VerzweigungsvorhersageInfo
- Publication number
- DE60040578D1 DE60040578D1 DE60040578T DE60040578T DE60040578D1 DE 60040578 D1 DE60040578 D1 DE 60040578D1 DE 60040578 T DE60040578 T DE 60040578T DE 60040578 T DE60040578 T DE 60040578T DE 60040578 D1 DE60040578 D1 DE 60040578D1
- Authority
- DE
- Germany
- Prior art keywords
- branch
- execution
- paired
- pbr
- decoupled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30054—Unconditional branch instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30058—Conditional branch instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/360,054 US6523110B1 (en) | 1999-07-23 | 1999-07-23 | Decoupled fetch-execute engine with static branch prediction support |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60040578D1 true DE60040578D1 (de) | 2008-12-04 |
Family
ID=23416410
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60040578T Expired - Lifetime DE60040578D1 (de) | 1999-07-23 | 2000-07-21 | Entkoppeltes Abrufen und Ausführen von Befehlen mit statischer Verzweigungsvorhersage |
Country Status (6)
Country | Link |
---|---|
US (1) | US6523110B1 (de) |
EP (1) | EP1071010B1 (de) |
CN (1) | CN1147794C (de) |
AT (1) | ATE412213T1 (de) |
DE (1) | DE60040578D1 (de) |
TW (1) | TW563064B (de) |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6611910B2 (en) * | 1998-10-12 | 2003-08-26 | Idea Corporation | Method for processing branch operations |
US6784889B1 (en) * | 2000-12-13 | 2004-08-31 | Micron Technology, Inc. | Memory system and method for improved utilization of read and write bandwidth of a graphics processing system |
US6741253B2 (en) | 2001-10-09 | 2004-05-25 | Micron Technology, Inc. | Embedded memory system and method including data error correction |
JP2005038203A (ja) * | 2003-07-15 | 2005-02-10 | Denso Corp | メモリ制御方法及び装置 |
US8607209B2 (en) | 2004-02-04 | 2013-12-10 | Bluerisc Inc. | Energy-focused compiler-assisted branch prediction |
US7281120B2 (en) * | 2004-03-26 | 2007-10-09 | International Business Machines Corporation | Apparatus and method for decreasing the latency between an instruction cache and a pipeline processor |
JP3926809B2 (ja) * | 2004-07-27 | 2007-06-06 | 富士通株式会社 | 分岐命令制御装置、および制御方法。 |
US8001363B2 (en) * | 2005-04-04 | 2011-08-16 | Globalfoundries Inc. | System for speculative branch prediction optimization and method thereof |
US7472256B1 (en) | 2005-04-12 | 2008-12-30 | Sun Microsystems, Inc. | Software value prediction using pendency records of predicted prefetch values |
US7814487B2 (en) * | 2005-04-26 | 2010-10-12 | Qualcomm Incorporated | System and method of executing program threads in a multi-threaded processor |
US7877586B2 (en) * | 2008-02-01 | 2011-01-25 | International Business Machines Corporation | Branch target address cache selectively applying a delayed hit |
CN102736894B (zh) * | 2011-04-01 | 2017-10-24 | 中兴通讯股份有限公司 | 一种跳转指令编码的方法和系统 |
US9792252B2 (en) | 2013-05-31 | 2017-10-17 | Microsoft Technology Licensing, Llc | Incorporating a spatial array into one or more programmable processor cores |
US9727113B2 (en) | 2013-08-08 | 2017-08-08 | Linear Algebra Technologies Limited | Low power computational imaging |
US9910675B2 (en) | 2013-08-08 | 2018-03-06 | Linear Algebra Technologies Limited | Apparatus, systems, and methods for low power computational imaging |
US11768689B2 (en) | 2013-08-08 | 2023-09-26 | Movidius Limited | Apparatus, systems, and methods for low power computational imaging |
US10001993B2 (en) | 2013-08-08 | 2018-06-19 | Linear Algebra Technologies Limited | Variable-length instruction buffer management |
US9934043B2 (en) | 2013-08-08 | 2018-04-03 | Linear Algebra Technologies Limited | Apparatus, systems, and methods for providing computational imaging pipeline |
US9563590B2 (en) * | 2014-03-17 | 2017-02-07 | Nxp Usa, Inc. | Devices with arbitrated interface busses, and methods of their operation |
BR112017001981B1 (pt) * | 2014-07-30 | 2023-05-02 | Movidius Limited | Método para gerenciar buffer de instruções, sistema e memória legível por computador relacionados |
US9665374B2 (en) * | 2014-12-18 | 2017-05-30 | Intel Corporation | Binary translation mechanism |
US9507891B1 (en) * | 2015-05-29 | 2016-11-29 | International Business Machines Corporation | Automating a microarchitecture design exploration environment |
US9952867B2 (en) | 2015-06-26 | 2018-04-24 | Microsoft Technology Licensing, Llc | Mapping instruction blocks based on block size |
US10346168B2 (en) | 2015-06-26 | 2019-07-09 | Microsoft Technology Licensing, Llc | Decoupled processor instruction window and operand buffer |
US10409599B2 (en) | 2015-06-26 | 2019-09-10 | Microsoft Technology Licensing, Llc | Decoding information about a group of instructions including a size of the group of instructions |
US9946548B2 (en) | 2015-06-26 | 2018-04-17 | Microsoft Technology Licensing, Llc | Age-based management of instruction blocks in a processor instruction window |
US10169044B2 (en) | 2015-06-26 | 2019-01-01 | Microsoft Technology Licensing, Llc | Processing an encoding format field to interpret header information regarding a group of instructions |
US9720693B2 (en) | 2015-06-26 | 2017-08-01 | Microsoft Technology Licensing, Llc | Bulk allocation of instruction blocks to a processor instruction window |
US10191747B2 (en) | 2015-06-26 | 2019-01-29 | Microsoft Technology Licensing, Llc | Locking operand values for groups of instructions executed atomically |
US10175988B2 (en) | 2015-06-26 | 2019-01-08 | Microsoft Technology Licensing, Llc | Explicit instruction scheduler state information for a processor |
US10409606B2 (en) | 2015-06-26 | 2019-09-10 | Microsoft Technology Licensing, Llc | Verifying branch targets |
GB2548603B (en) | 2016-03-23 | 2018-09-26 | Advanced Risc Mach Ltd | Program loop control |
GB2548602B (en) | 2016-03-23 | 2019-10-23 | Advanced Risc Mach Ltd | Program loop control |
GB2548604B (en) | 2016-03-23 | 2018-03-21 | Advanced Risc Mach Ltd | Branch instruction |
US11016776B2 (en) | 2017-12-22 | 2021-05-25 | Alibaba Group Holding Limited | System and method for executing instructions |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3551895A (en) * | 1968-01-15 | 1970-12-29 | Ibm | Look-ahead branch detection system |
US3577189A (en) * | 1969-01-15 | 1971-05-04 | Ibm | Apparatus and method in a digital computer for allowing improved program branching with branch anticipation reduction of the number of branches, and reduction of branch delays |
US4974155A (en) * | 1988-08-15 | 1990-11-27 | Evans & Sutherland Computer Corp. | Variable delay branch system |
US5165025A (en) * | 1988-10-06 | 1992-11-17 | Lass Stanley E | Interlacing the paths after a conditional branch like instruction |
DE4345028A1 (de) * | 1993-05-06 | 1994-11-10 | Hewlett Packard Co | Vorrichtung zur Reduzierung von Verzögerungen aufgrund von Verzweigungen |
GB2285154B (en) * | 1993-12-24 | 1998-04-01 | Advanced Risc Mach Ltd | Branch cache |
US5664135A (en) * | 1994-09-28 | 1997-09-02 | Hewlett-Packard Company | Apparatus and method for reducing delays due to branches |
US5732243A (en) * | 1994-10-18 | 1998-03-24 | Cyrix Corporation | Branch processing unit with target cache using low/high banking to support split prefetching |
US5790845A (en) * | 1995-02-24 | 1998-08-04 | Hitachi, Ltd. | System with reservation instruction execution to store branch target address for use upon reaching the branch point |
US5850543A (en) * | 1996-10-30 | 1998-12-15 | Texas Instruments Incorporated | Microprocessor with speculative instruction pipelining storing a speculative register value within branch target buffer for use in speculatively executing instructions after a return |
KR100240591B1 (ko) * | 1996-11-06 | 2000-03-02 | 김영환 | 분기명령어의 효율적인 처리를 위한 브랜치 타겟 버퍼 및 그를 이용한 분기 예측방법 |
US5857104A (en) * | 1996-11-26 | 1999-01-05 | Hewlett-Packard Company | Synthetic dynamic branch prediction |
US5889986A (en) * | 1997-01-28 | 1999-03-30 | Samsung Electronics Co., Ltd. | Instruction fetch unit including instruction buffer and secondary or branch target buffer that transfers prefetched instructions to the instruction buffer |
TW357318B (en) * | 1997-03-18 | 1999-05-01 | Ind Tech Res Inst | Branching forecast and reading device for unspecified command length extra-purity pipeline processor |
US5987599A (en) * | 1997-03-28 | 1999-11-16 | Intel Corporation | Target instructions prefetch cache |
-
1999
- 1999-07-23 US US09/360,054 patent/US6523110B1/en not_active Expired - Fee Related
-
2000
- 2000-07-18 TW TW089114336A patent/TW563064B/zh not_active IP Right Cessation
- 2000-07-20 CN CNB001216066A patent/CN1147794C/zh not_active Expired - Fee Related
- 2000-07-21 AT AT00306207T patent/ATE412213T1/de not_active IP Right Cessation
- 2000-07-21 DE DE60040578T patent/DE60040578D1/de not_active Expired - Lifetime
- 2000-07-21 EP EP00306207A patent/EP1071010B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
ATE412213T1 (de) | 2008-11-15 |
TW563064B (en) | 2003-11-21 |
US6523110B1 (en) | 2003-02-18 |
EP1071010A3 (de) | 2001-11-14 |
EP1071010B1 (de) | 2008-10-22 |
EP1071010A2 (de) | 2001-01-24 |
CN1282024A (zh) | 2001-01-31 |
CN1147794C (zh) | 2004-04-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8328 | Change in the person/name/address of the agent |
Representative=s name: DUSCHER, R., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 7 |
|
8364 | No opposition during term of opposition |