DE60042347D1 - Verfahren zur Herstellung von Speicherkondensatorkontaktöffnungen - Google Patents
Verfahren zur Herstellung von SpeicherkondensatorkontaktöffnungenInfo
- Publication number
- DE60042347D1 DE60042347D1 DE60042347T DE60042347T DE60042347D1 DE 60042347 D1 DE60042347 D1 DE 60042347D1 DE 60042347 T DE60042347 T DE 60042347T DE 60042347 T DE60042347 T DE 60042347T DE 60042347 D1 DE60042347 D1 DE 60042347D1
- Authority
- DE
- Germany
- Prior art keywords
- over
- word lines
- insulating material
- lines
- bit lines
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/24—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/06—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials
- H01L21/10—Preliminary treatment of the selenium or tellurium, its application to the foundation plate, or the subsequent treatment of the combination
- H01L21/108—Provision of discrete insulating layers, i.e. non-genetic barrier layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
- H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biotechnology (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Electric Double-Layer Capacitors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Non-Volatile Memory (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/359,956 US6589876B1 (en) | 1999-07-22 | 1999-07-22 | Methods of forming conductive capacitor plugs, methods of forming capacitor contact openings, and methods of forming memory arrays |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60042347D1 true DE60042347D1 (de) | 2009-07-16 |
Family
ID=23415971
Family Applications (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10084848T Ceased DE10084848T1 (de) | 1999-07-22 | 2000-07-24 | Verfahren zum Ausbilden von Speicher-Kondensator-Kontaktöffnungen |
DE60042347T Expired - Lifetime DE60042347D1 (de) | 1999-07-22 | 2000-07-24 | Verfahren zur Herstellung von Speicherkondensatorkontaktöffnungen |
DE60026860T Expired - Lifetime DE60026860T2 (de) | 1999-07-22 | 2000-07-24 | Verfahren zur herstellung von speicherkondensatoren-kontaktöffnungen |
DE60038135T Expired - Lifetime DE60038135T2 (de) | 1999-07-22 | 2000-07-24 | Verfahren zur Herstellung von Speicherarrays |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10084848T Ceased DE10084848T1 (de) | 1999-07-22 | 2000-07-24 | Verfahren zum Ausbilden von Speicher-Kondensator-Kontaktöffnungen |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60026860T Expired - Lifetime DE60026860T2 (de) | 1999-07-22 | 2000-07-24 | Verfahren zur herstellung von speicherkondensatoren-kontaktöffnungen |
DE60038135T Expired - Lifetime DE60038135T2 (de) | 1999-07-22 | 2000-07-24 | Verfahren zur Herstellung von Speicherarrays |
Country Status (8)
Country | Link |
---|---|
US (3) | US6589876B1 (de) |
EP (4) | EP1662561B1 (de) |
JP (1) | JP2003529915A (de) |
KR (1) | KR100473910B1 (de) |
AT (3) | ATE321337T1 (de) |
AU (1) | AU7387900A (de) |
DE (4) | DE10084848T1 (de) |
WO (1) | WO2001008159A2 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6232168B1 (en) * | 2000-08-25 | 2001-05-15 | Micron Technology, Inc. | Memory circuitry and method of forming memory circuitry |
US6921692B2 (en) * | 2003-07-07 | 2005-07-26 | Micron Technology, Inc. | Methods of forming memory circuitry |
US8022468B1 (en) * | 2005-03-29 | 2011-09-20 | Spansion Llc | Ultraviolet radiation blocking interlayer dielectric |
JP2012204560A (ja) * | 2011-03-25 | 2012-10-22 | Elpida Memory Inc | 半導体装置及びその製造方法 |
Family Cites Families (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3010945B2 (ja) | 1991-12-13 | 2000-02-21 | 日本電気株式会社 | セルフアライン・コンタクト孔の形成方法 |
US5384287A (en) | 1991-12-13 | 1995-01-24 | Nec Corporation | Method of forming a semiconductor device having self-aligned contact holes |
US5296400A (en) * | 1991-12-14 | 1994-03-22 | Hyundai Electronics Industries Co., Ltd. | Method of manufacturing a contact of a highly integrated semiconductor device |
KR950000660B1 (ko) | 1992-02-29 | 1995-01-27 | 현대전자산업 주식회사 | 고집적 소자용 미세콘택 형성방법 |
JP2522616B2 (ja) | 1992-03-24 | 1996-08-07 | 株式会社東芝 | 半導体装置の製造方法 |
US5356834A (en) | 1992-03-24 | 1994-10-18 | Kabushiki Kaisha Toshiba | Method of forming contact windows in semiconductor devices |
US5383088A (en) | 1993-08-09 | 1995-01-17 | International Business Machines Corporation | Storage capacitor with a conducting oxide electrode for metal-oxide dielectrics |
JPH07142597A (ja) | 1993-11-12 | 1995-06-02 | Mitsubishi Electric Corp | 半導体記憶装置およびその製造方法 |
JP3571088B2 (ja) | 1994-10-25 | 2004-09-29 | 沖電気工業株式会社 | Dramセルコンタクトの構造及びその形成方法 |
US5488011A (en) | 1994-11-08 | 1996-01-30 | Micron Technology, Inc. | Method of forming contact areas between vertical conductors |
KR0140657B1 (ko) | 1994-12-31 | 1998-06-01 | 김주용 | 반도체 소자의 제조방법 |
JP3623834B2 (ja) | 1995-01-31 | 2005-02-23 | 富士通株式会社 | 半導体記憶装置及びその製造方法 |
US5604147A (en) * | 1995-05-12 | 1997-02-18 | Micron Technology, Inc. | Method of forming a cylindrical container stacked capacitor |
JPH0974174A (ja) | 1995-09-01 | 1997-03-18 | Texas Instr Japan Ltd | 半導体装置及びその製造方法 |
KR0155886B1 (ko) | 1995-09-19 | 1998-10-15 | 김광호 | 고집적 dram 셀의 제조방법 |
JP3703885B2 (ja) | 1995-09-29 | 2005-10-05 | 株式会社東芝 | 半導体記憶装置とその製造方法 |
JPH09307076A (ja) * | 1996-05-16 | 1997-11-28 | Nec Corp | 半導体装置の製造方法 |
US5789289A (en) | 1996-06-18 | 1998-08-04 | Vanguard International Semiconductor Corporation | Method for fabricating vertical fin capacitor structures |
US5721154A (en) * | 1996-06-18 | 1998-02-24 | Vanguard International Semiconductor | Method for fabricating a four fin capacitor structure |
US5670404A (en) * | 1996-06-21 | 1997-09-23 | Industrial Technology Research Institute | Method for making self-aligned bit line contacts on a DRAM circuit having a planarized insulating layer |
US5706164A (en) | 1996-07-17 | 1998-01-06 | Vangaurd International Semiconductor Corporation | Method of fabricating high density integrated circuits, containing stacked capacitor DRAM devices, using elevated trench isolation and isolation spacers |
US5792687A (en) * | 1996-08-01 | 1998-08-11 | Vanguard International Semiconductor Corporation | Method for fabricating high density integrated circuits using oxide and polysilicon spacers |
US5688713A (en) | 1996-08-26 | 1997-11-18 | Vanguard International Semiconductor Corporation | Method of manufacturing a DRAM cell having a double-crown capacitor using polysilicon and nitride spacers |
US5748521A (en) * | 1996-11-06 | 1998-05-05 | Samsung Electronics Co., Ltd. | Metal plug capacitor structures for integrated circuit devices and related methods |
US5780338A (en) | 1997-04-11 | 1998-07-14 | Vanguard International Semiconductor Corporation | Method for manufacturing crown-shaped capacitors for dynamic random access memory integrated circuits |
JPH10289986A (ja) | 1997-04-15 | 1998-10-27 | Fujitsu Ltd | 半導体装置およびその製造方法 |
US6060351A (en) | 1997-12-24 | 2000-05-09 | Micron Technology, Inc. | Process for forming capacitor over bit line memory cell |
US6200199B1 (en) | 1998-03-31 | 2001-03-13 | Applied Materials, Inc. | Chemical mechanical polishing conditioner |
JP3500063B2 (ja) | 1998-04-23 | 2004-02-23 | 信越半導体株式会社 | 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ |
US5837577A (en) | 1998-04-24 | 1998-11-17 | Vanguard International Semiconductor Corporation | Method for making self-aligned node contacts to bit lines for capacitor-over-bit-line structures on dynamic random access memory (DRAM) devices |
US5918120A (en) * | 1998-07-24 | 1999-06-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for fabricating capacitor-over-bit line (COB) dynamic random access memory (DRAM) using tungsten landing plug contacts and Ti/TiN bit lines |
US6458649B1 (en) * | 1999-07-22 | 2002-10-01 | Micron Technology, Inc. | Methods of forming capacitor-over-bit line memory cells |
-
1999
- 1999-07-22 US US09/359,956 patent/US6589876B1/en not_active Expired - Lifetime
-
2000
- 2000-07-24 JP JP2001512582A patent/JP2003529915A/ja active Pending
- 2000-07-24 AT AT00962009T patent/ATE321337T1/de not_active IP Right Cessation
- 2000-07-24 DE DE10084848T patent/DE10084848T1/de not_active Ceased
- 2000-07-24 WO PCT/US2000/040472 patent/WO2001008159A2/en active IP Right Grant
- 2000-07-24 KR KR10-2002-7000890A patent/KR100473910B1/ko not_active IP Right Cessation
- 2000-07-24 EP EP06004477A patent/EP1662561B1/de not_active Expired - Lifetime
- 2000-07-24 AT AT06004477T patent/ATE433197T1/de not_active IP Right Cessation
- 2000-07-24 AU AU73879/00A patent/AU7387900A/en not_active Abandoned
- 2000-07-24 AT AT06004528T patent/ATE387010T1/de not_active IP Right Cessation
- 2000-07-24 EP EP00962009A patent/EP1277209B1/de not_active Expired - Lifetime
- 2000-07-24 EP EP06004527A patent/EP1662562A3/de not_active Withdrawn
- 2000-07-24 DE DE60042347T patent/DE60042347D1/de not_active Expired - Lifetime
- 2000-07-24 EP EP06004528A patent/EP1662563B1/de not_active Expired - Lifetime
- 2000-07-24 DE DE60026860T patent/DE60026860T2/de not_active Expired - Lifetime
- 2000-07-24 DE DE60038135T patent/DE60038135T2/de not_active Expired - Lifetime
-
2003
- 2003-07-03 US US10/612,839 patent/US6964910B2/en not_active Expired - Fee Related
-
2005
- 2005-05-24 US US11/137,269 patent/US7449390B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE60038135T2 (de) | 2009-02-12 |
US6589876B1 (en) | 2003-07-08 |
EP1662563B1 (de) | 2008-02-20 |
US20050213369A1 (en) | 2005-09-29 |
AU7387900A (en) | 2001-02-13 |
JP2003529915A (ja) | 2003-10-07 |
DE60026860D1 (de) | 2006-05-11 |
US6964910B2 (en) | 2005-11-15 |
ATE321337T1 (de) | 2006-04-15 |
DE60038135D1 (de) | 2008-04-03 |
ATE433197T1 (de) | 2009-06-15 |
DE10084848T1 (de) | 2002-08-29 |
KR100473910B1 (ko) | 2005-03-10 |
EP1662563A3 (de) | 2006-06-28 |
EP1662562A2 (de) | 2006-05-31 |
EP1277209B1 (de) | 2006-03-22 |
EP1277209A2 (de) | 2003-01-22 |
EP1662561B1 (de) | 2009-06-03 |
WO2001008159A2 (en) | 2001-02-01 |
EP1662561A2 (de) | 2006-05-31 |
ATE387010T1 (de) | 2008-03-15 |
US7449390B2 (en) | 2008-11-11 |
WO2001008159A3 (en) | 2002-11-07 |
EP1662563A2 (de) | 2006-05-31 |
DE60026860T2 (de) | 2007-03-15 |
EP1662561A3 (de) | 2006-06-28 |
KR20020085866A (ko) | 2002-11-16 |
US20040097085A1 (en) | 2004-05-20 |
EP1662562A3 (de) | 2006-06-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |