DE60115976D1 - Rechnersystem und Interruptvorgang - Google Patents

Rechnersystem und Interruptvorgang

Info

Publication number
DE60115976D1
DE60115976D1 DE60115976T DE60115976T DE60115976D1 DE 60115976 D1 DE60115976 D1 DE 60115976D1 DE 60115976 T DE60115976 T DE 60115976T DE 60115976 T DE60115976 T DE 60115976T DE 60115976 D1 DE60115976 D1 DE 60115976D1
Authority
DE
Germany
Prior art keywords
computer system
interrupt process
interrupt
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60115976T
Other languages
English (en)
Other versions
DE60115976T2 (de
Inventor
Dale C Morris
James O Hays
Jonathan K Ross
Jerome C Huck
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Institute for Development of Emerging Architectures LLC
Original Assignee
Institute for Development of Emerging Architectures LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Institute for Development of Emerging Architectures LLC filed Critical Institute for Development of Emerging Architectures LLC
Application granted granted Critical
Publication of DE60115976D1 publication Critical patent/DE60115976D1/de
Publication of DE60115976T2 publication Critical patent/DE60115976T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/1407—Checkpointing the instruction stream
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/445—Exploiting fine grain parallelism, i.e. parallelism at instruction level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Advance Control (AREA)
DE60115976T 2000-03-08 2001-02-20 Rechnersystem und Interruptvorgang Expired - Lifetime DE60115976T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US521160 2000-03-08
US09/521,160 US6505296B2 (en) 1997-10-13 2000-03-08 Emulated branch effected by trampoline mechanism

Publications (2)

Publication Number Publication Date
DE60115976D1 true DE60115976D1 (de) 2006-01-26
DE60115976T2 DE60115976T2 (de) 2006-08-03

Family

ID=24075613

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60115976T Expired - Lifetime DE60115976T2 (de) 2000-03-08 2001-02-20 Rechnersystem und Interruptvorgang

Country Status (3)

Country Link
US (1) US6505296B2 (de)
EP (1) EP1132814B1 (de)
DE (1) DE60115976T2 (de)

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JPH11259437A (ja) * 1998-03-12 1999-09-24 Hitachi Ltd 不要バリア命令の削減方式
US7089404B1 (en) 1999-06-14 2006-08-08 Transmeta Corporation Method and apparatus for enhancing scheduling in an advanced microprocessor
US6640315B1 (en) * 1999-06-26 2003-10-28 Board Of Trustees Of The University Of Illinois Method and apparatus for enhancing instruction level parallelism
US6748589B1 (en) 1999-10-20 2004-06-08 Transmeta Corporation Method for increasing the speed of speculative execution
US6810493B1 (en) * 2000-03-20 2004-10-26 Palm Source, Inc. Graceful recovery from and avoidance of crashes due to notification of third party applications
US6948095B2 (en) * 2000-04-20 2005-09-20 Stmicroelectronics Limited Methods and apparatus for dynamically loading a file on a target computer system
GB0009943D0 (en) * 2000-04-20 2000-06-07 Sgs Thomson Microelectronics Operating a computer system
US6738893B1 (en) * 2000-04-25 2004-05-18 Transmeta Corporation Method and apparatus for scheduling to reduce space and increase speed of microprocessor operations
JP2001325111A (ja) * 2000-05-16 2001-11-22 Hitachi Ltd 投機機構向けコンパイル方法
US6615343B1 (en) * 2000-06-22 2003-09-02 Sun Microsystems, Inc. Mechanism for delivering precise exceptions in an out-of-order processor with speculative execution
US6681317B1 (en) * 2000-09-29 2004-01-20 Intel Corporation Method and apparatus to provide advanced load ordering
JP3707727B2 (ja) * 2000-10-30 2005-10-19 インターナショナル・ビジネス・マシーンズ・コーポレーション プログラムの最適化方法及びこれを用いたコンパイラ
US7331040B2 (en) * 2002-02-06 2008-02-12 Transitive Limted Condition code flag emulation for program code conversion
GB0202728D0 (en) * 2002-02-06 2002-03-27 Transitive Technologies Ltd Condition code flag emulation for program code conversion
US20060053296A1 (en) * 2002-05-24 2006-03-09 Axel Busboom Method for authenticating a user to a service of a service provider
US7080231B2 (en) * 2002-10-18 2006-07-18 Sun Microsystems, Inc. Processor with tagging buffer and methods for avoiding memory collisions
US20040117606A1 (en) * 2002-12-17 2004-06-17 Hong Wang Method and apparatus for dynamically conditioning statically produced load speculation and prefetches using runtime information
US7840949B2 (en) * 2003-11-03 2010-11-23 Ramal Acquisition Corp. System and method for data transformation using dataflow graphs
US7210024B2 (en) * 2005-02-10 2007-04-24 Qualcomm Incorporated Conditional instruction execution via emissary instruction for condition evaluation
TW200630888A (en) * 2005-02-23 2006-09-01 Inst Information Industry Non-delay just-in-time kilo virtual machine system and initialization process for same
JP2008293378A (ja) * 2007-05-25 2008-12-04 Panasonic Corp プログラム書き換え装置
KR20110070468A (ko) * 2009-12-18 2011-06-24 삼성전자주식회사 인스트루먼테이션 실행 장치 및 방법
KR101991680B1 (ko) 2012-01-25 2019-06-21 삼성전자 주식회사 소프트웨어 파이프라인된 프로그램의 하드웨어 디버깅 장치 및 방법
US9384002B2 (en) 2012-11-16 2016-07-05 International Business Machines Corporation Speculative finish of instruction execution in a processor core
US20150363230A1 (en) * 2013-01-23 2015-12-17 Waseda University Parallelism extraction method and method for making program
US10831496B2 (en) * 2019-02-28 2020-11-10 International Business Machines Corporation Method to execute successive dependent instructions from an instruction stream in a processor

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5778219A (en) 1990-12-14 1998-07-07 Hewlett-Packard Company Method and system for propagating exception status in data registers and for detecting exceptions from speculative operations with non-speculative operations
JP2786574B2 (ja) 1992-05-06 1998-08-13 インターナショナル・ビジネス・マシーンズ・コーポレイション コンピュータ・システムにおける順不同ロード動作の性能を改善する方法と装置
US5438677A (en) 1992-08-17 1995-08-01 Intel Corporation Mutual exclusion for computer system
US6032244A (en) * 1993-01-04 2000-02-29 Cornell Research Foundation, Inc. Multiple issue static speculative instruction scheduling with path tag and precise interrupt handling
US5421020A (en) * 1993-01-08 1995-05-30 International Business Machines Corporation Counter register implementation for speculative execution of branch on count instructions
US5421022A (en) 1993-06-17 1995-05-30 Digital Equipment Corporation Apparatus and method for speculatively executing instructions in a computer system
US5535397A (en) * 1993-06-30 1996-07-09 Intel Corporation Method and apparatus for providing a context switch in response to an interrupt in a computer process
US5634023A (en) 1994-07-01 1997-05-27 Digital Equipment Corporation Software mechanism for accurately handling exceptions generated by speculatively scheduled instructions
US5799179A (en) 1995-01-24 1998-08-25 International Business Machines Corporation Handling of exceptions in speculative instructions
US5625835A (en) 1995-05-10 1997-04-29 International Business Machines Corporation Method and apparatus for reordering memory operations in a superscalar or very long instruction word processor
US5694577A (en) 1995-06-06 1997-12-02 Matsushita Electric Industrial Co., Ltd. Memory conflict buffer for achieving memory disambiguation in compile-time code schedule
US5903749A (en) 1996-07-02 1999-05-11 Institute For The Development Of Emerging Architecture, L.L.C. Method and apparatus for implementing check instructions that allow for the reuse of memory conflict information if no memory conflict occurs
WO1998006038A1 (en) 1996-08-07 1998-02-12 Sun Microsystems, Inc. Architectural support for software pipelining of loops
US5915117A (en) 1997-10-13 1999-06-22 Institute For The Development Of Emerging Architectures, L.L.C. Computer architecture for the deferral of exceptions on speculative instructions
US6145125A (en) * 1998-11-12 2000-11-07 International Business Machines Corporation Method and storage medium for building very large executable programs

Also Published As

Publication number Publication date
DE60115976T2 (de) 2006-08-03
EP1132814B1 (de) 2005-12-21
US6505296B2 (en) 2003-01-07
US20020010851A1 (en) 2002-01-24
EP1132814A1 (de) 2001-09-12

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Legal Events

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