DE60128656D1 - Mehrschichtige leiterplatte und verfahren zu ihrer herstellung - Google Patents

Mehrschichtige leiterplatte und verfahren zu ihrer herstellung

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Publication number
DE60128656D1
DE60128656D1 DE60128656T DE60128656T DE60128656D1 DE 60128656 D1 DE60128656 D1 DE 60128656D1 DE 60128656 T DE60128656 T DE 60128656T DE 60128656 T DE60128656 T DE 60128656T DE 60128656 D1 DE60128656 D1 DE 60128656D1
Authority
DE
Germany
Prior art keywords
production
conductor plate
multilayer conductor
multilayer
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60128656T
Other languages
English (en)
Other versions
DE60128656T2 (de
Inventor
H Sakamoto
T Sugiyama
D Wang
T Kariya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Publication of DE60128656D1 publication Critical patent/DE60128656D1/de
Application granted granted Critical
Publication of DE60128656T2 publication Critical patent/DE60128656T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
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    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147—Assembling terminal to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
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Families Citing this family (308)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4186756B2 (ja) * 2003-08-29 2008-11-26 松下電器産業株式会社 回路基板及びその製造方法
KR20080031522A (ko) 2000-02-25 2008-04-08 이비덴 가부시키가이샤 다층프린트배선판 및 다층프린트배선판의 제조방법
US6713859B1 (en) 2000-09-13 2004-03-30 Intel Corporation Direct build-up layer on an encapsulated die package having a moisture barrier structure
CN100539106C (zh) 2000-09-25 2009-09-09 揖斐电株式会社 半导体元件及其制造方法、多层印刷布线板及其制造方法
US20050097727A1 (en) * 2001-03-28 2005-05-12 Tomoo Iijima Multi-layer wiring board, method for producing multi-layer wiring board, polishing machine for multi-layer wiring board, and metal sheet for producing wiring board
US20020175402A1 (en) * 2001-05-23 2002-11-28 Mccormack Mark Thomas Structure and method of embedding components in multi-layer substrates
JP2003030250A (ja) * 2001-07-12 2003-01-31 Oki Electric Ind Co Ltd プリント基板設計工数見積りシステムと見積りプログラム
CN1575511A (zh) * 2001-09-28 2005-02-02 西门子公司 用于接触基片的电接触面的方法和由具有电接触面的基片形成的装置
US6673698B1 (en) 2002-01-19 2004-01-06 Megic Corporation Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers
TW584950B (en) 2001-12-31 2004-04-21 Megic Corp Chip packaging structure and process thereof
TW544882B (en) 2001-12-31 2003-08-01 Megic Corp Chip package structure and process thereof
TW503496B (en) 2001-12-31 2002-09-21 Megic Corp Chip packaging structure and manufacturing process of the same
TW517361B (en) 2001-12-31 2003-01-11 Megic Corp Chip package structure and its manufacture process
KR100481216B1 (ko) * 2002-06-07 2005-04-08 엘지전자 주식회사 볼 그리드 어레이 패키지 및 그의 제조 방법
US7485489B2 (en) 2002-06-19 2009-02-03 Bjoersell Sten Electronics circuit manufacture
EP1514307A1 (de) * 2002-06-19 2005-03-16 Sten Bjorsell Herstellung elektronischer schaltung
JP4190269B2 (ja) * 2002-07-09 2008-12-03 新光電気工業株式会社 素子内蔵基板製造方法およびその装置
US6964881B2 (en) * 2002-08-27 2005-11-15 Micron Technology, Inc. Multi-chip wafer level system packages and methods of forming same
US20070197030A1 (en) * 2002-10-10 2007-08-23 Samsung Electronics Co., Ltd. Center pad type ic chip with jumpers, method of processing the same and multi chip package
US6998328B2 (en) * 2002-11-06 2006-02-14 Irvine Sensors Corp. Method for creating neo-wafers from singulated integrated circuit die and a device made according to the method
JP3888302B2 (ja) * 2002-12-24 2007-02-28 カシオ計算機株式会社 半導体装置
JP4489411B2 (ja) 2003-01-23 2010-06-23 新光電気工業株式会社 電子部品実装構造の製造方法
JP4137659B2 (ja) * 2003-02-13 2008-08-20 新光電気工業株式会社 電子部品実装構造及びその製造方法
JP4763463B2 (ja) * 2003-02-28 2011-08-31 シーメンス アクチエンゲゼルシヤフト 基板とパワーエレクトロニクス素子を備えた装置およびその製造方法
JP4181510B2 (ja) * 2003-02-28 2008-11-19 日本特殊陶業株式会社 樹脂製配線基板
US20070035013A1 (en) * 2003-05-09 2007-02-15 Hiroyuki Handa Module with built-in circuit elements
TWI246761B (en) * 2003-05-14 2006-01-01 Siliconware Precision Industries Co Ltd Semiconductor package with build-up layers formed on chip and fabrication method of the semiconductor package
EP1487019A1 (de) * 2003-06-12 2004-12-15 Koninklijke Philips Electronics N.V. Halbleitervorrichtung und deren Herstellungsverfahren
JP3678239B2 (ja) 2003-06-30 2005-08-03 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器
US7141884B2 (en) * 2003-07-03 2006-11-28 Matsushita Electric Industrial Co., Ltd. Module with a built-in semiconductor and method for producing the same
JP2005101506A (ja) * 2003-08-21 2005-04-14 Seiko Epson Corp 電子部品実装体の製造方法、電気光学装置の製造方法、電子部品実装体、電気光学装置
DE10343053A1 (de) * 2003-09-16 2005-04-07 Siemens Ag Elektronisches Bauelement und Anordnung mit einem elektronischen Bauelement
US7489032B2 (en) * 2003-12-25 2009-02-10 Casio Computer Co., Ltd. Semiconductor device including a hard sheet to reduce warping of a base plate and method of fabricating the same
JP4516320B2 (ja) * 2004-01-08 2010-08-04 シチズン電子株式会社 Ｌｅｄ基板
JP4298559B2 (ja) * 2004-03-29 2009-07-22 新光電気工業株式会社 電子部品実装構造及びその製造方法
TWI233323B (en) * 2004-04-22 2005-05-21 Phoenix Prec Technology Corp Circuit board with identifiable information and method for fabricating the same
JP4339739B2 (ja) * 2004-04-26 2009-10-07 太陽誘電株式会社 部品内蔵型多層基板
US7229936B2 (en) * 2004-05-03 2007-06-12 International Business Machines Corporation Method to reduce photoresist pattern collapse by controlled surface microroughening
JP4211674B2 (ja) * 2004-05-12 2009-01-21 セイコーエプソン株式会社 半導体装置及びその製造方法、電気光学装置及びその製造方法、並びに電子機器
KR100870216B1 (ko) * 2004-05-27 2008-11-24 이비덴 가부시키가이샤 다층 프린트 배선판
TWI280657B (en) * 2004-05-28 2007-05-01 Sanyo Electric Co Circuit device
US20060030069A1 (en) * 2004-08-04 2006-02-09 Chien-Wei Chang Packaging method for manufacturing substrates
JP4559163B2 (ja) * 2004-08-31 2010-10-06 ルネサスエレクトロニクス株式会社 半導体装置用パッケージ基板およびその製造方法と半導体装置
KR100651124B1 (ko) * 2004-11-08 2006-12-06 삼성전자주식회사 Ｗｂｇａ형 반도체 패키지 및 그 제조방법
FI20041525A (fi) 2004-11-26 2006-03-17 Imbera Electronics Oy Elektroniikkamoduuli ja menetelmä sen valmistamiseksi
DE102004059389B4 (de) * 2004-12-09 2012-02-23 Infineon Technologies Ag Halbleiterbauelement mit Ausgleichsmetallisierung
KR100688769B1 (ko) * 2004-12-30 2007-03-02 삼성전기주식회사 도금에 의한 칩 내장형 인쇄회로기판 및 그 제조 방법
TWI283050B (en) * 2005-02-04 2007-06-21 Phoenix Prec Technology Corp Substrate structure embedded method with semiconductor chip and the method for making the same
KR100716815B1 (ko) * 2005-02-28 2007-05-09 삼성전기주식회사 칩 내장형 인쇄회로기판 및 그 제조방법
JP4581759B2 (ja) * 2005-03-14 2010-11-17 セイコーエプソン株式会社 発光装置、画像形成装置および電子機器
JP3914239B2 (ja) * 2005-03-15 2007-05-16 新光電気工業株式会社 配線基板および配線基板の製造方法
JP4397947B2 (ja) * 2005-03-28 2010-01-13 パナソニック株式会社 フリップチップ実装体とフリップチップ実装方法及びフリップチップ実装装置
US7468545B2 (en) * 2005-05-06 2008-12-23 Megica Corporation Post passivation structure for a semiconductor device and packaging process for same
JP4146864B2 (ja) * 2005-05-31 2008-09-10 新光電気工業株式会社 配線基板及びその製造方法、並びに半導体装置及び半導体装置の製造方法
FI119714B (fi) 2005-06-16 2009-02-13 Imbera Electronics Oy Piirilevyrakenne ja menetelmä piirilevyrakenteen valmistamiseksi
US7327006B2 (en) * 2005-06-23 2008-02-05 Nokia Corporation Semiconductor package
US7582556B2 (en) * 2005-06-24 2009-09-01 Megica Corporation Circuitry component and method for forming the same
TWI297941B (en) * 2005-10-13 2008-06-11 Phoenix Prec Technology Corp Semiconductor device with electroless plating metal connecting layer and method for fabricating the same
US8101868B2 (en) * 2005-10-14 2012-01-24 Ibiden Co., Ltd. Multilayered printed circuit board and method for manufacturing the same
JP5164362B2 (ja) 2005-11-02 2013-03-21 キヤノン株式会社 半導体内臓基板およびその製造方法
US7957154B2 (en) * 2005-12-16 2011-06-07 Ibiden Co., Ltd. Multilayer printed circuit board
JP2007173468A (ja) * 2005-12-21 2007-07-05 Shinko Electric Ind Co Ltd 炭酸ガスレーザによるザグリ加工方法
JP5114041B2 (ja) * 2006-01-13 2013-01-09 日本シイエムケイ株式会社 半導体素子内蔵プリント配線板及びその製造方法
TWI310968B (en) * 2006-02-09 2009-06-11 Phoenix Prec Technology Corp Electrically connecting structure of circuit board with semiconductor chip embedded therein
KR100736635B1 (ko) 2006-02-09 2007-07-06 삼성전기주식회사 베어칩 내장형 인쇄회로기판 및 그 제조 방법
US8012566B2 (en) * 2006-07-12 2011-09-06 Hewlett-Packard Development Company, L.P. Microneedles formed by electroplating and selectively releasing temperature sensitive layers
JP2008085310A (ja) * 2006-08-28 2008-04-10 Clover Denshi Kogyo Kk 多層プリント配線基板
TWI326484B (en) * 2006-09-21 2010-06-21 Advanced Chip Eng Tech Inc Chip package and chip package array
JP5042591B2 (ja) 2006-10-27 2012-10-03 新光電気工業株式会社 半導体パッケージおよび積層型半導体パッケージ
TWI335643B (en) * 2006-11-21 2011-01-01 Unimicron Technology Crop Circuit board structure having embedded semiconductor chip and fabrication method thereof
JP5214139B2 (ja) * 2006-12-04 2013-06-19 新光電気工業株式会社 配線基板及びその製造方法
KR101281972B1 (ko) * 2006-12-07 2013-07-03 삼성전자주식회사 적층형 인쇄회로 기판
DE102007034402B4 (de) * 2006-12-14 2014-06-18 Advanpack Solutions Pte. Ltd. Halbleiterpackung und Herstellungsverfahren dafür
AT11664U1 (de) * 2007-02-16 2011-02-15 Austria Tech & System Tech Verfahren zum entfernen eines teilbereichs einer flächigen materialschicht sowie mehrlagige struktur und verwendung hiefür
JP2008218552A (ja) * 2007-03-01 2008-09-18 Nec Corp 電子部品の実装基板および実装方法
TWI353661B (en) * 2007-04-09 2011-12-01 Unimicron Technology Corp Circuit board structure capable of embedding semic
KR100856209B1 (ko) * 2007-05-04 2008-09-03 삼성전자주식회사 집적회로가 내장된 인쇄회로기판 및 그 제조방법
TW200906263A (en) * 2007-05-29 2009-02-01 Matsushita Electric Ind Co Ltd Circuit board and method for manufacturing the same
JP4588046B2 (ja) * 2007-05-31 2010-11-24 三洋電機株式会社 回路装置およびその製造方法
JP5263918B2 (ja) * 2007-07-24 2013-08-14 日本電気株式会社 半導体装置及びその製造方法
KR101409648B1 (ko) * 2007-08-31 2014-06-19 삼성전자주식회사 집적회로 패키지 및 그 제조방법
KR101424137B1 (ko) * 2007-09-07 2014-08-04 삼성전자주식회사 리세스부를 갖는 수지기판을 구비하는 반도체 패키지 및그의 제조방법
US8238114B2 (en) * 2007-09-20 2012-08-07 Ibiden Co., Ltd. Printed wiring board and method for manufacturing same
US7851246B2 (en) * 2007-12-27 2010-12-14 Stats Chippac, Ltd. Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device
TW200930173A (en) * 2007-12-31 2009-07-01 Phoenix Prec Technology Corp Package substrate having embedded semiconductor element and fabrication method thereof
KR100895820B1 (ko) * 2008-01-02 2009-05-06 주식회사 하이닉스반도체 반도체 패키지용 회로 기판, 이의 제조 방법 및 이를 갖는반도체 패키지
EP2083443A1 (de) * 2008-01-28 2009-07-29 Phoenix Precision Technology Corporation Trägerplattenstruktur mit eingebettetem Halbleiterchip und Herstellungsverfahren dafür
JP5510795B2 (ja) * 2008-01-30 2014-06-04 日本電気株式会社 電子部品の実装構造、電子部品の実装方法、並びに電子部品実装用基板
US7935893B2 (en) * 2008-02-14 2011-05-03 Ibiden Co., Ltd. Method of manufacturing printed wiring board with built-in electronic component
US8024858B2 (en) * 2008-02-14 2011-09-27 Ibiden Co., Ltd. Method of manufacturing printed wiring board with built-in electronic component
JP5262188B2 (ja) * 2008-02-29 2013-08-14 富士通株式会社 基板
WO2009111714A1 (en) * 2008-03-07 2009-09-11 Freedom Scientific, Inc. System and method for the on screen synchronization of selection in virtual document
JP2009218545A (ja) * 2008-03-12 2009-09-24 Ibiden Co Ltd 多層プリント配線板及びその製造方法
JP2009231818A (ja) * 2008-03-21 2009-10-08 Ibiden Co Ltd 多層プリント配線板及びその製造方法
JP2009239247A (ja) * 2008-03-27 2009-10-15 Ibiden Co Ltd 多層プリント配線板の製造方法
TWI363585B (en) * 2008-04-02 2012-05-01 Advanced Semiconductor Eng Method for manufacturing a substrate having embedded component therein
KR100932938B1 (ko) * 2008-04-24 2009-12-21 삼성모바일디스플레이주식회사 기판 제조방법 및 상기 기판을 구비하는 유기 발광디스플레이 장치
FI123205B (fi) 2008-05-12 2012-12-31 Imbera Electronics Oy Piirimoduuli ja menetelmä piirimoduulin valmistamiseksi
JP5217640B2 (ja) * 2008-05-30 2013-06-19 富士通株式会社 プリント配線板の製造方法およびプリント基板ユニットの製造方法
JP5217639B2 (ja) * 2008-05-30 2013-06-19 富士通株式会社 コア基板およびプリント配線板
JP2009290135A (ja) * 2008-05-30 2009-12-10 Fujitsu Ltd プリント配線板の製造方法および導電性接合剤
JP2009290124A (ja) * 2008-05-30 2009-12-10 Fujitsu Ltd プリント配線板
WO2009147547A1 (en) * 2008-06-02 2009-12-10 Nxp B.V. Electronic device and method of manufacturing an electronic device
WO2009147936A1 (ja) * 2008-06-02 2009-12-10 イビデン株式会社 多層プリント配線板の製造方法
KR100996914B1 (ko) * 2008-06-19 2010-11-26 삼성전기주식회사 칩 내장 인쇄회로기판 및 그 제조방법
TWI363411B (en) 2008-07-22 2012-05-01 Advanced Semiconductor Eng Embedded chip substrate and fabrication method thereof
US20100025848A1 (en) 2008-08-04 2010-02-04 Infineon Technologies Ag Method of fabricating a semiconductor device and semiconductor device
KR101109287B1 (ko) * 2008-08-18 2012-01-31 삼성전기주식회사 전자부품 내장형 인쇄회로기판 및 그 제조방법
US8334590B1 (en) * 2008-09-04 2012-12-18 Amkor Technology, Inc. Semiconductor device having insulating and interconnection layers
US8114708B2 (en) * 2008-09-30 2012-02-14 General Electric Company System and method for pre-patterned embedded chip build-up
JPWO2010052942A1 (ja) * 2008-11-06 2012-04-05 イビデン株式会社 電子部品内蔵配線板及びその製造方法
KR101484786B1 (ko) * 2008-12-08 2015-01-21 삼성전자주식회사 집적회로 패키지 내장 인쇄회로기판 및 그 제조방법
JP5026400B2 (ja) * 2008-12-12 2012-09-12 新光電気工業株式会社 配線基板及びその製造方法
US8188380B2 (en) 2008-12-29 2012-05-29 Ibiden Co., Ltd. Printed wiring board and method for manufacturing printed wiring board
US8261435B2 (en) * 2008-12-29 2012-09-11 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
US8082537B1 (en) * 2009-01-28 2011-12-20 Xilinx, Inc. Method and apparatus for implementing spatially programmable through die vias in an integrated circuit
US7989959B1 (en) 2009-01-29 2011-08-02 Xilinx, Inc. Method of forming stacked-die integrated circuit
FI20095110A0 (fi) * 2009-02-06 2009-02-06 Imbera Electronics Oy Elektroniikkamoduuli, jossa on EMI-suoja
TWI384603B (zh) * 2009-02-17 2013-02-01 Advanced Semiconductor Eng 基板結構及應用其之封裝結構
US7843056B2 (en) * 2009-02-20 2010-11-30 National Semiconductor Corporation Integrated circuit micro-module
US7901984B2 (en) * 2009-02-20 2011-03-08 National Semiconductor Corporation Integrated circuit micro-module
US8187920B2 (en) * 2009-02-20 2012-05-29 Texas Instruments Incorporated Integrated circuit micro-module
US7901981B2 (en) * 2009-02-20 2011-03-08 National Semiconductor Corporation Integrated circuit micro-module
US7902661B2 (en) * 2009-02-20 2011-03-08 National Semiconductor Corporation Integrated circuit micro-module
US7898068B2 (en) * 2009-02-20 2011-03-01 National Semiconductor Corporation Integrated circuit micro-module
US7842544B2 (en) * 2009-02-20 2010-11-30 National Semiconductor Corporation Integrated circuit micro-module
US8987868B1 (en) 2009-02-24 2015-03-24 Xilinx, Inc. Method and apparatus for programmable heterogeneous integration of stacked semiconductor die
KR101055509B1 (ko) * 2009-03-19 2011-08-08 삼성전기주식회사 전자부품 내장형 인쇄회로기판
JP5106460B2 (ja) * 2009-03-26 2012-12-26 新光電気工業株式会社 半導体装置及びその製造方法、並びに電子装置
TW201110275A (en) * 2009-05-13 2011-03-16 Seiko Instr Inc Electronic component, manufacturing method for electronic component, and electronic device
FI20095557A0 (fi) * 2009-05-19 2009-05-19 Imbera Electronics Oy Valmistusmenetelmä ja elektroniikkamoduuli, joka tarjoaa uusia mahdollisuuksia johdevedoille
KR101169531B1 (ko) 2009-07-03 2012-07-27 가부시키가이샤 테라미크로스 반도체구성체 및 그 제조방법과 반도체장치 및 그 제조방법
KR101038482B1 (ko) * 2009-07-08 2011-06-02 삼성전기주식회사 전자소자 내장형 인쇄회로기판 및 그 제조방법
US9466719B2 (en) 2009-07-15 2016-10-11 Qualcomm Incorporated Semiconductor-on-insulator with back side strain topology
US8912646B2 (en) 2009-07-15 2014-12-16 Silanna Semiconductor U.S.A., Inc. Integrated circuit assembly and method of making
US9390974B2 (en) 2012-12-21 2016-07-12 Qualcomm Incorporated Back-to-back stacked integrated circuit assembly and method of making
TWI619235B (zh) 2009-07-15 2018-03-21 高通公司 具背側散熱能力之絕緣體上半導體結構
US9496227B2 (en) 2009-07-15 2016-11-15 Qualcomm Incorporated Semiconductor-on-insulator with back side support layer
US8400782B2 (en) * 2009-07-24 2013-03-19 Ibiden Co., Ltd. Wiring board and method for manufacturing the same
TWI528514B (zh) * 2009-08-20 2016-04-01 精材科技股份有限公司 晶片封裝體及其製造方法
DE102009038674B4 (de) * 2009-08-24 2012-02-09 Epcos Ag Trägervorrichtung, Anordnung mit einer solchen Trägervorrichtung sowie Verfahren zur Herstellung eines mindestens eine keramische Schicht umfassenden struktururierten Schichtstapels
US20110048777A1 (en) * 2009-08-25 2011-03-03 Chien-Wei Chang Component-Embedded Printed Circuit Board
US8432022B1 (en) 2009-09-29 2013-04-30 Amkor Technology, Inc. Shielded embedded electronic component substrate fabrication method and structure
KR101113501B1 (ko) * 2009-11-12 2012-02-29 삼성전기주식회사 반도체 패키지의 제조 방법
US8435837B2 (en) * 2009-12-15 2013-05-07 Silicon Storage Technology, Inc. Panel based lead frame packaging method and device
US9420707B2 (en) 2009-12-17 2016-08-16 Intel Corporation Substrate for integrated circuit devices including multi-layer glass core and methods of making the same
US8207453B2 (en) * 2009-12-17 2012-06-26 Intel Corporation Glass core substrate for integrated circuit devices and methods of making the same
JP5544872B2 (ja) * 2009-12-25 2014-07-09 富士通セミコンダクター株式会社 半導体装置及びその製造方法
US8901724B2 (en) * 2009-12-29 2014-12-02 Intel Corporation Semiconductor package with embedded die and its methods of fabrication
US8513062B2 (en) * 2010-02-16 2013-08-20 Infineon Technologies Ag Method of manufacturing a semiconductor device with a carrier having a cavity and semiconductor device
JP5115573B2 (ja) * 2010-03-03 2013-01-09 オムロン株式会社 接続用パッドの製造方法
KR101104210B1 (ko) * 2010-03-05 2012-01-10 삼성전기주식회사 전자소자 내장형 인쇄회로기판 및 그 제조방법
US20110215450A1 (en) * 2010-03-05 2011-09-08 Chi Heejo Integrated circuit packaging system with encapsulation and method of manufacture thereof
CN102208383B (zh) * 2010-03-31 2013-08-28 南亚电路板股份有限公司 电路板的形成方法
US9015023B2 (en) 2010-05-05 2015-04-21 Xilinx, Inc. Device specific configuration of operating voltage
JP2011253911A (ja) * 2010-06-01 2011-12-15 Shinko Electric Ind Co Ltd 配線基板
KR20110139462A (ko) * 2010-06-23 2011-12-29 삼성전기주식회사 절연수지 조성물 및 이를 이용하여 제조된 인쇄회로기판
US9485546B2 (en) 2010-06-29 2016-11-01 Qualcomm Incorporated Signaling video samples for trick mode video representations
TWI421956B (zh) * 2010-07-13 2014-01-01 矽品精密工業股份有限公司 晶片尺寸封裝件及其製法
CN102348324B (zh) * 2010-07-23 2016-02-10 伊姆贝拉电子有限公司 布线图案之间具有馈通导体的电子模块
KR101138542B1 (ko) * 2010-08-09 2012-04-25 삼성전기주식회사 다층 인쇄회로기판의 제조방법
US8421212B2 (en) 2010-09-22 2013-04-16 Stats Chippac Ltd. Integrated circuit packaging system with active surface heat removal and method of manufacture thereof
JP2012069739A (ja) * 2010-09-24 2012-04-05 Shinko Electric Ind Co Ltd 配線基板の製造方法
US8546922B2 (en) 2010-09-30 2013-10-01 Ibiden Co., Ltd. Wiring board
US20120126399A1 (en) 2010-11-22 2012-05-24 Bridge Semiconductor Corporation Thermally enhanced semiconductor assembly with bump/base/flange heat spreader and build-up circuitry
US8927339B2 (en) 2010-11-22 2015-01-06 Bridge Semiconductor Corporation Method of making thermally enhanced semiconductor assembly with bump/base/flange heat spreader and build-up circuitry
US8343808B2 (en) 2010-11-22 2013-01-01 Bridge Semiconductor Corporation Method of making stackable semiconductor assembly with bump/base/flange heat spreader and build-up circuitry
US8841171B2 (en) 2010-11-22 2014-09-23 Bridge Semiconductor Corporation Method of making stackable semiconductor assembly with bump/flange heat spreader and dual build-up circuitry
JP2012129452A (ja) * 2010-12-17 2012-07-05 Toshiba Corp 半導体装置、半導体パッケージおよび半導体装置の製造方法
TWI426584B (zh) 2010-12-22 2014-02-11 矽品精密工業股份有限公司 半導體封裝件及其製法
CN102024389B (zh) * 2010-12-29 2014-08-27 利亚德光电股份有限公司 Led显示板及led显示器
CN102013218B (zh) * 2010-12-29 2013-07-10 利亚德光电股份有限公司 Led显示板及led显示器
US20120175763A1 (en) * 2011-01-06 2012-07-12 International Business Machines Corporation Integrated circuit packaging including auxiliary circuitry
JP5827476B2 (ja) * 2011-03-08 2015-12-02 株式会社東芝 半導体モジュール及びその製造方法
US8595927B2 (en) * 2011-03-17 2013-12-03 Ibiden Co., Ltd. Method for manufacturing multilayer printed wiring board
KR101283821B1 (ko) * 2011-05-03 2013-07-08 엘지이노텍 주식회사 인쇄회로기판의 제조 방법
JP2012256675A (ja) * 2011-06-08 2012-12-27 Shinko Electric Ind Co Ltd 配線基板、半導体装置及びその製造方法
US20130068509A1 (en) * 2011-09-21 2013-03-21 Mosaid Technologies Incorporated Method and apparatus for connecting inlaid chip into printed circuit board
US8963313B2 (en) * 2011-12-22 2015-02-24 Raytheon Company Heterogeneous chip integration with low loss interconnection through adaptive patterning
US20130168132A1 (en) * 2011-12-29 2013-07-04 Sumsung Electro-Mechanics Co., Ltd. Printed circuit board and method of manufacturing the same
US9117730B2 (en) * 2011-12-29 2015-08-25 Ibiden Co., Ltd. Printed wiring board and method for manufacturing printed wiring board
KR101443959B1 (ko) * 2012-01-05 2014-09-29 완-링 유 반도체 패키지 구조 및 그 제작방법
EP2615638A3 (de) * 2012-01-16 2013-09-25 Yu, Wan-Ling Halbleitergehäusestruktur und Verfahren zu deren Herstellung
DE102012001346A1 (de) * 2012-01-24 2013-07-25 Giesecke & Devrient Gmbh Verfahren zum Herstellen eines Datenträgers
US8772058B2 (en) * 2012-02-02 2014-07-08 Harris Corporation Method for making a redistributed wafer using transferrable redistribution layers
US20130229777A1 (en) * 2012-03-01 2013-09-05 Infineon Technologies Ag Chip arrangements and methods for forming a chip arrangement
US9445496B2 (en) 2012-03-07 2016-09-13 Intel Corporation Glass clad microelectronic substrate
JP5903337B2 (ja) * 2012-06-08 2016-04-13 新光電気工業株式会社 半導体パッケージ及びその製造方法
US8810020B2 (en) * 2012-06-22 2014-08-19 Freescale Semiconductor, Inc. Semiconductor device with redistributed contacts
US10373930B2 (en) * 2012-08-10 2019-08-06 Cyntec Co., Ltd Package structure and the method to fabricate thereof
TWI574355B (zh) * 2012-08-13 2017-03-11 矽品精密工業股份有限公司 半導體封裝件及其製法
US9087847B2 (en) 2012-08-14 2015-07-21 Bridge Semiconductor Corporation Thermally enhanced interconnect substrate with embedded semiconductor device and built-in stopper and method of making the same
US8901435B2 (en) 2012-08-14 2014-12-02 Bridge Semiconductor Corporation Hybrid wiring board with built-in stopper, interposer and build-up circuitry
JP5236826B1 (ja) * 2012-08-15 2013-07-17 太陽誘電株式会社 電子部品内蔵基板
DE102012107876A1 (de) * 2012-08-27 2014-02-27 Epcos Ag Trägerplatte, Vorrichtung mit Trägerplatte sowie Verfahren zur Herstellung einer Trägerplatte
US8890628B2 (en) 2012-08-31 2014-11-18 Intel Corporation Ultra slim RF package for ultrabooks and smart phones
US9673162B2 (en) * 2012-09-13 2017-06-06 Nxp Usa, Inc. High power semiconductor package subsystems
US9001520B2 (en) 2012-09-24 2015-04-07 Intel Corporation Microelectronic structures having laminated or embedded glass routing structures for high density packaging
US8664656B1 (en) * 2012-10-04 2014-03-04 Apple Inc. Devices and methods for embedding semiconductors in printed circuit boards
KR102042033B1 (ko) * 2012-10-30 2019-11-08 엘지이노텍 주식회사 칩 실장형 인쇄회로기판 및 그 제조방법
KR101420526B1 (ko) * 2012-11-29 2014-07-17 삼성전기주식회사 전자부품 내장기판 및 그 제조방법
US9538633B2 (en) * 2012-12-13 2017-01-03 Nvidia Corporation Passive cooling system integrated into a printed circuit board for cooling electronic components
JP5624700B1 (ja) 2012-12-21 2014-11-12 パナソニック株式会社 電子部品パッケージおよびその製造方法
US9825209B2 (en) * 2012-12-21 2017-11-21 Panasonic Intellectual Property Management Co., Ltd. Electronic component package and method for manufacturing the same
WO2014097644A1 (ja) * 2012-12-21 2014-06-26 パナソニック株式会社 電子部品パッケージおよびその製造方法
WO2014097643A1 (ja) 2012-12-21 2014-06-26 パナソニック株式会社 電子部品パッケージおよびその製造方法
WO2014097642A1 (ja) 2012-12-21 2014-06-26 パナソニック株式会社 電子部品パッケージおよびその製造方法
WO2014125851A1 (ja) * 2013-02-14 2014-08-21 株式会社村田製作所 回路基板およびその製造方法
JP2014167053A (ja) * 2013-02-28 2014-09-11 3M Innovative Properties Co 高熱伝導性プリプレグ、プリプレグを用いた配線板および多層配線板、ならびに多層配線板を用いた半導体装置
US9048222B2 (en) 2013-03-06 2015-06-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating interconnect structure for package-on-package devices
US9275925B2 (en) 2013-03-12 2016-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for an improved interconnect structure
US9763370B2 (en) 2013-03-15 2017-09-12 National Technology & Engineering Solutions Of Sandia, Llc Apparatus for assembly of microelectronic devices
JP5951115B2 (ja) * 2013-04-04 2016-07-13 三菱電機株式会社 エンジン自動停止再始動装置、及びエンジン自動停止再始動方法
US9000490B2 (en) 2013-04-19 2015-04-07 Xilinx, Inc. Semiconductor package having IC dice and voltage tuners
JP6103054B2 (ja) * 2013-06-18 2017-03-29 株式会社村田製作所 樹脂多層基板の製造方法
JP2015026774A (ja) * 2013-07-29 2015-02-05 京セラサーキットソリューションズ株式会社 配線基板の製造方法
JP6705096B2 (ja) * 2013-08-21 2020-06-03 インテル・コーポレーション バンプレスビルドアップ層（ｂｂｕｌ）用のバンプレスダイ−パッケージインターフェースを備えるパッケージアセンブリ、コンピューティングデバイス、及びパッケージアセンブリの製造方法
CN104427747B (zh) * 2013-08-30 2017-10-10 深南电路有限公司 一种内层埋铜的电路板及其加工方法
WO2015043495A1 (zh) * 2013-09-30 2015-04-02 南通富士通微电子股份有限公司 晶圆封装结构和封装方法
NL2011575C2 (en) * 2013-10-08 2015-04-09 Besi Netherlands B V Method for positioning a carrier with electronic components and electronic component produced with such method.
US9318411B2 (en) 2013-11-13 2016-04-19 Brodge Semiconductor Corporation Semiconductor package with package-on-package stacking capability and method of manufacturing the same
CN105934823A (zh) 2013-11-27 2016-09-07 At&S奥地利科技与系统技术股份公司 印刷电路板结构
TWI503902B (zh) * 2013-11-29 2015-10-11 矽品精密工業股份有限公司 半導體封裝件及其製法
US10056294B2 (en) * 2013-12-02 2018-08-21 Maxim Integrated Products, Inc. Techniques for adhesive control between a substrate and a die
US9209154B2 (en) 2013-12-04 2015-12-08 Bridge Semiconductor Corporation Semiconductor package with package-on-package stacking capability and method of manufacturing the same
AT515101B1 (de) 2013-12-12 2015-06-15 Austria Tech & System Tech Verfahren zum Einbetten einer Komponente in eine Leiterplatte
US9583420B2 (en) * 2015-01-23 2017-02-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufactures
TWI517322B (zh) 2014-02-19 2016-01-11 鈺橋半導體股份有限公司 半導體元件及其製作方法
US11523520B2 (en) * 2014-02-27 2022-12-06 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Method for making contact with a component embedded in a printed circuit board
US9343434B2 (en) 2014-02-27 2016-05-17 Taiwan Semiconductor Manufacturing Company, Ltd. Laser marking in packages
AT515447B1 (de) * 2014-02-27 2019-10-15 At & S Austria Tech & Systemtechnik Ag Verfahren zum Kontaktieren eines in eine Leiterplatte eingebetteten Bauelements sowie Leiterplatte
US9589900B2 (en) 2014-02-27 2017-03-07 Taiwan Semiconductor Manufacturing Company, Ltd. Metal pad for laser marking
CN104902676A (zh) * 2014-03-06 2015-09-09 常熟东南相互电子有限公司 印刷电路板及其制法
US9281297B2 (en) 2014-03-07 2016-03-08 Taiwan Semiconductor Manufacturing Company, Ltd. Solution for reducing poor contact in info packages
US9305874B2 (en) 2014-04-13 2016-04-05 Infineon Technologies Ag Baseplate for an electronic module and method of manufacturing the same
KR102250997B1 (ko) 2014-05-02 2021-05-12 삼성전자주식회사 반도체 패키지
JP2015222753A (ja) * 2014-05-22 2015-12-10 イビデン株式会社 プリント配線板及びその製造方法
US9666522B2 (en) 2014-05-29 2017-05-30 Taiwan Semiconductor Manufacturing Company, Ltd. Alignment mark design for packages
US9449947B2 (en) 2014-07-01 2016-09-20 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package for thermal dissipation
US9515181B2 (en) 2014-08-06 2016-12-06 Qualcomm Incorporated Semiconductor device with self-aligned back side features
US9721799B2 (en) 2014-11-07 2017-08-01 Advanced Semiconductor Engineering, Inc. Semiconductor package with reduced via hole width and reduced pad patch and manufacturing method thereof
US10079156B2 (en) 2014-11-07 2018-09-18 Advanced Semiconductor Engineering, Inc. Semiconductor package including dielectric layers defining via holes extending to component pads
US9673096B2 (en) * 2014-11-14 2017-06-06 Infineon Technologies Ag Method for processing a semiconductor substrate and a method for processing a semiconductor wafer
US9420695B2 (en) 2014-11-19 2016-08-16 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and semiconductor process
US9426891B2 (en) 2014-11-21 2016-08-23 Advanced Semiconductor Engineering, Inc. Circuit board with embedded passive component and manufacturing method thereof
JP6247629B2 (ja) * 2014-12-11 2017-12-13 Ckd株式会社 コイル用シートの製造方法、及びコイルの製造方法
JP6352791B2 (ja) 2014-12-11 2018-07-04 Ckd株式会社 コイル用シート、コイル、及びコイルの製造方法
CN105762138B (zh) * 2014-12-15 2019-01-25 财团法人工业技术研究院 整合式毫米波芯片封装结构
US9941226B2 (en) * 2014-12-15 2018-04-10 Industrial Technology Research Institute Integrated millimeter-wave chip package
US10217710B2 (en) 2014-12-15 2019-02-26 Bridge Semiconductor Corporation Wiring board with embedded component and integrated stiffener, method of making the same and face-to-face semiconductor assembly using the same
US10269722B2 (en) 2014-12-15 2019-04-23 Bridge Semiconductor Corp. Wiring board having component integrated with leadframe and method of making the same
US9947625B2 (en) 2014-12-15 2018-04-17 Bridge Semiconductor Corporation Wiring board with embedded component and integrated stiffener and method of making the same
US10306777B2 (en) * 2014-12-15 2019-05-28 Bridge Semiconductor Corporation Wiring board with dual stiffeners and dual routing circuitries integrated together and method of making the same
TWI649848B (zh) * 2014-12-26 2019-02-01 聯華電子股份有限公司 具有凸塊下層金屬的半導體結構及其製作方法
US10177130B2 (en) 2015-04-01 2019-01-08 Bridge Semiconductor Corporation Semiconductor assembly having anti-warping controller and vertical connecting element in stiffener
US10062663B2 (en) 2015-04-01 2018-08-28 Bridge Semiconductor Corporation Semiconductor assembly with built-in stiffener and integrated dual routing circuitries and method of making the same
JP2016207940A (ja) * 2015-04-27 2016-12-08 イビデン株式会社 電子部品内蔵配線板及びその製造方法
CN106206905B (zh) * 2015-04-29 2019-01-15 光宝光电(常州)有限公司 发光二极管封装结构
US10109588B2 (en) * 2015-05-15 2018-10-23 Samsung Electro-Mechanics Co., Ltd. Electronic component package and package-on-package structure including the same
US10049970B2 (en) * 2015-06-17 2018-08-14 Samsung Electronics Co., Ltd. Methods of manufacturing printed circuit board and semiconductor package
TWI602482B (zh) * 2015-06-30 2017-10-11 To solder paste embedded electronic components within the circuit board manufacturing method
KR101666757B1 (ko) * 2015-07-13 2016-10-24 앰코 테크놀로지 코리아 주식회사 반도체 패키지
US10096573B2 (en) * 2015-07-28 2018-10-09 Bridge Semiconductor Corporation Face-to-face semiconductor assembly having semiconductor device in dielectric recess
US9570387B1 (en) * 2015-08-19 2017-02-14 Nxp Usa, Inc. Three-dimensional integrated circuit systems in a package and methods therefor
US9893058B2 (en) * 2015-09-17 2018-02-13 Semiconductor Components Industries, Llc Method of manufacturing a semiconductor device having reduced on-state resistance and structure
US10182499B2 (en) * 2015-11-09 2019-01-15 The University Of Memphis Research Foundation Multilayer additive printed circuit
US9570372B1 (en) 2016-03-24 2017-02-14 Bridge Semiconductor Corporation Thermally enhanced semiconductor assembly with heat spreader and integrated dual build-up circuitries and method of making the same
JP2017183635A (ja) * 2016-03-31 2017-10-05 ソニー株式会社 半導体装置、半導体装置の製造方法、集積基板、及び、電子機器
US11272619B2 (en) * 2016-09-02 2022-03-08 Intel Corporation Apparatus with embedded fine line space in a cavity, and a method for forming the same
CN107809852A (zh) * 2016-09-08 2018-03-16 鹏鼎控股(深圳)股份有限公司 无导线表面电镀方法及由该方法制得的电路板
WO2018063383A1 (en) 2016-09-30 2018-04-05 Intel Corporation Active package substrate having anisotropic conductive layer
TWI611538B (zh) * 2016-10-25 2018-01-11 旭德科技股份有限公司 封裝載板及其製作方法
US20180166356A1 (en) * 2016-12-13 2018-06-14 Globalfoundries Inc. Fan-out circuit packaging with integrated lid
KR102055593B1 (ko) * 2017-02-03 2019-12-13 삼성전자주식회사 팬-아웃 반도체 패키지
CN209572247U (zh) * 2017-02-23 2019-11-01 株式会社村田制作所 电子部件及电子设备
EP3373714B1 (de) * 2017-03-08 2023-08-23 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Hybridkomponententräger und verfahren zur herstellung davon
WO2018182595A1 (en) * 2017-03-29 2018-10-04 Intel Corporation Embedded die microelectronic device with molded component
WO2018181552A1 (ja) 2017-03-31 2018-10-04 国立研究開発法人産業技術総合研究所 ウェハ上のアライメントマークを用いる半導体パッケージの製造方法
US10257925B2 (en) 2017-04-10 2019-04-09 Tactotek Oy Method for manufacturing an electronic assembly
DE102018108924A1 (de) 2017-06-30 2019-01-03 Taiwan Semiconductor Manufacturing Company, Ltd. Halbleiter-Package und Verfahren
US10872864B2 (en) 2017-06-30 2020-12-22 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package and method
KR102459308B1 (ko) * 2017-07-31 2022-10-31 삼성전자주식회사 반도체 패키지의 제조 방법
KR102440119B1 (ko) 2017-08-10 2022-09-05 삼성전자주식회사 반도체 패키지 및 그 제조방법
JP7085328B2 (ja) 2017-09-29 2022-06-16 日東電工株式会社 配線回路基板、その製造方法および撮像装置
CN107749395B (zh) * 2017-10-30 2020-06-26 武汉新芯集成电路制造有限公司 一种晶圆打标的方法
KR20190075647A (ko) * 2017-12-21 2019-07-01 삼성전자주식회사 팬-아웃 반도체 패키지
JP7046639B2 (ja) * 2018-02-21 2022-04-04 新光電気工業株式会社 配線基板及びその製造方法
JP7056226B2 (ja) 2018-02-27 2022-04-19 Tdk株式会社 回路モジュール
EP3557608A1 (de) 2018-04-19 2019-10-23 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Verpackte integrierte schaltung mit zwischenschaltfunktionalität und verfahren zur herstellung solch einer verpackten integrierten schaltung
CN110557887B (zh) * 2018-05-31 2021-10-12 京东方科技集团股份有限公司 电路对位组件及显示装置
US10340249B1 (en) * 2018-06-25 2019-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
TWI682480B (zh) * 2018-09-19 2020-01-11 易華電子股份有限公司 印刷電路板佈線系統
KR102160035B1 (ko) * 2018-11-06 2020-09-25 삼성전자주식회사 반도체 패키지
KR102443028B1 (ko) * 2018-11-06 2022-09-14 삼성전자주식회사 반도체 패키지
US20200161206A1 (en) * 2018-11-20 2020-05-21 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and semiconductor manufacturing process
CN111524873B (zh) * 2019-02-01 2022-05-13 台达电子企业管理（上海）有限公司 嵌入式封装模块及其封装方法
EP3954182A4 (de) * 2019-04-08 2022-06-01 Nano-Dimension Technologies, Ltd. Systeme und verfahren zur generativen fertigung von smt-befestigungsbuchsen
EP3739618A1 (de) * 2019-05-15 2020-11-18 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Komponententräger mit in schichtstapel eingebetteter oberflächenkontaktierbarer komponente
JP7379511B2 (ja) * 2019-09-25 2023-11-14 京セラ株式会社 印刷配線板および印刷配線板の製造方法
TWI715214B (zh) * 2019-09-26 2021-01-01 日商京瓷股份有限公司 印刷配線板及印刷配線板之製造方法
CN111564414B (zh) * 2019-12-12 2021-09-24 奥特斯(中国)有限公司 部件承载件及制造部件承载件的方法
KR20210076583A (ko) * 2019-12-16 2021-06-24 삼성전기주식회사 전자부품 내장기판
TWI744805B (zh) * 2020-02-24 2021-11-01 頎邦科技股份有限公司 電路板
JP2022002249A (ja) * 2020-06-19 2022-01-06 キオクシア株式会社 半導体装置およびその製造方法
US11342248B2 (en) * 2020-07-14 2022-05-24 Gan Systems Inc. Embedded die packaging for power semiconductor devices
TWI731776B (zh) * 2020-08-26 2021-06-21 友達光電股份有限公司 電子裝置
US20220312591A1 (en) * 2021-03-26 2022-09-29 Juniper Networks, Inc. Substrate with conductive pads and conductive layers
CN113451259B (zh) * 2021-05-14 2023-04-25 珠海越亚半导体股份有限公司 一种多器件分次嵌埋封装基板及其制造方法

Family Cites Families (169)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3495324A (en) 1967-11-13 1970-02-17 Sperry Rand Corp Ohmic contact for planar devices
US3775844A (en) 1970-06-25 1973-12-04 Bunker Ramo Method of fabricating a multiwafer electrical circuit structure
US4372996A (en) * 1972-05-09 1983-02-08 Massachusetts Institute Of Technology Method for metallizing aluminum pads of an integrated circuit chip
JPS49131863U (de) 1973-03-10 1974-11-13
US3909590A (en) * 1975-01-10 1975-09-30 Howmedica Furnace assembly for firing dental products
US4356223A (en) * 1980-02-28 1982-10-26 Nippon Electric Co., Ltd. Semiconductor device having a registration mark for use in an exposure technique for micro-fine working
US4751146A (en) 1985-07-09 1988-06-14 Showa Denko Kabushiki Kaisha Printed circuit boards
US4783695A (en) * 1986-09-26 1988-11-08 General Electric Company Multichip integrated circuit packaging configuration and method
US4835704A (en) * 1986-12-29 1989-05-30 General Electric Company Adaptive lithography system to provide high density interconnect
KR910006967B1 (ko) 1987-11-18 1991-09-14 가시오 게이상기 가부시기가이샤 반도체 장치의 범프 전극 구조 및 그 형성 방법
JPH0258345A (ja) 1988-08-24 1990-02-27 Hitachi Ltd 半導体装置
BE1002529A6 (nl) 1988-09-27 1991-03-12 Bell Telephone Mfg Methode om een elektronische component te monteren en geheugen kaart waarin deze wordt toegepast.
US4894115A (en) * 1989-02-14 1990-01-16 General Electric Company Laser beam scanning method for forming via holes in polymer materials
JPH02312296A (ja) 1989-05-26 1990-12-27 Japan Radio Co Ltd 高密度実装モジュールの製造方法
JPH0324786A (ja) 1989-06-22 1991-02-01 Sharp Corp ホトエッチングされる回路基板の位置決め構造
JPH0338084A (ja) 1989-07-04 1991-02-19 Sharp Corp 回路基板の接続方法
JPH0350734A (ja) 1989-07-18 1991-03-05 Seiko Epson Corp 集積回路の製造方法
JPH03101234A (ja) 1989-08-14 1991-04-26 Nec Corp 半導体装置の製造方法
JPH0377327A (ja) 1989-08-19 1991-04-02 Fujitsu Ltd バンプ電極形半導体装置およびその製造方法
US5021016A (en) * 1990-03-05 1991-06-04 Currey Lesley B Outboard motor support
US5081563A (en) * 1990-04-27 1992-01-14 International Business Machines Corporation Multi-layer package incorporating a recessed cavity for a semiconductor chip
JP3091214B2 (ja) 1990-05-11 2000-09-25 株式会社日立製作所 マルチチップ・モジュールの製造方法
JP2785444B2 (ja) 1990-05-16 1998-08-13 松下電器産業株式会社 半導体装置およびその製造方法ならびに半導体装置を用いた電子回路装置
JPH04233867A (ja) 1990-06-27 1992-08-21 Xerox Corp サブミクロンの揺動補正を有する光学的走査システム
US5357403A (en) * 1990-06-29 1994-10-18 General Electric Company Adaptive lithography in a high density interconnect structure whose signal layers have fixed patterns
US5161093A (en) 1990-07-02 1992-11-03 General Electric Company Multiple lamination high density interconnect process and structure employing a variable crosslinking adhesive
US5073814A (en) * 1990-07-02 1991-12-17 General Electric Company Multi-sublayer dielectric layers
DE4028776C2 (de) 1990-07-03 1994-03-10 Samsung Electronics Co Ltd Verfahren zur Bildung einer metallischen Verdrahtungsschicht und Füllen einer Kontaktöffnung in einem Halbleiterbauelement
JPH0465832A (ja) 1990-07-06 1992-03-02 Fujitsu Ltd 半導体装置の製造方法
JPH04233258A (ja) 1990-07-23 1992-08-21 Internatl Business Mach Corp <Ibm> 超小型電子回路パッケージ
JPH04154197A (ja) 1990-10-18 1992-05-27 Nippon Chemicon Corp 部品内蔵多層基板
US5386623A (en) * 1990-11-15 1995-02-07 Hitachi, Ltd. Process for manufacturing a multi-chip module
US5126016A (en) * 1991-02-01 1992-06-30 International Business Machines Corporation Circuitization of polymeric circuit boards with galvanic removal of chromium adhesion layers
US5256875A (en) * 1992-05-14 1993-10-26 Teledyne Mec Method for generating filtered noise signal and broadband signal having reduced dynamic range for use in mass spectrometry
US5111278A (en) 1991-03-27 1992-05-05 Eichelberger Charles W Three-dimensional multichip module systems
US5250843A (en) * 1991-03-27 1993-10-05 Integrated System Assemblies Corp. Multichip integrated circuit modules
US5130889A (en) 1991-06-28 1992-07-14 Digital Equipment Corporation Integrated circuit protection by liquid encapsulation
JPH0546069A (ja) 1991-08-08 1993-02-26 Yamaha Corp ピアノ運指表示装置
JPH0548000A (ja) 1991-08-13 1993-02-26 Fujitsu Ltd 半導体装置
JP3081326B2 (ja) 1991-12-04 2000-08-28 株式会社日立製作所 半導体モジュール装置
US5289631A (en) * 1992-03-04 1994-03-01 Mcnc Method for testing, burn-in, and/or programming of integrated circuit chips
US5455459A (en) 1992-03-27 1995-10-03 Martin Marietta Corporation Reconstructable interconnect structure for electronic circuits
JPH0821782B2 (ja) 1992-03-30 1996-03-04 日本碍子株式会社 多層回路基板の形成方法
US5304511A (en) 1992-09-29 1994-04-19 Mitsubishi Denki Kabushiki Kaisha Production method of T-shaped gate electrode in semiconductor device
US5309322A (en) 1992-10-13 1994-05-03 Motorola, Inc. Leadframe strip for semiconductor packages and method
US5376584A (en) 1992-12-31 1994-12-27 International Business Machines Corporation Process of making pad structure for solder ball limiting metallurgy having reduced edge stress
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US5306670A (en) 1993-02-09 1994-04-26 Texas Instruments Incorporated Multi-chip integrated circuit module and method for fabrication thereof
JPH06268101A (ja) 1993-03-17 1994-09-22 Hitachi Ltd 半導体装置及びその製造方法、電子装置、リ−ドフレ−ム並びに実装基板
JPH06268098A (ja) 1993-03-17 1994-09-22 Oki Electric Ind Co Ltd 半導体集積回路装置の製造方法
US5422514A (en) 1993-05-11 1995-06-06 Micromodule Systems, Inc. Packaging and interconnect system for integrated circuits
JP3110922B2 (ja) 1993-08-12 2000-11-20 富士通株式会社 マルチチップ・モジュール
DE69330603T2 (de) * 1993-09-30 2002-07-04 Cons Ric Microelettronica Verfahren zur Metallisierung und Verbindung bei der Herstellung von Leistungshalbleiterbauelementen
US5410184A (en) 1993-10-04 1995-04-25 Motorola Microelectronic package comprising tin-copper solder bump interconnections, and method for forming same
JPH07193184A (ja) 1993-12-27 1995-07-28 Fujitsu Ltd マルチチップモジュールの製造方法及びマルチチップモジュール
US5434751A (en) * 1994-04-11 1995-07-18 Martin Marietta Corporation Reworkable high density interconnect structure incorporating a release layer
US5503286A (en) 1994-06-28 1996-04-02 International Business Machines Corporation Electroplated solder terminal
JPH0878572A (ja) 1994-08-31 1996-03-22 Hitachi Ltd 半導体パッケージおよび、それの製造方法および、それを実装した回路ボードと電子機器
JP3424344B2 (ja) 1994-09-01 2003-07-07 ヤマハ株式会社 半導体装置
US5524339A (en) 1994-09-19 1996-06-11 Martin Marietta Corporation Method for protecting gallium arsenide mmic air bridge structures
US5527741A (en) * 1994-10-11 1996-06-18 Martin Marietta Corporation Fabrication and structures of circuit modules with flexible interconnect layers
US5539156A (en) 1994-11-16 1996-07-23 International Business Machines Corporation Non-annular lands
US5561085A (en) 1994-12-19 1996-10-01 Martin Marietta Corporation Structure for protecting air bridges on semiconductor chips from damage
US5972736A (en) 1994-12-21 1999-10-26 Sun Microsystems, Inc. Integrated circuit package and method
US5563449A (en) 1995-01-19 1996-10-08 Cornell Research Foundation, Inc. Interconnect structures using group VIII metals
JP2625398B2 (ja) 1995-03-17 1997-07-02 日本電気株式会社 マルチチップ冷却装置
JP3356921B2 (ja) 1995-03-24 2002-12-16 新光電気工業株式会社 半導体装置およびその製造方法
US5745984A (en) 1995-07-10 1998-05-05 Martin Marietta Corporation Method for making an electronic module
JP3285294B2 (ja) 1995-08-08 2002-05-27 太陽誘電株式会社 回路モジュールの製造方法
EP0774888B1 (de) 1995-11-16 2003-03-19 Matsushita Electric Industrial Co., Ltd Gedruckte Leiterplatte und ihre Anordnung
US5866952A (en) 1995-11-30 1999-02-02 Lockheed Martin Corporation High density interconnected circuit module with a compliant layer as part of a stress-reducing molded substrate
US5707893A (en) * 1995-12-01 1998-01-13 International Business Machines Corporation Method of making a circuitized substrate using two different metallization processes
US5862583A (en) * 1995-12-28 1999-01-26 Lucent Technologies Inc. Panel positioning method and apparatus
US5838361A (en) * 1996-01-11 1998-11-17 Micron Technology, Inc. Laser marking techniques
US5700716A (en) 1996-02-23 1997-12-23 Micron Technology, Inc. Method for forming low contact resistance contacts, vias, and plugs with diffusion barriers
JPH09266268A (ja) 1996-03-28 1997-10-07 Mitsubishi Electric Corp 半導体装置の製造方法および半導体装置のパッケージ
JPH09278494A (ja) 1996-04-15 1997-10-28 Corning Japan Kk ガラス基板へのマーキング方法
US5841193A (en) * 1996-05-20 1998-11-24 Epic Technologies, Inc. Single chip modules, repairable multichip modules, and methods of fabrication thereof
JP2842378B2 (ja) 1996-05-31 1999-01-06 日本電気株式会社 電子回路基板の高密度実装構造
US5710063A (en) * 1996-06-06 1998-01-20 Sun Microsystems, Inc. Method for improving the alignment of holes with other elements on a printed circuit board
TW331698B (en) * 1996-06-18 1998-05-11 Hitachi Chemical Co Ltd Multi-layered printed circuit board
US6064111A (en) * 1996-07-31 2000-05-16 Hitachi Company, Ltd. Substrate for holding a chip of semi-conductor package, semi-conductor package, and fabrication process of semi-conductor package
DE69722106T2 (de) 1996-08-29 2004-04-01 Mitsubishi Denki K.K. Epoxidharzzusammensetzung und damit eingekapselte Halbleiteranordnungen
JPH1098081A (ja) 1996-09-24 1998-04-14 Hitachi Cable Ltd 半導体チップ実装用のテープキャリア及びその製造方法
EP1852209B1 (de) * 1996-11-20 2013-08-14 Ibiden Co., Ltd. Laserbearbeitungsvorrichtung zur Herstellung einer bestückten Leiterplatte
JP3573894B2 (ja) * 1997-01-06 2004-10-06 ローム株式会社 半導体装置及びその製造方法
US5920123A (en) 1997-01-24 1999-07-06 Micron Technology, Inc. Multichip module assembly having via contacts and method of making the same
US6399230B1 (en) * 1997-03-06 2002-06-04 Sarnoff Corporation Multilayer ceramic circuit boards with embedded resistors
JPH10256429A (ja) 1997-03-07 1998-09-25 Toshiba Corp 半導体パッケージ
JPH10256737A (ja) 1997-03-10 1998-09-25 Ibiden Co Ltd プリント配線基板の製造方法およびプリント配線基板
US5969424A (en) * 1997-03-19 1999-10-19 Fujitsu Limited Semiconductor device with pad structure
JP3754171B2 (ja) 1997-04-08 2006-03-08 富士通株式会社 回路基板及びその製造方法
KR100448561B1 (ko) 1997-04-15 2004-09-13 이비덴 가부시키가이샤 무전해 도금용 접착제, 무전해 도금용 접착제 조제용의 원료조성물 및 프린트 배선판
JP3081168B2 (ja) 1997-04-30 2000-08-28 イビデン株式会社 電子部品搭載用基板
US5887343A (en) * 1997-05-16 1999-03-30 Harris Corporation Direct chip attachment method
JPH10321634A (ja) 1997-05-22 1998-12-04 Citizen Watch Co Ltd 突起電極の製造方法
KR19990002341A (ko) 1997-06-19 1999-01-15 윤종용 이형칩부품 혼재실장용 인쇄회로기판 및 그 제조방법
JPH1114574A (ja) * 1997-06-20 1999-01-22 Toshiba Corp はんだ付け検査方法及びはんだ付け検査装置
JP3324973B2 (ja) 1997-07-28 2002-09-17 イビデン株式会社 レジストパターン形成のための位置決めマーク及び多層プリント配線板の製造方法
JP3588230B2 (ja) 1997-07-31 2004-11-10 京セラ株式会社 配線基板の製造方法
AT2341U1 (de) 1997-08-22 1998-08-25 Green One Tec Kanduth Produkti Profilrahmen für ein gehäuse eines sonnenkollektors
US6005197A (en) 1997-08-25 1999-12-21 Lucent Technologies Inc. Embedded thin film passive components
US6271046B1 (en) * 1997-10-06 2001-08-07 Enterix, Inc. Apparatus and method for analyte detection
JPH11111738A (ja) 1997-10-07 1999-04-23 Oki Electric Ind Co Ltd Ｃｏｂ及びｃｏｂの製造方法，半導体素子及び半導体素子の製造方法
FI103197B1 (fi) * 1997-10-08 1999-05-14 Sunds Defibrator Panelhandling Laitteisto levyjen pinoamiseksi
JP3378185B2 (ja) 1997-11-28 2003-02-17 イビデン株式会社 パッケージ基板
US6441487B2 (en) * 1997-10-20 2002-08-27 Flip Chip Technologies, L.L.C. Chip scale package using large ductile solder balls
JPH11126978A (ja) 1997-10-24 1999-05-11 Kyocera Corp 多層配線基板
US6025995A (en) 1997-11-05 2000-02-15 Ericsson Inc. Integrated circuit module and method
JPH11145174A (ja) 1997-11-10 1999-05-28 Sony Corp 半導体装置およびその製造方法
JP3375555B2 (ja) 1997-11-25 2003-02-10 松下電器産業株式会社 回路部品内蔵モジュールおよびその製造方法
JPH11163047A (ja) * 1997-11-27 1999-06-18 Toshiba Corp 半導体装置の製造方法及びその装置
JPH11176977A (ja) 1997-12-08 1999-07-02 Mitsubishi Gas Chem Co Inc 金属芯入りキャビティ型プリント配線板
CN101094565A (zh) * 1997-12-11 2007-12-26 伊比登株式会社 多层印刷电路板的制造方法
US6087203A (en) 1997-12-19 2000-07-11 Texas Instruments Incorporated Method for adhering and sealing a silicon chip in an integrated circuit package
JP3969875B2 (ja) 1997-12-29 2007-09-05 イビデン株式会社 多層プリント配線板
US6162652A (en) * 1997-12-31 2000-12-19 Intel Corporation Process for sort testing C4 bumped wafers
JP2958520B2 (ja) 1998-01-07 1999-10-06 カシオ計算機株式会社 半導体装置の接合方法
JPH11233678A (ja) * 1998-02-16 1999-08-27 Sumitomo Metal Electronics Devices Inc Ｉｃパッケージの製造方法
JPH11274734A (ja) 1998-03-20 1999-10-08 Sony Corp 電子回路装置およびその製造方法
US5937320A (en) 1998-04-08 1999-08-10 International Business Machines Corporation Barrier layers for electroplated SnPb eutectic solder joints
SE513875C2 (sv) * 1998-06-15 2000-11-20 Ericsson Telefon Ab L M Elektrisk komponent samt ett flerlagrigt kretskort
US5943597A (en) 1998-06-15 1999-08-24 Motorola, Inc. Bumped semiconductor device having a trench for stress relief
JP2000021916A (ja) 1998-07-02 2000-01-21 Citizen Watch Co Ltd 半導体装置とその製造方法
US6153829A (en) 1998-09-15 2000-11-28 Intel Corporation Split cavity wall plating for an integrated circuit package
JP2000151079A (ja) 1998-11-09 2000-05-30 Dainippon Printing Co Ltd 微細配線及びビアホールの形成方法
JP2000150705A (ja) 1998-11-10 2000-05-30 Hitachi Ltd 半導体装置およびその製造方法
JP2000150518A (ja) 1998-11-17 2000-05-30 Shinko Electric Ind Co Ltd 半導体装置の製造方法
US6294494B1 (en) * 1998-12-18 2001-09-25 Phillips Petroleum Company Olefin polymerization processes and products thereof
US6756295B2 (en) * 1998-12-21 2004-06-29 Megic Corporation Chip structure and process for forming the same
US7405149B1 (en) * 1998-12-21 2008-07-29 Megica Corporation Post passivation method for semiconductor chip or wafer
US6327158B1 (en) 1999-01-15 2001-12-04 National Semiconductor Corporation Metal pads for electrical probe testing on wafer with bump interconnects
US6433360B1 (en) 1999-01-15 2002-08-13 Xilinx, Inc. Structure and method of testing failed or returned die to determine failure location and type
KR100687548B1 (ko) 1999-01-27 2007-02-27 신꼬오덴기 고교 가부시키가이샤 반도체 웨이퍼 제조 방법, 반도체 장치 제조 방법 및 칩 사이즈의 반도체 웨이퍼 패키지 제조 방법
JP2000228423A (ja) 1999-02-05 2000-08-15 Sanyo Electric Co Ltd 半導体装置及びその製造方法
US6232212B1 (en) 1999-02-23 2001-05-15 Lucent Technologies Flip chip bump bonding
JP2000243754A (ja) 1999-02-24 2000-09-08 Sanyo Electric Co Ltd 半導体装置
JP3522571B2 (ja) 1999-03-05 2004-04-26 日本特殊陶業株式会社 配線基板
US6205032B1 (en) * 1999-03-16 2001-03-20 Cts Corporation Low temperature co-fired ceramic with improved registration
US6627997B1 (en) 1999-03-26 2003-09-30 Hitachi, Ltd. Semiconductor module and method of mounting
US6110806A (en) * 1999-03-26 2000-08-29 International Business Machines Corporation Process for precision alignment of chips for mounting on a substrate
WO2000063970A1 (fr) 1999-04-16 2000-10-26 Matsushita Electric Industrial Co., Ltd. Composant modulaire et son procede de production
JP2000323645A (ja) 1999-05-11 2000-11-24 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
US6337228B1 (en) 1999-05-12 2002-01-08 Amkor Technology, Inc. Low-cost printed circuit board with integral heat sink for semiconductor package
JP3756041B2 (ja) 1999-05-27 2006-03-15 Ｈｏｙａ株式会社 多層プリント配線板の製造方法
US6330259B1 (en) 1999-06-24 2001-12-11 Jonathan S. Dahm Monolithic radial diode-pumped laser with integral micro channel cooling
US6235453B1 (en) 1999-07-07 2001-05-22 Advanced Micro Devices, Inc. Low-k photoresist removal process
JP4943607B2 (ja) 1999-08-23 2012-05-30 ゴア エンタープライズ ホールディングス，インコーポレイティド 閉鎖容器内の汚染物質を除去する改良多機能フィルター
US20020000239A1 (en) 1999-09-27 2002-01-03 Krishna G. Sachdev Removal of cured silicone adhesive for reworking electronic components
US6271469B1 (en) 1999-11-12 2001-08-07 Intel Corporation Direct build-up layer on an encapsulated die package
US6154366A (en) * 1999-11-23 2000-11-28 Intel Corporation Structures and processes for fabricating moisture resistant chip-on-flex packages
US6370013B1 (en) 1999-11-30 2002-04-09 Kyocera Corporation Electric element incorporating wiring board
KR20080031522A (ko) * 2000-02-25 2008-04-08 이비덴 가부시키가이샤 다층프린트배선판 및 다층프린트배선판의 제조방법
US6586836B1 (en) 2000-03-01 2003-07-01 Intel Corporation Process for forming microelectronic packages and intermediate structures formed therewith
US6281046B1 (en) 2000-04-25 2001-08-28 Atmel Corporation Method of forming an integrated circuit package at a wafer level
US6606792B1 (en) * 2000-05-25 2003-08-19 Oak-Mitsui, Inc. Process to manufacturing tight tolerance embedded elements for printed circuit boards
US6292366B1 (en) 2000-06-26 2001-09-18 Intel Corporation Printed circuit board with embedded integrated circuit
US6657707B1 (en) 2000-06-28 2003-12-02 Advanced Micro Devices, Inc. Metallurgical inspection and/or analysis of flip-chip pads and interfaces
CN100539106C (zh) 2000-09-25 2009-09-09 揖斐电株式会社 半导体元件及其制造方法、多层印刷布线板及其制造方法
JP2002260902A (ja) 2001-03-05 2002-09-13 Matsushita Electric Ind Co Ltd チップ形ｐｔｃサーミスタ
US6586276B2 (en) 2001-07-11 2003-07-01 Intel Corporation Method for fabricating a microelectronic device using wafer-level adhesion layer deposition
US6667230B2 (en) 2001-07-12 2003-12-23 Taiwan Semiconductor Manufacturing Co., Ltd. Passivation and planarization process for flip chip packages
KR100389314B1 (ko) * 2001-07-18 2003-06-25 엘지전자 주식회사 도금인입선 없는 인쇄회로기판의 제조방법
US6974659B2 (en) 2002-01-16 2005-12-13 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming a solder ball using a thermally stable resinous protective layer
US6782897B2 (en) 2002-05-23 2004-08-31 Taiwan Semiconductor Manufacturing Co., Ltd. Method of protecting a passivation layer during solder bump formation
US7008867B2 (en) 2003-02-21 2006-03-07 Aptos Corporation Method for forming copper bump antioxidation surface
JP2004281491A (ja) 2003-03-13 2004-10-07 Toshiba Corp 半導体装置及びその製造方法
CN1291069C (zh) * 2003-05-31 2006-12-20 香港科技大学 微细间距倒装焊凸点电镀制备方法
JPWO2006126557A1 (ja) 2005-05-23 2008-12-25 株式会社クレディアジャパン 光増感作用を有する化合物、光電極、及び光増感型太陽電池

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US20040168825A1 (en) 2004-09-02
US20120000068A1 (en) 2012-01-05
EP1814154A1 (de) 2007-08-01
US8453323B2 (en) 2013-06-04
US20080201944A1 (en) 2008-08-28
EP1990832A2 (de) 2008-11-12
US20100018049A1 (en) 2010-01-28
EP1259103A1 (de) 2002-11-20
US8438727B2 (en) 2013-05-14
US20080151520A1 (en) 2008-06-26
CN1406455A (zh) 2003-03-26
EP1990831A3 (de) 2010-09-29
EP1990831A2 (de) 2008-11-12
EP1990833A3 (de) 2010-09-29
US7888606B2 (en) 2011-02-15
CN100336426C (zh) 2007-09-05
US8079142B2 (en) 2011-12-20
EP1259103A4 (de) 2004-07-28
EP1818975A3 (de) 2010-09-29
US7842887B2 (en) 2010-11-30
EP1990833A2 (de) 2008-11-12
US20070227765A1 (en) 2007-10-04
US7435910B2 (en) 2008-10-14
EP1818975A2 (de) 2007-08-15
US20100031503A1 (en) 2010-02-11
DE60128656T2 (de) 2007-10-04
MY128015A (en) 2007-01-31
WO2001063991A1 (fr) 2001-08-30
US20080151517A1 (en) 2008-06-26
EP1259103B1 (de) 2007-05-30
US7888605B2 (en) 2011-02-15
TW582192B (en) 2004-04-01
US8186045B2 (en) 2012-05-29
US20080151519A1 (en) 2008-06-26
KR20080031522A (ko) 2008-04-08
US20030015342A1 (en) 2003-01-23
US20090070996A1 (en) 2009-03-19
KR20030007438A (ko) 2003-01-23
US6909054B2 (en) 2005-06-21
US7884286B2 (en) 2011-02-08
US8046914B2 (en) 2011-11-01
EP1990832A3 (de) 2010-09-29

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