DE60142091D1 - Digitalgesteuerte Impedanz für Eingangs-/Ausgangsschaltung einer integrierten Vorrichtung - Google Patents

Digitalgesteuerte Impedanz für Eingangs-/Ausgangsschaltung einer integrierten Vorrichtung

Info

Publication number
DE60142091D1
DE60142091D1 DE60142091T DE60142091T DE60142091D1 DE 60142091 D1 DE60142091 D1 DE 60142091D1 DE 60142091 T DE60142091 T DE 60142091T DE 60142091 T DE60142091 T DE 60142091T DE 60142091 D1 DE60142091 D1 DE 60142091D1
Authority
DE
Germany
Prior art keywords
input
integrated device
output circuitry
digitally controlled
controlled impedance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60142091T
Other languages
English (en)
Inventor
David P Schultz
Jason R Bergendahl
Suresh M Menon
Jian Tan
Eunice U D Hao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xilinx Inc
Original Assignee
Xilinx Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xilinx Inc filed Critical Xilinx Inc
Application granted granted Critical
Publication of DE60142091D1 publication Critical patent/DE60142091D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0005—Modifications of input or output impedance
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0278—Arrangements for impedance matching
DE60142091T 2000-10-06 2001-02-16 Digitalgesteuerte Impedanz für Eingangs-/Ausgangsschaltung einer integrierten Vorrichtung Expired - Lifetime DE60142091D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/684,539 US6445245B1 (en) 2000-10-06 2000-10-06 Digitally controlled impedance for I/O of an integrated circuit device

Publications (1)

Publication Number Publication Date
DE60142091D1 true DE60142091D1 (de) 2010-06-17

Family

ID=24748466

Family Applications (2)

Application Number Title Priority Date Filing Date
DE60133400T Expired - Lifetime DE60133400T2 (de) 2000-10-06 2001-02-16 Digitalgesteuerte impedanz für eingangs/ausgangsschaltung einer integrierten schaltungsvorrichtung
DE60142091T Expired - Lifetime DE60142091D1 (de) 2000-10-06 2001-02-16 Digitalgesteuerte Impedanz für Eingangs-/Ausgangsschaltung einer integrierten Vorrichtung

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE60133400T Expired - Lifetime DE60133400T2 (de) 2000-10-06 2001-02-16 Digitalgesteuerte impedanz für eingangs/ausgangsschaltung einer integrierten schaltungsvorrichtung

Country Status (6)

Country Link
US (2) US6445245B1 (de)
EP (2) EP1515442B1 (de)
JP (1) JP4963774B2 (de)
CA (1) CA2425056C (de)
DE (2) DE60133400T2 (de)
WO (1) WO2002031979A1 (de)

Families Citing this family (72)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6773908B1 (en) * 1992-10-30 2004-08-10 Iowa State University Research Foundation, Inc. Proteins encoded by polynucleic acids of porcine reproductive and respiratory syndrome virus (PRRSV)
JP4657497B2 (ja) * 2001-06-07 2011-03-23 ルネサスエレクトロニクス株式会社 可変インピーダンス回路
FR2825802B1 (fr) * 2001-06-12 2004-01-23 St Microelectronics Sa Dispositif de comparaison de deux resistances et systeme de compensation des resistances integrees l'incorporant
US6798237B1 (en) 2001-08-29 2004-09-28 Altera Corporation On-chip impedance matching circuit
US6657906B2 (en) * 2001-11-28 2003-12-02 Micron Technology, Inc. Active termination circuit and method for controlling the impedance of external integrated circuit terminals
US6812732B1 (en) 2001-12-04 2004-11-02 Altera Corporation Programmable parallel on-chip parallel termination impedance and impedance matching
US6836144B1 (en) 2001-12-10 2004-12-28 Altera Corporation Programmable series on-chip termination impedance and impedance matching
US7109744B1 (en) 2001-12-11 2006-09-19 Altera Corporation Programmable termination with DC voltage level control
US6812734B1 (en) 2001-12-11 2004-11-02 Altera Corporation Programmable termination with DC voltage level control
US7093041B2 (en) * 2001-12-20 2006-08-15 Lsi Logic Corporation Dual purpose PCI-X DDR configurable terminator/driver
TW589794B (en) * 2002-05-08 2004-06-01 Nec Electronics Corp Method and circuit for producing control signal for impedance matching
US20030214342A1 (en) * 2002-05-14 2003-11-20 Darrin Benzer IO clamping circuit method utilizing output driver transistors
JP4212309B2 (ja) * 2002-07-01 2009-01-21 株式会社ルネサステクノロジ 半導体集積回路
US6836142B2 (en) * 2002-07-12 2004-12-28 Xilinx, Inc. Asymmetric bidirectional bus implemented using an I/O device with a digitally controlled impedance
US6963218B1 (en) * 2002-08-09 2005-11-08 Xilinx, Inc. Bi-directional interface and communication link
US6967500B1 (en) * 2002-11-27 2005-11-22 Lattice Semiconductor Corporation Electronic circuit with on-chip programmable terminations
US6933746B1 (en) 2003-05-21 2005-08-23 Planet Ate, Inc. Method and apparatus for coupling an input node to an output node
US6922077B2 (en) * 2003-06-27 2005-07-26 Intel Corporation Hybrid compensated buffer design
US6888369B1 (en) 2003-07-17 2005-05-03 Altera Corporation Programmable on-chip differential termination impedance
US6909305B1 (en) 2003-08-08 2005-06-21 Ami Semiconductor, Inc. Digitally controlled impedance driver matching for wide voltage swings at input/output node and having programmable step size
US6888370B1 (en) 2003-08-20 2005-05-03 Altera Corporation Dynamically adjustable termination impedance control techniques
US6859064B1 (en) 2003-08-20 2005-02-22 Altera Corporation Techniques for reducing leakage current in on-chip impedance termination circuits
JP4450605B2 (ja) * 2003-11-14 2010-04-14 株式会社ルネサステクノロジ 半導体装置
US7095245B2 (en) * 2003-11-14 2006-08-22 Intel Corporation Internal voltage reference for memory interface
US7019553B2 (en) * 2003-12-01 2006-03-28 Micron Technology, Inc. Method and circuit for off chip driver control, and memory device using same
EP1700377A1 (de) * 2003-12-23 2006-09-13 Koninklijke Philips Electronics N.V. Lastbewusste schaltungs-anordnung
US7321613B2 (en) * 2003-12-31 2008-01-22 Intel Corporation Automatic impedance matching compensation for a serial point to point link
US7355453B2 (en) * 2004-08-11 2008-04-08 Altera Corporation Techniques for trimming drive current in output drivers
US7138868B2 (en) * 2004-08-11 2006-11-21 Texas Instruments Incorporated Method and circuit for trimming a current source in a package
DE102004044422B3 (de) * 2004-09-14 2006-03-30 Infineon Technologies Ag Kalibrierungsschaltung für eine Treibersteuerschaltung und Treibersteuerschaltung
US7218155B1 (en) 2005-01-20 2007-05-15 Altera Corporation Techniques for controlling on-chip termination resistance using voltage range detection
US7221193B1 (en) 2005-01-20 2007-05-22 Altera Corporation On-chip termination with calibrated driver strength
US7489173B1 (en) 2005-02-18 2009-02-10 Xilinx, Inc. Signal adjustment for duty cycle control
US7215579B2 (en) 2005-02-18 2007-05-08 Micron Technology, Inc. System and method for mode register control of data bus operating mode and impedance
US8618866B2 (en) * 2005-04-29 2013-12-31 Ati Technologies Ulc Apparatus and methods for balancing supply voltages
US7389194B2 (en) * 2005-07-06 2008-06-17 Rambus Inc. Driver calibration methods and circuits
US7679397B1 (en) 2005-08-05 2010-03-16 Altera Corporation Techniques for precision biasing output driver for a calibrated on-chip termination circuit
US8222917B2 (en) * 2005-11-03 2012-07-17 Agate Logic, Inc. Impedance matching and trimming apparatuses and methods using programmable resistance devices
US7391229B1 (en) 2006-02-18 2008-06-24 Altera Corporation Techniques for serially transmitting on-chip termination control signals
KR100738961B1 (ko) * 2006-02-22 2007-07-12 주식회사 하이닉스반도체 반도체 메모리의 출력 드라이빙 장치
US7420386B2 (en) 2006-04-06 2008-09-02 Altera Corporation Techniques for providing flexible on-chip termination control on integrated circuits
US20080018357A1 (en) * 2006-07-18 2008-01-24 Honeywell International Inc. Automatic termination circuit
US7417452B1 (en) * 2006-08-05 2008-08-26 Altera Corporation Techniques for providing adjustable on-chip termination impedance
KR100782328B1 (ko) * 2006-08-11 2007-12-06 삼성전자주식회사 페일 세이프 ｉｏ 회로를 구비하는 반도체 집적회로 장치및 이를 포함하는 전자 기기
US7423450B2 (en) * 2006-08-22 2008-09-09 Altera Corporation Techniques for providing calibrated on-chip termination impedance
JP4199789B2 (ja) * 2006-08-29 2008-12-17 エルピーダメモリ株式会社 半導体装置の出力回路調整方法
KR100780646B1 (ko) * 2006-10-31 2007-11-30 주식회사 하이닉스반도체 온 다이 터미네이션 장치 및 이를 포함하는 반도체장치.
US7372295B1 (en) 2006-12-22 2008-05-13 Altera Corporation Techniques for calibrating on-chip termination impedances
US7443193B1 (en) 2006-12-30 2008-10-28 Altera Corporation Techniques for providing calibrated parallel on-chip termination impedance
TW200910373A (en) * 2007-06-08 2009-03-01 Mosaid Technologies Inc Dynamic impedance control for input/output buffers
US20090009212A1 (en) * 2007-07-02 2009-01-08 Martin Brox Calibration system and method
JP5059580B2 (ja) * 2007-12-20 2012-10-24 ルネサスエレクトロニクス株式会社 終端回路
US8065570B1 (en) * 2008-01-28 2011-11-22 Xilinx, Inc. Testing an integrated circuit having configurable input/output terminals
US7999530B2 (en) * 2008-03-21 2011-08-16 Intersil Americas Inc. Device under test power supply
US20100164471A1 (en) * 2008-12-30 2010-07-01 M2000 Calibration of programmable i/o components using a virtual variable external resistor
US8072242B2 (en) * 2009-12-18 2011-12-06 Meta Systems Merged programmable output driver
US7973553B1 (en) 2010-03-11 2011-07-05 Altera Corporation Techniques for on-chip termination
FR2960720A1 (fr) * 2010-05-25 2011-12-02 St Microelectronics Sa Procede de protection d'un circuit logique contre des radiations externes et dispositif electronique associe.
US8222918B1 (en) 2010-09-21 2012-07-17 Xilinx, Inc. Output driver and method of operating the same
US8018250B1 (en) 2010-10-19 2011-09-13 Xilinx, Inc. Input/output block and operation thereof
US8570064B1 (en) * 2011-11-11 2013-10-29 Altera Corporation Methods and systems for programmable implementation of on-chip termination calibration
US8786990B2 (en) * 2012-04-04 2014-07-22 Globalfoundries Singapore Pte. Ltd. Driver-based distributed multi-path ESD scheme
FR2991501A1 (fr) * 2012-05-30 2013-12-06 Stmicroelectronic Sa Circuit integre comportant au moins un port digital de sortie d'impedance reglable, et procede de reglage correspondant
US9000800B1 (en) 2012-09-17 2015-04-07 Xilinx, Inc. System and method of eliminating on-board calibration resistor for on-die termination
US8766701B1 (en) * 2013-03-08 2014-07-01 Xilinx, Inc. Analog multiplexing with independent power supplies
KR20140129917A (ko) * 2013-04-30 2014-11-07 인텔렉추얼디스커버리 주식회사 무선 전력 전송 장치 및 무선 전력 전송 방법
US9444455B2 (en) * 2013-12-10 2016-09-13 Sandisk Technologies Llc Load impedance adjustment for an interface of a data storage device
US9369128B1 (en) 2014-08-15 2016-06-14 Altera Corporation Circuits and methods for impedance calibration
US9935597B2 (en) 2016-05-27 2018-04-03 Xilinx, Inc. Circuit for and method of receiving an input signal
US9647663B1 (en) 2016-06-27 2017-05-09 Altera Corporation Differential input buffer circuits and methods
US9712257B1 (en) 2016-08-12 2017-07-18 Xilinx, Inc. Digitally-controlled impedance control for dynamically generating drive strength for a transmitter
US10063232B1 (en) 2017-09-13 2018-08-28 Xilinx, Inc. Digitally controlled impedance calibration for a driver using an on-die reference resistor

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5287536A (en) * 1990-04-23 1994-02-15 Texas Instruments Incorporated Nonvolatile memory array wordline driver circuit with voltage translator circuit
US5134311A (en) 1990-06-07 1992-07-28 International Business Machines Corporation Self-adjusting impedance matching driver
US5463326A (en) 1993-04-13 1995-10-31 Hewlett-Packard Company Output drivers in high frequency circuits
AU6820094A (en) * 1993-05-13 1994-12-12 Microunity Systems Engineering, Inc. Bias voltage distribution system
JPH07142985A (ja) * 1993-11-16 1995-06-02 Mitsubishi Electric Corp 出力回路
JPH0832435A (ja) * 1994-07-18 1996-02-02 Hitachi Ltd 半導体装置
US5559441A (en) 1995-04-19 1996-09-24 Hewlett-Packard Company Transmission line driver with self adjusting output impedance
JP3588953B2 (ja) * 1997-02-03 2004-11-17 富士通株式会社 半導体集積回路装置
JPH10290147A (ja) * 1997-04-14 1998-10-27 Mitsubishi Electric Corp 遅延量可変回路
US6087847A (en) 1997-07-29 2000-07-11 Intel Corporation Impedance control circuit
JPH11195766A (ja) * 1997-10-31 1999-07-21 Mitsubishi Electric Corp 半導体集積回路装置
KR100266747B1 (ko) * 1997-12-31 2000-09-15 윤종용 임피던스 조정 회로를 구비한 반도체 장치
US6054881A (en) * 1998-01-09 2000-04-25 Advanced Micro Devices, Inc. Input/output (I/O) buffer selectively providing resistive termination for a transmission line coupled thereto
JP3944298B2 (ja) 1998-02-16 2007-07-11 株式会社ルネサステクノロジ 半導体集積回路
US6064224A (en) * 1998-07-31 2000-05-16 Hewlett--Packard Company Calibration sharing for CMOS output driver
US6232814B1 (en) * 1998-11-10 2001-05-15 Intel Corporation Method and apparatus for controlling impedance on an input-output node of an integrated circuit
JP3849835B2 (ja) * 1999-06-23 2006-11-22 株式会社ルネサステクノロジ 半導体集積回路装置

Also Published As

Publication number Publication date
CA2425056A1 (en) 2002-04-18
DE60133400D1 (de) 2008-05-08
US6489837B2 (en) 2002-12-03
US20020101278A1 (en) 2002-08-01
CA2425056C (en) 2007-03-27
US6445245B1 (en) 2002-09-03
JP4963774B2 (ja) 2012-06-27
EP1330875A1 (de) 2003-07-30
EP1515442A1 (de) 2005-03-16
EP1515442B1 (de) 2010-05-05
DE60133400T2 (de) 2009-04-23
WO2002031979A1 (en) 2002-04-18
EP1330875B1 (de) 2008-03-26
JP2004511945A (ja) 2004-04-15

Similar Documents

Publication Publication Date Title
DE60142091D1 (de) Digitalgesteuerte Impedanz für Eingangs-/Ausgangsschaltung einer integrierten Vorrichtung
NO2020040I1 (no) eltrombopag olamine - Forlenget SPC
DE60142157D1 (de) Vorrichtung einer ultraschallbildgebung
DE60036157D1 (de) Herstellungsverfahren einer elektrooptischen Vorrichtung
DE60034401D1 (de) Herstellungsverfahren einer elektrooptischen Vorrichtung
DE69927148D1 (de) Hörbare tonkommunikation aus einer implantierbaren medizinischen vorrichtung
DE60118668D1 (de) Kommunikationsverfahren einer elektronischen Vorrichtung
DE60034550D1 (de) Vorrichtung zur datenausgabesteuerung
DE59611143D1 (de) Schaltungsanordnung zur speisung einer impulsendstufe
DE60024554D1 (de) System und Vorrichtung zur Übermittlung mit einer integrierten Schaltung
DE60217754D1 (de) Piezoelektrische Vorrichtung
DE60129431D1 (de) Medizinische vorrichtung
DE60025114D1 (de) System und Vorrichtung zur Übermittlung mit einer integrierten Schaltung
DE60136262D1 (de) Lautsprecher und magnetischer schaltkreis zur verwendung für den lautsprecher
DE10195954T1 (de) Elektronikvorrichtung und Verfahren zur Herstellung einer Elektronikvorrichtung
DE60220915D1 (de) Interlabiale vorlage
DE60140851D1 (de) Vorrichtung zur Umwandlung elektromagnetischer Wellen
DE60108573D1 (de) Vorrichtung zur Planheitsmessung an Bändern
DE50013604D1 (de) Schaltungsanordnung zur Kapazitätsmessung von Strukturen in einer integrierten Schaltung
DE60116652D1 (de) Eintauchausguss und verwendung dieser vorrichtung
DE60035447D1 (de) Herstellungsverfahren einer Elektronenemittierenden Vorrichtung
DE60032064D1 (de) Signaleingangs und -ausgangskontrollvorrichtung und Verfahren
DE60116019D1 (de) Vorrichtung zur Laserchirurgie
DE29815815U1 (de) Vorrichtung zur Vaginalspülung
DE50000925D1 (de) Vorrichtung und verfahren für den eingebauten selbsttest einer elektronischen schaltung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition