DE60143828D1 - Transientspeichersegmentsubsystem für ein paralleles Datenbanksystem - Google Patents

Transientspeichersegmentsubsystem für ein paralleles Datenbanksystem

Info

Publication number
DE60143828D1
DE60143828D1 DE60143828T DE60143828T DE60143828D1 DE 60143828 D1 DE60143828 D1 DE 60143828D1 DE 60143828 T DE60143828 T DE 60143828T DE 60143828 T DE60143828 T DE 60143828T DE 60143828 D1 DE60143828 D1 DE 60143828D1
Authority
DE
Germany
Prior art keywords
database system
transient storage
storage segment
parallel database
segment subsystem
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60143828T
Other languages
English (en)
Inventor
Sorana Rabinovic
Daniel H Miller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teradata US Inc
Original Assignee
Teradata US Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teradata US Inc filed Critical Teradata US Inc
Application granted granted Critical
Publication of DE60143828D1 publication Critical patent/DE60143828D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1002—Methods of surface bonding and/or assembly therefor with permanent bending or reshaping or surface deformation of self sustaining lamina
    • Y10T156/1007—Running or continuous length work
    • Y10T156/1008—Longitudinal bending
    • Y10T156/1013—Longitudinal bending and edge-joining of one piece blank to form tube
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1002—Methods of surface bonding and/or assembly therefor with permanent bending or reshaping or surface deformation of self sustaining lamina
    • Y10T156/1007—Running or continuous length work
    • Y10T156/1016—Transverse corrugating
    • Y10T156/1021—Treating material of corrugated lamina or dry adhesive thereon to render tacky
DE60143828T 2000-06-26 2001-06-06 Transientspeichersegmentsubsystem für ein paralleles Datenbanksystem Expired - Lifetime DE60143828D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/603,787 US6505285B1 (en) 2000-06-26 2000-06-26 Scratch segment subsystem for a parallel processing database system

Publications (1)

Publication Number Publication Date
DE60143828D1 true DE60143828D1 (de) 2011-02-24

Family

ID=24416905

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60143828T Expired - Lifetime DE60143828D1 (de) 2000-06-26 2001-06-06 Transientspeichersegmentsubsystem für ein paralleles Datenbanksystem

Country Status (3)

Country Link
US (1) US6505285B1 (de)
EP (1) EP1168182B1 (de)
DE (1) DE60143828D1 (de)

Families Citing this family (24)

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US6842893B1 (en) * 2000-11-13 2005-01-11 International Business Machines Corporation Method for global breakout identification
US7010521B2 (en) * 2002-05-13 2006-03-07 Netezza Corporation Optimized database appliance
WO2004027648A1 (en) 2002-09-18 2004-04-01 Netezza Corporation Intelligent storage device controller
US6836833B1 (en) * 2002-10-22 2004-12-28 Mips Technologies, Inc. Apparatus and method for discovering a scratch pad memory configuration
US7844758B1 (en) * 2003-06-18 2010-11-30 Advanced Micro Devices, Inc. Dynamic resource allocation scheme for efficient use of a queue
US7734901B2 (en) * 2005-10-31 2010-06-08 Mips Technologies, Inc. Processor core and method for managing program counter redirection in an out-of-order processor pipeline
US7711934B2 (en) * 2005-10-31 2010-05-04 Mips Technologies, Inc. Processor core and method for managing branch misprediction in an out-of-order processor pipeline
US7496771B2 (en) * 2005-11-15 2009-02-24 Mips Technologies, Inc. Processor accessing a scratch pad on-demand to reduce power consumption
US7562191B2 (en) * 2005-11-15 2009-07-14 Mips Technologies, Inc. Microprocessor having a power-saving instruction cache way predictor and instruction replacement scheme
US7873820B2 (en) * 2005-11-15 2011-01-18 Mips Technologies, Inc. Processor utilizing a loop buffer to reduce power consumption
US7721071B2 (en) * 2006-02-28 2010-05-18 Mips Technologies, Inc. System and method for propagating operand availability prediction bits with instructions through a pipeline in an out-of-order processor
US20070204139A1 (en) 2006-02-28 2007-08-30 Mips Technologies, Inc. Compact linked-list-based multi-threaded instruction graduation buffer
US7370178B1 (en) * 2006-07-14 2008-05-06 Mips Technologies, Inc. Method for latest producer tracking in an out-of-order processor, and applications thereof
US20080016326A1 (en) * 2006-07-14 2008-01-17 Mips Technologies, Inc. Latest producer tracking in an out-of-order processor, and applications thereof
US7650465B2 (en) 2006-08-18 2010-01-19 Mips Technologies, Inc. Micro tag array having way selection bits for reducing data cache access power
US7657708B2 (en) * 2006-08-18 2010-02-02 Mips Technologies, Inc. Methods for reducing data cache access power in a processor using way selection bits
US8032734B2 (en) * 2006-09-06 2011-10-04 Mips Technologies, Inc. Coprocessor load data queue for interfacing an out-of-order execution unit with an in-order coprocessor
US7647475B2 (en) * 2006-09-06 2010-01-12 Mips Technologies, Inc. System for synchronizing an in-order co-processor with an out-of-order processor using a co-processor interface store data queue
US20080082793A1 (en) * 2006-09-29 2008-04-03 Mips Technologies, Inc. Detection and prevention of write-after-write hazards, and applications thereof
US8078846B2 (en) 2006-09-29 2011-12-13 Mips Technologies, Inc. Conditional move instruction formed into one decoded instruction to be graduated and another decoded instruction to be invalidated
US7594079B2 (en) 2006-09-29 2009-09-22 Mips Technologies, Inc. Data cache virtual hint way prediction, and applications thereof
US9946547B2 (en) * 2006-09-29 2018-04-17 Arm Finance Overseas Limited Load/store unit for a processor, and applications thereof
US20110246511A1 (en) * 2010-04-06 2011-10-06 John Smith Method and system for defining and populating segments
US20180095914A1 (en) 2016-10-03 2018-04-05 Ocient Llc Application direct access to sata drive

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4742447A (en) * 1986-01-16 1988-05-03 International Business Machines Corporation Method to control I/O accesses in a multi-tasking virtual memory virtual machine type data processing system
EP0610583A1 (de) 1993-02-08 1994-08-17 International Business Machines Corporation Rechnerspeichersystem mit Mehrzonen-Umspeicherung
US5519846A (en) 1993-12-23 1996-05-21 Unisys Corporation Multiprocessor system with scheme for managing allocation and reservation of cache segments in a cache system employing round-robin replacement and exclusive access
EP0826181A4 (de) * 1995-04-11 2005-02-09 Kinetech Inc Identifizierung von daten in einem datenverarbeitungssystem
US5778395A (en) 1995-10-23 1998-07-07 Stac, Inc. System for backing up files from disk volumes on multiple nodes of a computer network
US5960181A (en) * 1995-12-22 1999-09-28 Ncr Corporation Computer performance modeling system and method
US6078994A (en) 1997-05-30 2000-06-20 Oracle Corporation System for maintaining a shared cache in a multi-threaded computer environment
US6351749B1 (en) * 1999-09-30 2002-02-26 Ncr Corporation Multi-threading, multi-tasking architecture for a relational database management system

Also Published As

Publication number Publication date
EP1168182B1 (de) 2011-01-12
US6505285B1 (en) 2003-01-07
EP1168182A1 (de) 2002-01-02

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