DE602004016157D1 - Regenerativer taktzwischenverstärker - Google Patents

Regenerativer taktzwischenverstärker

Info

Publication number
DE602004016157D1
DE602004016157D1 DE602004016157T DE602004016157T DE602004016157D1 DE 602004016157 D1 DE602004016157 D1 DE 602004016157D1 DE 602004016157 T DE602004016157 T DE 602004016157T DE 602004016157 T DE602004016157 T DE 602004016157T DE 602004016157 D1 DE602004016157 D1 DE 602004016157D1
Authority
DE
Germany
Prior art keywords
clock amplifier
regenerative clock
regenerative
amplifier
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE602004016157T
Other languages
English (en)
Inventor
Stefano Sivero
Massimiliano Frulio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Corp
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=30131225&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE602004016157(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of DE602004016157D1 publication Critical patent/DE602004016157D1/de
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10Distribution of clock signals, e.g. skew
DE602004016157T 2003-06-17 2004-05-18 Regenerativer taktzwischenverstärker Expired - Fee Related DE602004016157D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT001217A ITMI20031217A1 (it) 2003-06-17 2003-06-17 Ripetitore rigenerativo di temporizzazione
PCT/US2004/015616 WO2005001891A2 (en) 2003-06-17 2004-05-18 Regenerative clock repeater

Publications (1)

Publication Number Publication Date
DE602004016157D1 true DE602004016157D1 (de) 2008-10-09

Family

ID=30131225

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004016157T Expired - Fee Related DE602004016157D1 (de) 2003-06-17 2004-05-18 Regenerativer taktzwischenverstärker

Country Status (7)

Country Link
US (1) US7436232B2 (de)
EP (1) EP1636903B1 (de)
CN (1) CN100423449C (de)
DE (1) DE602004016157D1 (de)
IT (1) ITMI20031217A1 (de)
TW (1) TW200502734A (de)
WO (1) WO2005001891A2 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070106964A1 (en) * 2005-11-10 2007-05-10 Meindl James D Optimized microchip and related methods
KR100941630B1 (ko) * 2008-04-24 2010-02-11 주식회사 하이닉스반도체 내부전압 제어회로 및 방법
JP5301262B2 (ja) 2008-12-19 2013-09-25 ルネサスエレクトロニクス株式会社 半導体装置、及び動作モ−ド切換方法
US9590411B2 (en) 2011-12-15 2017-03-07 Schweitzer Engineering Laboratories, Inc. Systems and methods for time synchronization of IEDs via radio link
US9709680B2 (en) 2012-09-08 2017-07-18 Schweitzer Engineering Laboratories, Inc. Quality of precision time sources
US9520860B2 (en) 2012-10-19 2016-12-13 Schweitzer Engineering Laboratories, Inc. Time distribution switch
US9599719B2 (en) 2012-10-19 2017-03-21 Schweitzer Engineering Laboratories, Inc. Detection of manipulated satellite time signals
MX2015004133A (es) 2012-10-19 2015-07-06 Schweitzer Engineering Lab Inc Dispositivo de distribucion de tiempo con antena de banda multiple.
US9400330B2 (en) 2012-10-19 2016-07-26 Schweitzer Engineering Laboratories, Inc. Manipulation resilient time distribution network
US9759816B2 (en) 2013-01-11 2017-09-12 Schweitzer Engineering Laboratories, Inc. Multi-constellation GNSS integrity check for detection of time signal manipulation
US9709682B2 (en) 2013-05-06 2017-07-18 Schweitzer Engineering Laboratories, Inc. Multi-constellation GNSS integrity check for detection of time signal manipulation
US9083503B2 (en) 2013-05-02 2015-07-14 Schweitzer Engineering Laboratories, Inc. Synchronized clock event report
CN104345264B (zh) * 2013-07-29 2018-08-28 瑞昱半导体股份有限公司 时钟脉冲边沿侦测装置与方法
US9319100B2 (en) 2013-08-12 2016-04-19 Schweitzer Engineering Laboratories, Inc. Delay compensation for variable cable length
US9270442B2 (en) 2014-04-29 2016-02-23 Schweitzer Engineering Laboratories, Inc. Time signal propagation delay correction
US9425652B2 (en) 2014-06-16 2016-08-23 Schweitzer Engineering Laboratories, Inc. Adaptive holdover timing error estimation and correction
US9813173B2 (en) 2014-10-06 2017-11-07 Schweitzer Engineering Laboratories, Inc. Time signal verification and distribution
US10128904B2 (en) * 2015-06-23 2018-11-13 Nvidia Corporation Low-latency bi-directional repeater
CN105515552B (zh) * 2015-12-24 2018-09-11 上海华虹宏力半导体制造有限公司 时钟产生电路和双电源系统
US10375108B2 (en) 2015-12-30 2019-08-06 Schweitzer Engineering Laboratories, Inc. Time signal manipulation and spoofing detection based on a latency of a communication system
CN105703744A (zh) * 2016-01-15 2016-06-22 中山芯达电子科技有限公司 多级时延电路
US10527732B2 (en) 2017-02-09 2020-01-07 Schweitzer Engineering Laboratories, Inc. Verification of time sources
US11385674B2 (en) 2018-02-09 2022-07-12 SK Hynix Inc. Clock distribution circuit and semiconductor device including the clock distribution circuit
KR20190096746A (ko) * 2018-02-09 2019-08-20 에스케이하이닉스 주식회사 클럭 분배 회로 및 이를 포함하는 반도체 장치
US11630424B2 (en) 2018-07-13 2023-04-18 Schweitzer Engineering Laboratories, Inc. Time signal manipulation detection using remotely managed time
US10819727B2 (en) 2018-10-15 2020-10-27 Schweitzer Engineering Laboratories, Inc. Detecting and deterring network attacks
US10912104B2 (en) 2019-02-01 2021-02-02 Schweitzer Engineering Laboratories, Inc. Interleaved, static time division multiple access (TDMA) for minimizing power usage in delay-sensitive applications

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4284843A (en) * 1979-05-10 1981-08-18 General Electric Company Repeating station for use in digital data communications link
DE3030172A1 (de) * 1980-08-08 1982-02-25 Siemens AG, 1000 Berlin und 8000 München Regenerator fuer mehrstufige digitale signale
FR2577088B1 (fr) * 1985-02-07 1987-03-06 Thomson Csf Mat Tel Repeteur pour distribution d'horloge tripliquee
US4988892A (en) * 1989-06-02 1991-01-29 Atari Corporation Method and circuit for generating dependent clock signals
US5272390A (en) * 1991-09-23 1993-12-21 Digital Equipment Corporation Method and apparatus for clock skew reduction through absolute delay regulation
US5576649A (en) * 1992-08-03 1996-11-19 Mosaid Technologies Incorporated Repeater with threshold modulation
US5414312A (en) * 1993-07-15 1995-05-09 Altera Corporation Advanced signal driving buffer with directional input transition detection
US5440182A (en) * 1993-10-22 1995-08-08 The Board Of Trustees Of The Leland Stanford Junior University Dynamic logic interconnect speed-up circuit
US5517137A (en) * 1995-05-19 1996-05-14 Alliance Semiconductor Corporation Synchronous self-timed clock pulse circuit having improved power-up performance
US6094086A (en) * 1997-05-12 2000-07-25 Industrial Technology Research Institute High drive CMOS output buffer with fast and slow speed controls
US6130563A (en) * 1997-09-10 2000-10-10 Integrated Device Technology, Inc. Output driver circuit for high speed digital signal transmission
US6243411B1 (en) * 1997-10-08 2001-06-05 Winbond Electronics Corp. Infinitely expandable Ethernet network repeater unit
US6493854B1 (en) * 1999-10-01 2002-12-10 Motorola, Inc. Method and apparatus for placing repeaters in a network of an integrated circuit
US6433605B1 (en) * 2000-02-03 2002-08-13 Hewlett-Packard Company Low wiring skew clock network with current mode buffer
US6356116B1 (en) * 2000-04-12 2002-03-12 Sun Microsystems, Inc. Apparatus and method for low skew clock buffer circuit
US6362654B1 (en) * 2000-08-17 2002-03-26 U.S. Philips Corporation Bidirectional repeater using high and low threshold detection
JP2003007056A (ja) * 2001-06-18 2003-01-10 Mitsubishi Electric Corp 半導体記憶装置
US6630851B2 (en) * 2001-06-29 2003-10-07 Fujitsu Limited Low latency clock distribution

Also Published As

Publication number Publication date
EP1636903B1 (de) 2008-08-27
WO2005001891A2 (en) 2005-01-06
ITMI20031217A1 (it) 2004-12-18
EP1636903A4 (de) 2007-03-28
CN1809959A (zh) 2006-07-26
WO2005001891A3 (en) 2005-10-06
US20040257131A1 (en) 2004-12-23
TW200502734A (en) 2005-01-16
CN100423449C (zh) 2008-10-01
EP1636903A2 (de) 2006-03-22
US7436232B2 (en) 2008-10-14
ITMI20031217A0 (it) 2003-06-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee