DE602004017029D1 - Mehrprozessorsystem und -verfahren mit mehreren speicher-hub-modulen - Google Patents

Mehrprozessorsystem und -verfahren mit mehreren speicher-hub-modulen

Info

Publication number
DE602004017029D1
DE602004017029D1 DE602004017029T DE602004017029T DE602004017029D1 DE 602004017029 D1 DE602004017029 D1 DE 602004017029D1 DE 602004017029 T DE602004017029 T DE 602004017029T DE 602004017029 T DE602004017029 T DE 602004017029T DE 602004017029 D1 DE602004017029 D1 DE 602004017029D1
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Germany
Prior art keywords
memory
rank
memory modules
modules
processors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004017029T
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English (en)
Inventor
Joseph M Jeddeloh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of DE602004017029D1 publication Critical patent/DE602004017029D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
DE602004017029T 2003-08-28 2004-08-06 Mehrprozessorsystem und -verfahren mit mehreren speicher-hub-modulen Active DE602004017029D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/653,044 US7136958B2 (en) 2003-08-28 2003-08-28 Multiple processor system and method including multiple memory hub modules
PCT/US2004/025522 WO2005024560A2 (en) 2003-08-28 2004-08-06 Multiple processor system and method including multiple memory hub modules

Publications (1)

Publication Number Publication Date
DE602004017029D1 true DE602004017029D1 (de) 2008-11-20

Family

ID=34217813

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004017029T Active DE602004017029D1 (de) 2003-08-28 2004-08-06 Mehrprozessorsystem und -verfahren mit mehreren speicher-hub-modulen

Country Status (9)

Country Link
US (6) US7136958B2 (de)
EP (1) EP1665056B1 (de)
JP (1) JP4825993B2 (de)
KR (1) KR100928852B1 (de)
CN (1) CN100580643C (de)
AT (1) ATE410735T1 (de)
DE (1) DE602004017029D1 (de)
TW (1) TW200521675A (de)
WO (1) WO2005024560A2 (de)

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US9082461B2 (en) 2015-07-14
US20090282182A1 (en) 2009-11-12
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US20110113189A1 (en) 2011-05-12
WO2005024560A3 (en) 2005-12-15
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US20080215792A1 (en) 2008-09-04
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US7873775B2 (en) 2011-01-18
US20070033317A1 (en) 2007-02-08
US7581055B2 (en) 2009-08-25
US8244952B2 (en) 2012-08-14
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US7136958B2 (en) 2006-11-14
US20050050255A1 (en) 2005-03-03
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US20120303885A1 (en) 2012-11-29
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US7386649B2 (en) 2008-06-10
ATE410735T1 (de) 2008-10-15

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