DE602005003258D1 - Kontrolle der Ausführung eines Algorithmuses durch eine integrierte Schaltung - Google Patents
Kontrolle der Ausführung eines Algorithmuses durch eine integrierte SchaltungInfo
- Publication number
- DE602005003258D1 DE602005003258D1 DE602005003258T DE602005003258T DE602005003258D1 DE 602005003258 D1 DE602005003258 D1 DE 602005003258D1 DE 602005003258 T DE602005003258 T DE 602005003258T DE 602005003258 T DE602005003258 T DE 602005003258T DE 602005003258 D1 DE602005003258 D1 DE 602005003258D1
- Authority
- DE
- Germany
- Prior art keywords
- algorithm
- execution
- control
- integrated circuit
- integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0450798 | 2004-04-27 | ||
FR0450798A FR2869430A1 (fr) | 2004-04-27 | 2004-04-27 | Controle de l'execution d'un algorithme par un circuit integre |
Publications (2)
Publication Number | Publication Date |
---|---|
DE602005003258D1 true DE602005003258D1 (de) | 2007-12-27 |
DE602005003258T2 DE602005003258T2 (de) | 2008-09-18 |
Family
ID=34939456
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602005003258T Active DE602005003258T2 (de) | 2004-04-27 | 2005-04-22 | Kontrolle der Ausführung eines Algorithmuses durch eine integrierte Schaltung |
Country Status (4)
Country | Link |
---|---|
US (1) | US7797574B2 (de) |
EP (1) | EP1591866B1 (de) |
DE (1) | DE602005003258T2 (de) |
FR (1) | FR2869430A1 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102004051991A1 (de) * | 2004-10-25 | 2006-04-27 | Robert Bosch Gmbh | Verfahren, Betriebssystem und Rechengerät zum Abarbeiten eines Computerprogramms |
DE102004051967A1 (de) * | 2004-10-25 | 2006-04-27 | Robert Bosch Gmbh | Verfahren, Betriebssystem und Rechengerät zum Abarbeiten eines Computerprogramms |
US8296739B2 (en) * | 2008-03-31 | 2012-10-23 | International Business Machines Corporation | Testing soft error rate of an application program |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4606041A (en) * | 1984-10-19 | 1986-08-12 | Itt Corporation | Frequency hopping data communication system |
US4908502A (en) * | 1988-02-08 | 1990-03-13 | Pitney Bowes Inc. | Fault tolerant smart card |
US5295258A (en) * | 1989-12-22 | 1994-03-15 | Tandem Computers Incorporated | Fault-tolerant computer system with online recovery and reintegration of redundant components |
US6854075B2 (en) * | 2000-04-19 | 2005-02-08 | Hewlett-Packard Development Company, L.P. | Simultaneous and redundantly threaded processor store instruction comparator |
US6823473B2 (en) * | 2000-04-19 | 2004-11-23 | Hewlett-Packard Development Company, L.P. | Simultaneous and redundantly threaded processor uncached load address comparator and data value replication circuit |
DE10042234C2 (de) * | 2000-08-28 | 2002-06-20 | Infineon Technologies Ag | Verfahren und Vorrichtung zum Durchführen einer modularen Exponentiation in einem kryptographischen Prozessor |
JP4630478B2 (ja) * | 2001-03-16 | 2011-02-09 | 株式会社東芝 | 半導体記憶装置 |
DE10136335B4 (de) * | 2001-07-26 | 2007-03-22 | Infineon Technologies Ag | Prozessor mit mehreren Rechenwerken |
US7318169B2 (en) * | 2002-05-15 | 2008-01-08 | David Czajkowski | Fault tolerant computer |
US20040064756A1 (en) * | 2002-09-26 | 2004-04-01 | Sudarshan Kadambi | Method and apparatus for improving reliability in computer processors by re-executing instructions |
US7260742B2 (en) * | 2003-01-28 | 2007-08-21 | Czajkowski David R | SEU and SEFI fault tolerant computer |
US7278080B2 (en) * | 2003-03-20 | 2007-10-02 | Arm Limited | Error detection and recovery within processing stages of an integrated circuit |
WO2004084070A1 (en) * | 2003-03-20 | 2004-09-30 | Arm Limited | Systematic and random error detection and recovery within processing stages of an integrated circuit |
US7529368B2 (en) * | 2003-04-18 | 2009-05-05 | Via Technologies, Inc. | Apparatus and method for performing transparent output feedback mode cryptographic functions |
US7890735B2 (en) * | 2004-08-30 | 2011-02-15 | Texas Instruments Incorporated | Multi-threading processors, integrated circuit devices, systems, and processes of operation and manufacture |
US8005209B2 (en) * | 2005-01-06 | 2011-08-23 | Polytechnic University | Invariance based concurrent error detection for the advanced encryption standard |
US20070088979A1 (en) * | 2005-10-14 | 2007-04-19 | Pomaranski Ken G | Hardware configurable CPU with high availability mode |
US7324913B2 (en) * | 2006-02-01 | 2008-01-29 | International Business Machines Corporation | Methods and apparatus for testing a link between chips |
-
2004
- 2004-04-27 FR FR0450798A patent/FR2869430A1/fr not_active Withdrawn
-
2005
- 2005-04-22 EP EP05103280A patent/EP1591866B1/de not_active Expired - Fee Related
- 2005-04-22 DE DE602005003258T patent/DE602005003258T2/de active Active
- 2005-04-27 US US11/115,635 patent/US7797574B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP1591866B1 (de) | 2007-11-14 |
US20050251703A1 (en) | 2005-11-10 |
US7797574B2 (en) | 2010-09-14 |
EP1591866A1 (de) | 2005-11-02 |
FR2869430A1 (fr) | 2005-10-28 |
DE602005003258T2 (de) | 2008-09-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |