DE602005012625D1 - Verfahren zum Zugreifen auf eine nichtflüchtige Mehrpegelspeichervorrichtung vom Typ FLASH NAND - Google Patents
Verfahren zum Zugreifen auf eine nichtflüchtige Mehrpegelspeichervorrichtung vom Typ FLASH NANDInfo
- Publication number
- DE602005012625D1 DE602005012625D1 DE602005012625T DE602005012625T DE602005012625D1 DE 602005012625 D1 DE602005012625 D1 DE 602005012625D1 DE 602005012625 T DE602005012625 T DE 602005012625T DE 602005012625 T DE602005012625 T DE 602005012625T DE 602005012625 D1 DE602005012625 D1 DE 602005012625D1
- Authority
- DE
- Germany
- Prior art keywords
- accessing
- memory device
- level memory
- nand nonvolatile
- flash nand
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/564—Miscellaneous aspects
- G11C2211/5641—Multilevel memory having cells with different number of storage levels
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05106783A EP1746604B1 (de) | 2005-07-22 | 2005-07-22 | Verfahren zum Zugreifen auf eine nichtflüchtige Mehrpegelspeichervorrichtung vom Typ FLASH NAND |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602005012625D1 true DE602005012625D1 (de) | 2009-03-19 |
Family
ID=35519961
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602005012625T Active DE602005012625D1 (de) | 2005-07-22 | 2005-07-22 | Verfahren zum Zugreifen auf eine nichtflüchtige Mehrpegelspeichervorrichtung vom Typ FLASH NAND |
Country Status (3)
Country | Link |
---|---|
US (1) | US7382660B2 (de) |
EP (1) | EP1746604B1 (de) |
DE (1) | DE602005012625D1 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7593259B2 (en) * | 2006-09-13 | 2009-09-22 | Mosaid Technologies Incorporated | Flash multi-level threshold distribution scheme |
KR100769776B1 (ko) * | 2006-09-29 | 2007-10-24 | 주식회사 하이닉스반도체 | 낸드 플래시 메모리 소자의 프로그램 방법 |
US7593262B2 (en) * | 2006-12-12 | 2009-09-22 | Macronix International Co., Ltd. | Memory structure and operating method thereof |
US7580292B2 (en) | 2007-06-14 | 2009-08-25 | Macronix International Co., Ltd. | Method for programming a multilevel memory |
KR20090055314A (ko) * | 2007-11-28 | 2009-06-02 | 삼성전자주식회사 | 읽기 디스터번스를 줄일 수 있는 불휘발성 메모리 장치 |
CN101364444B (zh) * | 2008-02-05 | 2011-05-11 | 威盛电子股份有限公司 | 控制方法及运用该控制方法的存储器及处理系统 |
US8127091B2 (en) * | 2008-10-30 | 2012-02-28 | Micron Technology, Inc. | Programming memory cells with additional data for increased threshold voltage resolution |
US8341501B2 (en) | 2009-04-30 | 2012-12-25 | International Business Machines Corporation | Adaptive endurance coding of non-volatile memories |
US8176235B2 (en) * | 2009-12-04 | 2012-05-08 | International Business Machines Corporation | Non-volatile memories with enhanced write performance and endurance |
US8176234B2 (en) * | 2009-12-04 | 2012-05-08 | International Business Machines Corporation | Multi-write coding of non-volatile memories |
US8769374B2 (en) | 2010-10-13 | 2014-07-01 | International Business Machines Corporation | Multi-write endurance and error control coding of non-volatile memories |
KR101925384B1 (ko) | 2011-05-17 | 2019-02-28 | 삼성전자주식회사 | 불휘발성 메모리를 포함하는 메모리 시스템 및 불휘발성 메모리의 제어 방법 |
US8699266B2 (en) * | 2012-01-30 | 2014-04-15 | HGST Netherlands B.V. | Implementing enhanced data write for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding |
US8792272B2 (en) | 2012-01-30 | 2014-07-29 | HGST Netherlands B.V. | Implementing enhanced data partial-erase for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding |
US9208871B2 (en) | 2012-01-30 | 2015-12-08 | HGST Netherlands B.V. | Implementing enhanced data read for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding |
KR20160071118A (ko) * | 2014-12-11 | 2016-06-21 | 에스케이하이닉스 주식회사 | 반도체 장치 및 이의 동작 방법 |
KR102649347B1 (ko) | 2016-10-11 | 2024-03-20 | 삼성전자주식회사 | 불휘발성 메모리 장치를 프로그램하는 방법과, 상기 메모리 장치를 포함하는 시스템의 작동 방법 |
JP2024503771A (ja) * | 2021-12-14 | 2024-01-29 | 長江存儲科技有限責任公司 | メモリーデバイスおよびその動作 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001093288A (ja) * | 1999-09-20 | 2001-04-06 | Toshiba Corp | 不揮発性半導体記憶装置 |
JP3631463B2 (ja) * | 2001-12-27 | 2005-03-23 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US6522580B2 (en) * | 2001-06-27 | 2003-02-18 | Sandisk Corporation | Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states |
US6456528B1 (en) * | 2001-09-17 | 2002-09-24 | Sandisk Corporation | Selective operation of a multi-state non-volatile memory system in a binary mode |
KR100512181B1 (ko) * | 2003-07-11 | 2005-09-05 | 삼성전자주식회사 | 멀티 레벨 셀을 갖는 플래시 메모리 장치와 그것의 독출방법 및 프로그램 방법 |
US7057939B2 (en) * | 2004-04-23 | 2006-06-06 | Sandisk Corporation | Non-volatile memory and control with improved partial page program capability |
US7298648B2 (en) * | 2004-11-19 | 2007-11-20 | Samsung Electronics Co., Ltd. | Page buffer and multi-state nonvolatile memory device including the same |
US7251160B2 (en) * | 2005-03-16 | 2007-07-31 | Sandisk Corporation | Non-volatile memory and method with power-saving read and program-verify operations |
US7224614B1 (en) * | 2005-12-29 | 2007-05-29 | Sandisk Corporation | Methods for improved program-verify operations in non-volatile memories |
US7733704B2 (en) * | 2005-12-29 | 2010-06-08 | Sandisk Corporation | Non-volatile memory with power-saving multi-pass sensing |
-
2005
- 2005-07-22 EP EP05106783A patent/EP1746604B1/de active Active
- 2005-07-22 DE DE602005012625T patent/DE602005012625D1/de active Active
-
2006
- 2006-07-20 US US11/458,904 patent/US7382660B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP1746604B1 (de) | 2009-02-04 |
EP1746604A1 (de) | 2007-01-24 |
US7382660B2 (en) | 2008-06-03 |
US20070047299A1 (en) | 2007-03-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |