DE602005015632D1 - Einrichtung und verfahren zur steuerung mehrerer dma-tasks - Google Patents

Einrichtung und verfahren zur steuerung mehrerer dma-tasks

Info

Publication number
DE602005015632D1
DE602005015632D1 DE602005015632T DE602005015632T DE602005015632D1 DE 602005015632 D1 DE602005015632 D1 DE 602005015632D1 DE 602005015632 T DE602005015632 T DE 602005015632T DE 602005015632 T DE602005015632 T DE 602005015632T DE 602005015632 D1 DE602005015632 D1 DE 602005015632D1
Authority
DE
Germany
Prior art keywords
controlling multiple
multiple dma
dma tasks
tasks
controlling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005015632T
Other languages
English (en)
Inventor
Uri Shasha
Sagi Gurfinkel
Gilad Hassid
Eran Kahn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of DE602005015632D1 publication Critical patent/DE602005015632D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/28—DMA
    • G06F2213/2802—DMA using DMA transfer descriptors
DE602005015632T 2005-06-30 2005-06-30 Einrichtung und verfahren zur steuerung mehrerer dma-tasks Active DE602005015632D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IB2005/052174 WO2007003985A1 (en) 2005-06-30 2005-06-30 Device and method for controlling multiple dma tasks

Publications (1)

Publication Number Publication Date
DE602005015632D1 true DE602005015632D1 (de) 2009-09-03

Family

ID=35708638

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005015632T Active DE602005015632D1 (de) 2005-06-30 2005-06-30 Einrichtung und verfahren zur steuerung mehrerer dma-tasks

Country Status (4)

Country Link
US (1) US7930444B2 (de)
EP (1) EP1899825B1 (de)
DE (1) DE602005015632D1 (de)
WO (1) WO2007003985A1 (de)

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WO2007003986A1 (en) * 2005-06-30 2007-01-11 Freescale Semiconductor, Inc. Device and method for controlling an execution of a dma task
WO2007003984A1 (en) * 2005-06-30 2007-01-11 Freescale Semiconductor, Inc. Device and method for arbitrating between direct memory access task requests
DE602005023542D1 (de) * 2005-06-30 2010-10-21 Freescale Semiconductor Inc Einrichtung und verfahren zum ausführen einer dma-task
US7496695B2 (en) * 2005-09-29 2009-02-24 P.A. Semi, Inc. Unified DMA
US7620746B2 (en) * 2005-09-29 2009-11-17 Apple Inc. Functional DMA performing operation on DMA data and writing result of operation
US7873757B2 (en) * 2007-02-16 2011-01-18 Arm Limited Controlling complex non-linear data transfers
US8250253B2 (en) * 2010-06-23 2012-08-21 Intel Corporation Method, apparatus and system for reduced channel starvation in a DMA engine
US8332546B2 (en) * 2010-07-20 2012-12-11 Lsi Corporation Fully asynchronous direct memory access controller and processor work
EP2434404B1 (de) * 2010-09-27 2017-08-23 Intel Deutschland GmbH Verfahren und Anordnung zur Streamingdatenprofilierung
US20120089759A1 (en) * 2010-10-08 2012-04-12 Qualcomm Incorporated Arbitrating Stream Transactions Based on Information Related to the Stream Transaction(s)
US8935329B2 (en) * 2012-01-11 2015-01-13 International Business Machines Corporation Managing message transmission and reception
WO2015001390A1 (en) * 2013-07-04 2015-01-08 Freescale Semiconductor, Inc. Method and device for data streaming in a mobile communication system
US10342032B2 (en) 2013-07-04 2019-07-02 Nxp Usa, Inc. Method and device for streaming control data in a mobile communication system
US10963183B2 (en) * 2017-03-20 2021-03-30 Intel Corporation Technologies for fine-grained completion tracking of memory buffer accesses
US11855898B1 (en) 2018-03-14 2023-12-26 F5, Inc. Methods for traffic dependent direct memory access optimization and devices thereof
CN113703951B (zh) * 2021-10-27 2022-02-18 苏州浪潮智能科技有限公司 一种处理dma的方法、装置、及计算机可读存储介质

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JP2003141057A (ja) * 2001-11-06 2003-05-16 Mitsubishi Electric Corp Ｄｍａ転送制御回路
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US6922741B2 (en) 2002-02-01 2005-07-26 Intel Corporation Method and system for monitoring DMA status
JP2004013395A (ja) 2002-06-05 2004-01-15 Denso Corp Ｄｍａコントローラ
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US20040073721A1 (en) 2002-10-10 2004-04-15 Koninklijke Philips Electronics N.V. DMA Controller for USB and like applications
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DE602005023542D1 (de) 2005-06-30 2010-10-21 Freescale Semiconductor Inc Einrichtung und verfahren zum ausführen einer dma-task
WO2007003986A1 (en) 2005-06-30 2007-01-11 Freescale Semiconductor, Inc. Device and method for controlling an execution of a dma task
WO2007003984A1 (en) 2005-06-30 2007-01-11 Freescale Semiconductor, Inc. Device and method for arbitrating between direct memory access task requests
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US20100144589A1 (en) * 2008-08-08 2010-06-10 Samuel Bogoch Methods of predicting cancer lethality using replikin counts

Also Published As

Publication number Publication date
EP1899825A1 (de) 2008-03-19
US7930444B2 (en) 2011-04-19
EP1899825B1 (de) 2009-07-22
WO2007003985A1 (en) 2007-01-11
US20100064069A1 (en) 2010-03-11

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