DE602006005664D1 - Programmverfahren für flash-speicher mit optimiertem spannungspegel abhängig von der anzahl der bit, von denen detektiert wurde, dass ihre programmierung erfolglos war - Google Patents

Programmverfahren für flash-speicher mit optimiertem spannungspegel abhängig von der anzahl der bit, von denen detektiert wurde, dass ihre programmierung erfolglos war

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Publication number
DE602006005664D1
DE602006005664D1 DE602006005664T DE602006005664T DE602006005664D1 DE 602006005664 D1 DE602006005664 D1 DE 602006005664D1 DE 602006005664 T DE602006005664 T DE 602006005664T DE 602006005664 T DE602006005664 T DE 602006005664T DE 602006005664 D1 DE602006005664 D1 DE 602006005664D1
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Germany
Prior art keywords
programming
flash memory
volatile memory
programming voltage
memory device
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Application number
DE602006005664T
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English (en)
Inventor
Chang Ha Wan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
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Micron Technology Inc
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Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of DE602006005664D1 publication Critical patent/DE602006005664D1/de
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Anticipated expiration legal-status Critical

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/021Detection or location of defective auxiliary circuits, e.g. defective refresh counters in voltage or current generators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409Online test
DE602006005664T 2005-06-17 2006-06-13 Programmverfahren für flash-speicher mit optimiertem spannungspegel abhängig von der anzahl der bit, von denen detektiert wurde, dass ihre programmierung erfolglos war Active DE602006005664D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/156,223 US7239557B2 (en) 2005-06-17 2005-06-17 Program method with optimized voltage level for flash memory
PCT/US2006/023086 WO2006138333A1 (en) 2005-06-17 2006-06-13 Program method for flash memory with optimized voltage level dependent of the number of bits detected to have failed programming

Publications (1)

Publication Number Publication Date
DE602006005664D1 true DE602006005664D1 (de) 2009-04-23

Family

ID=37084634

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006005664T Active DE602006005664D1 (de) 2005-06-17 2006-06-13 Programmverfahren für flash-speicher mit optimiertem spannungspegel abhängig von der anzahl der bit, von denen detektiert wurde, dass ihre programmierung erfolglos war

Country Status (9)

Country Link
US (4) US7239557B2 (de)
EP (1) EP1894207B1 (de)
JP (1) JP4640660B2 (de)
KR (1) KR100956709B1 (de)
CN (1) CN101268520B (de)
AT (1) ATE425539T1 (de)
DE (1) DE602006005664D1 (de)
TW (1) TWI305918B (de)
WO (1) WO2006138333A1 (de)

Families Citing this family (115)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7656710B1 (en) 2005-07-14 2010-02-02 Sau Ching Wong Adaptive operations for nonvolatile memories
US7395466B2 (en) * 2005-12-30 2008-07-01 Intel Corporation Method and apparatus to adjust voltage for storage location reliability
US7702935B2 (en) * 2006-01-25 2010-04-20 Apple Inc. Reporting flash memory operating voltages
US20070174641A1 (en) * 2006-01-25 2007-07-26 Cornwell Michael J Adjusting power supplies for data storage devices
US7861122B2 (en) * 2006-01-27 2010-12-28 Apple Inc. Monitoring health of non-volatile memory
US7564718B2 (en) * 2006-04-12 2009-07-21 Infineon Technologies Flash Gmbh & Co. Kg Method for programming a block of memory cells, non-volatile memory device and memory card device
WO2007132452A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Reducing programming error in memory devices
WO2007132456A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Memory device with adaptive capacity
WO2007132457A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Combined distortion estimation and error correction coding for memory devices
WO2007132453A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Distortion estimation and cancellation in memory devices
US20080036487A1 (en) * 2006-08-09 2008-02-14 Arm Limited Integrated circuit wearout detection
US8060806B2 (en) 2006-08-27 2011-11-15 Anobit Technologies Ltd. Estimation of non-linear distortion in memory devices
US7821826B2 (en) 2006-10-30 2010-10-26 Anobit Technologies, Ltd. Memory cell readout using successive approximation
WO2008053472A2 (en) 2006-10-30 2008-05-08 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
US7924648B2 (en) 2006-11-28 2011-04-12 Anobit Technologies Ltd. Memory power and performance management
US8037231B2 (en) * 2006-11-28 2011-10-11 Intel Corporation Memory architecture for separation of code and data in a memory device
WO2008068747A2 (en) 2006-12-03 2008-06-12 Anobit Technologies Ltd. Automatic defect management in memory devices
US20080141082A1 (en) * 2006-12-06 2008-06-12 Atmel Corporation Test mode multi-byte programming with internal verify and polling function
US7900102B2 (en) 2006-12-17 2011-03-01 Anobit Technologies Ltd. High-speed programming of memory devices
US8151166B2 (en) 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
US7751240B2 (en) 2007-01-24 2010-07-06 Anobit Technologies Ltd. Memory device with negative thresholds
WO2008111058A2 (en) 2007-03-12 2008-09-18 Anobit Technologies Ltd. Adaptive estimation of memory cell read thresholds
US8001320B2 (en) 2007-04-22 2011-08-16 Anobit Technologies Ltd. Command interface for memory devices
US20080288712A1 (en) 2007-04-25 2008-11-20 Cornwell Michael J Accessing metadata with an external host
US7913032B1 (en) 2007-04-25 2011-03-22 Apple Inc. Initiating memory wear leveling
KR100927119B1 (ko) * 2007-05-10 2009-11-18 삼성전자주식회사 불 휘발성 반도체 메모리 장치 및 그것의 프로그램 방법
US8234545B2 (en) 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
US8429493B2 (en) 2007-05-12 2013-04-23 Apple Inc. Memory device with internal signap processing unit
US7925936B1 (en) 2007-07-13 2011-04-12 Anobit Technologies Ltd. Memory device with non-uniform programming levels
US7697365B2 (en) 2007-07-13 2010-04-13 Silicon Storage Technology, Inc. Sub volt flash memory system
US7729161B2 (en) * 2007-08-02 2010-06-01 Macronix International Co., Ltd. Phase change memory with dual word lines and source lines and method of operating same
US8259497B2 (en) 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
US8174905B2 (en) 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
US7773413B2 (en) 2007-10-08 2010-08-10 Anobit Technologies Ltd. Reliable data storage in analog memory cells in the presence of temperature variations
WO2009050703A2 (en) 2007-10-19 2009-04-23 Anobit Technologies Data storage in analog memory cell arrays having erase failures
US8000141B1 (en) 2007-10-19 2011-08-16 Anobit Technologies Ltd. Compensation for voltage drifts in analog memory cells
US8068360B2 (en) 2007-10-19 2011-11-29 Anobit Technologies Ltd. Reading analog memory cells using built-in multi-threshold commands
WO2009063450A2 (en) 2007-11-13 2009-05-22 Anobit Technologies Optimized selection of memory units in multi-unit memory devices
US8225181B2 (en) 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US8209588B2 (en) 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
US8456905B2 (en) 2007-12-16 2013-06-04 Apple Inc. Efficient data storage in multi-plane memory devices
US8085586B2 (en) 2007-12-27 2011-12-27 Anobit Technologies Ltd. Wear level estimation in analog memory cells
US8156398B2 (en) 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
US7924587B2 (en) 2008-02-21 2011-04-12 Anobit Technologies Ltd. Programming of analog memory cells using a single programming pulse per state transition
US7864573B2 (en) 2008-02-24 2011-01-04 Anobit Technologies Ltd. Programming analog memory cells for reduced variance after retention
ITRM20080114A1 (it) * 2008-02-29 2009-09-01 Micron Technology Inc Compensazione della perdita di carica durante la programmazione di un dispositivo di memoria.
US8230300B2 (en) 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US8059457B2 (en) 2008-03-18 2011-11-15 Anobit Technologies Ltd. Memory device with multiple-accuracy read commands
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US7633804B2 (en) * 2008-03-20 2009-12-15 Micron Technology, Inc. Adjusting programming or erase voltage pulses in response to the number of programming or erase failures
KR101506655B1 (ko) * 2008-05-15 2015-03-30 삼성전자주식회사 메모리 장치 및 메모리 데이터 오류 관리 방법
US7995388B1 (en) 2008-08-05 2011-08-09 Anobit Technologies Ltd. Data storage using modified voltages
US7924613B1 (en) 2008-08-05 2011-04-12 Anobit Technologies Ltd. Data storage in analog memory cells with protection against programming interruption
JP2010040144A (ja) * 2008-08-07 2010-02-18 Toshiba Corp 不揮発性半導体記憶システム
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8000135B1 (en) 2008-09-14 2011-08-16 Anobit Technologies Ltd. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US8261159B1 (en) 2008-10-30 2012-09-04 Apple, Inc. Data scrambling schemes for memory devices
US8208304B2 (en) 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8397131B1 (en) 2008-12-31 2013-03-12 Apple Inc. Efficient readout schemes for analog memory cell devices
US8248831B2 (en) 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
US8228701B2 (en) 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
JP2010211883A (ja) * 2009-03-11 2010-09-24 Toshiba Corp 不揮発性半導体記憶装置
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8832354B2 (en) 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8243520B2 (en) * 2009-11-02 2012-08-14 Infineon Technologies Ag Non-volatile memory with predictive programming
US8130553B2 (en) * 2009-12-02 2012-03-06 Seagate Technology Llc Systems and methods for low wear operation of solid state memory
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8677203B1 (en) 2010-01-11 2014-03-18 Apple Inc. Redundant data storage schemes for multi-die memory systems
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
JP5566797B2 (ja) * 2010-07-02 2014-08-06 株式会社東芝 不揮発性半導体記憶装置
US9741436B2 (en) 2010-07-09 2017-08-22 Seagate Technology Llc Dynamically controlling an operation execution time for a storage device
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8645794B1 (en) 2010-07-31 2014-02-04 Apple Inc. Data storage in analog memory cells using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8310870B2 (en) * 2010-08-03 2012-11-13 Sandisk Technologies Inc. Natural threshold voltage distribution compaction in non-volatile memory
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
KR101201582B1 (ko) * 2010-09-06 2012-11-14 에스케이하이닉스 주식회사 반도체 메모리 장치 및 이의 동작 방법
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals
US8842469B2 (en) * 2010-11-09 2014-09-23 Freescale Semiconductor, Inc. Method for programming a multi-state non-volatile memory (NVM)
TWI447731B (zh) * 2010-12-01 2014-08-01 Phison Electronics Corp 資料讀取方法、記憶體儲存裝置及其控制器
US8605531B2 (en) * 2011-06-20 2013-12-10 Intel Corporation Fast verify for phase change memory with switch
JP5950591B2 (ja) * 2012-01-31 2016-07-13 エスアイアイ・セミコンダクタ株式会社 ボルテージレギュレータ
US9355688B2 (en) 2012-05-08 2016-05-31 Intel Corporation Adaptive voltage input to a charge pump
KR101996004B1 (ko) 2012-05-29 2019-07-03 삼성전자주식회사 비휘발성 메모리 장치의 프로그램 방법 및 그것의 메모리 시스템
US8724404B2 (en) 2012-10-15 2014-05-13 United Microelectronics Corp. Memory, supply voltage generation circuit, and operation method of a supply voltage generation circuit used for a memory array
KR102221752B1 (ko) 2014-03-20 2021-03-02 삼성전자주식회사 메모리 장치의 프로그램 방법 및 이를 포함하는 데이터 독출 방법
KR20150130849A (ko) * 2014-05-14 2015-11-24 에스케이하이닉스 주식회사 반도체 장치의 동작 방법
KR102314135B1 (ko) 2015-06-22 2021-10-18 삼성전자 주식회사 적응적인 루프를 수행하는 플래시 메모리 장치, 메모리 시스템 및 그 동작방법
KR102251815B1 (ko) 2015-07-02 2021-05-13 삼성전자주식회사 메모리 장치 및 메모리 시스템
US9489990B1 (en) * 2015-11-17 2016-11-08 Atmel Corporation Adaptive non-volatile memory programming
US10082964B2 (en) 2016-04-27 2018-09-25 Micron Technology, Inc Data caching for ferroelectric memory
KR20180096845A (ko) * 2017-02-20 2018-08-30 에스케이하이닉스 주식회사 메모리 시스템 및 이의 동작 방법
CN110232945B (zh) * 2018-03-06 2021-04-27 华邦电子股份有限公司 存储器装置以及其写入/擦除方法
US10522226B2 (en) 2018-05-01 2019-12-31 Silicon Storage Technology, Inc. Method and apparatus for high voltage generation for analog neural memory in deep learning artificial neural network
JP2020009511A (ja) 2018-07-05 2020-01-16 キオクシア株式会社 メモリシステム及び不揮発性半導体メモリ
US10741256B2 (en) * 2018-09-18 2020-08-11 Western Digital Technologies, Inc. Data storage systems and methods for improved recovery after a write abort event
US10614898B1 (en) 2018-09-19 2020-04-07 Sandisk Technologies Llc Adaptive control of memory cell programming voltage
US11081170B2 (en) 2018-12-19 2021-08-03 Micron Technology, Inc. Apparatus and methods for programming memory cells responsive to an indication of age of the memory cells
CN111951857B (zh) * 2019-05-15 2023-06-09 兆易创新科技集团股份有限公司 一种非易失性存储器的编程方法及控制装置
CN111951870B (zh) * 2019-05-15 2023-06-20 兆易创新科技集团股份有限公司 一种非易失性存储器的编程方法及控制装置
US10964402B1 (en) * 2020-02-19 2021-03-30 Sandisk Technologies Llc Reprogramming memory cells to tighten threshold voltage distributions and improve data retention
US11556416B2 (en) 2021-05-05 2023-01-17 Apple Inc. Controlling memory readout reliability and throughput by adjusting distance between read thresholds
US11749346B2 (en) * 2021-05-19 2023-09-05 Micron Technology, Inc. Overwrite mode in memory programming operations
CN113692623A (zh) * 2021-06-30 2021-11-23 长江存储科技有限责任公司 用于三维nand存储器的数据保护
US11847342B2 (en) 2021-07-28 2023-12-19 Apple Inc. Efficient transfer of hard data and confidence levels in reading a nonvolatile memory

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5257225A (en) 1992-03-12 1993-10-26 Micron Technology, Inc. Method for programming programmable devices by utilizing single or multiple pulses varying in pulse width and amplitude
US5357463A (en) 1992-11-17 1994-10-18 Micron Semiconductor, Inc. Method for reverse programming of a flash EEPROM
DE19542029C1 (de) * 1995-11-10 1997-04-10 Siemens Ag Verfahren zum selbsttätigen Ermitteln der nötigen Hochspannung zum Programmieren/Löschen eines EEPROMs
KR100208433B1 (ko) * 1995-12-27 1999-07-15 김영환 플래쉬 메모리 소자 및 그를 이용한 프로그램 방법
US5768287A (en) 1996-10-24 1998-06-16 Micron Quantum Devices, Inc. Apparatus and method for programming multistate memory device
JP3786513B2 (ja) * 1997-12-11 2006-06-14 株式会社東芝 不揮発性半導体記憶装置
US6188613B1 (en) 1998-10-08 2001-02-13 Micron Technology, Inc. Device and method in a semiconductor memory for erasing/programming memory cells using erase/program speeds stored for each cell
US6493270B2 (en) 1999-07-01 2002-12-10 Micron Technology, Inc. Leakage detection in programming algorithm for a flash memory device
KR100414146B1 (ko) * 2000-06-27 2004-01-13 주식회사 하이닉스반도체 플래쉬 메모리 소자의 소거 방법
JP4250325B2 (ja) 2000-11-01 2009-04-08 株式会社東芝 半導体記憶装置
US6466480B2 (en) 2001-03-27 2002-10-15 Micron Technology, Inc. Method and apparatus for trimming non-volatile memory cells
KR100496866B1 (ko) 2002-12-05 2005-06-22 삼성전자주식회사 미프로그램된 셀들 및 과프로그램된 셀들 없이 균일한문턱 전압 분포를 갖는 플레쉬 메모리 장치 및 그프로그램 검증 방법
US6882567B1 (en) 2002-12-06 2005-04-19 Multi Level Memory Technology Parallel programming of multiple-bit-per-cell memory cells on a continuous word line
US7392436B2 (en) 2003-05-08 2008-06-24 Micron Technology, Inc. Program failure recovery
KR100505707B1 (ko) * 2003-08-26 2005-08-03 삼성전자주식회사 프로그램 동작시 가변되는 비트 라인의 전압 레벨을조절하는 플래쉬 메모리 장치의 프로그램 제어회로 및 그제어방법
US6977842B2 (en) 2003-09-16 2005-12-20 Micron Technology, Inc. Boosted substrate/tub programming for flash memories
US6898126B1 (en) * 2003-12-15 2005-05-24 Powerchip Semiconductor Corp. Method of programming a flash memory through boosting a voltage level of a source line

Also Published As

Publication number Publication date
TWI305918B (en) 2009-02-01
ATE425539T1 (de) 2009-03-15
JP2008544435A (ja) 2008-12-04
KR100956709B1 (ko) 2010-05-06
US7239557B2 (en) 2007-07-03
WO2006138333A1 (en) 2006-12-28
EP1894207B1 (de) 2009-03-11
TW200713284A (en) 2007-04-01
US7453737B2 (en) 2008-11-18
EP1894207A1 (de) 2008-03-05
US20080031047A1 (en) 2008-02-07
US7663934B2 (en) 2010-02-16
CN101268520A (zh) 2008-09-17
KR20080019713A (ko) 2008-03-04
US20100142283A1 (en) 2010-06-10
US7876623B2 (en) 2011-01-25
US20060285396A1 (en) 2006-12-21
US20090073772A1 (en) 2009-03-19
JP4640660B2 (ja) 2011-03-02
CN101268520B (zh) 2012-03-28

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