DE602006008748D1 - Mehrstufige programmierung bei einer nichtflüchtigen speichervorrichtung - Google Patents

Mehrstufige programmierung bei einer nichtflüchtigen speichervorrichtung

Info

Publication number
DE602006008748D1
DE602006008748D1 DE602006008748T DE602006008748T DE602006008748D1 DE 602006008748 D1 DE602006008748 D1 DE 602006008748D1 DE 602006008748 T DE602006008748 T DE 602006008748T DE 602006008748 T DE602006008748 T DE 602006008748T DE 602006008748 D1 DE602006008748 D1 DE 602006008748D1
Authority
DE
Germany
Prior art keywords
memory device
volatile memory
stage programming
programming
memory block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006008748T
Other languages
English (en)
Inventor
Di Li
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of DE602006008748D1 publication Critical patent/DE602006008748D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564—Miscellaneous aspects
    • G11C2211/5648—Multilevel memory programming, reading or erasing operations wherein the order or sequence of the operations is relevant
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory
DE602006008748T 2005-02-28 2006-02-28 Mehrstufige programmierung bei einer nichtflüchtigen speichervorrichtung Active DE602006008748D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/067,977 US7212436B2 (en) 2005-02-28 2005-02-28 Multiple level programming in a non-volatile memory device
PCT/US2006/006882 WO2006093886A1 (en) 2005-02-28 2006-02-28 Multiple level programming in a non-volatile memory device

Publications (1)

Publication Number Publication Date
DE602006008748D1 true DE602006008748D1 (de) 2009-10-08

Family

ID=36660742

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006008748T Active DE602006008748D1 (de) 2005-02-28 2006-02-28 Mehrstufige programmierung bei einer nichtflüchtigen speichervorrichtung

Country Status (8)

Country Link
US (2) US7212436B2 (de)
EP (1) EP1854102B1 (de)
JP (1) JP4806814B2 (de)
KR (1) KR100904352B1 (de)
CN (1) CN101128883B (de)
AT (1) ATE441188T1 (de)
DE (1) DE602006008748D1 (de)
WO (1) WO2006093886A1 (de)

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US7212447B2 (en) * 2005-08-04 2007-05-01 Micron Technology, Inc. NAND flash memory cell programming
KR101162739B1 (ko) * 2005-09-29 2012-07-05 트렉 2000 인터네셔널 엘티디. Ｓｌｃ 및 ｍｌｃ 플래시 메모리를 이용한 휴대용 데이터저장 장치 및 방법
US7366013B2 (en) * 2005-12-09 2008-04-29 Micron Technology, Inc. Single level cell programming in a multiple level cell non-volatile memory device
KR101075253B1 (ko) * 2006-06-22 2011-10-20 샌디스크 코포레이션 임계 전압의 치밀한 분포가 가능한 비휘발성 메모리의 비 실시간 재 프로그래밍 방법
US7474560B2 (en) 2006-08-21 2009-01-06 Micron Technology, Inc. Non-volatile memory with both single and multiple level cells
KR100769776B1 (ko) * 2006-09-29 2007-10-24 주식회사 하이닉스반도체 낸드 플래시 메모리 소자의 프로그램 방법
US7738291B2 (en) * 2007-03-12 2010-06-15 Micron Technology, Inc. Memory page boosting method, device and system
KR100877104B1 (ko) * 2007-06-26 2009-01-07 주식회사 하이닉스반도체 멀티 레벨 셀 플래시 메모리소자의 프로그램 방법
US7869273B2 (en) 2007-09-04 2011-01-11 Sandisk Corporation Reducing the impact of interference during programming
US7742335B2 (en) 2007-10-31 2010-06-22 Micron Technology, Inc. Non-volatile multilevel memory cells
US7848142B2 (en) 2007-10-31 2010-12-07 Micron Technology, Inc. Fractional bits in memory cells
US7668012B2 (en) * 2007-10-31 2010-02-23 Micron Technology, Inc. Memory cell programming
KR101227368B1 (ko) * 2007-11-05 2013-01-29 삼성전자주식회사 낸드 플래시 메모리 소자의 프로그래밍 방법 및 데이터읽기 방법.
US7826262B2 (en) * 2008-01-10 2010-11-02 Macronix International Co., Ltd Operation method of nitride-based flash memory and method of reducing coupling interference
KR101386489B1 (ko) * 2008-01-14 2014-04-21 삼성전자주식회사 메모리 장치 및 멀티 비트 프로그래밍 방법
US7817472B2 (en) * 2008-02-14 2010-10-19 Macronix International Co., Ltd. Operating method of memory device
KR101378602B1 (ko) * 2008-05-13 2014-03-25 삼성전자주식회사 메모리 장치 및 메모리 프로그래밍 방법
US7949821B2 (en) 2008-06-12 2011-05-24 Micron Technology, Inc. Method of storing data on a flash memory device
KR101490421B1 (ko) 2008-07-11 2015-02-06 삼성전자주식회사 메모리 셀 사이의 간섭을 억제할 수 있는 불휘발성 메모리장치, 컴퓨팅 시스템 및 그것의 프로그램 방법
KR101518039B1 (ko) * 2008-12-08 2015-05-07 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 프로그램 방법
KR101586047B1 (ko) * 2009-03-25 2016-01-18 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 프로그램 방법
JP5259481B2 (ja) * 2009-04-14 2013-08-07 株式会社東芝 不揮発性半導体記憶装置
US8402203B2 (en) * 2009-12-31 2013-03-19 Seagate Technology Llc Systems and methods for storing data in a multi-level cell solid state storage device
US8549214B2 (en) * 2010-02-17 2013-10-01 Marvell World Trade Ltd. Protection against data corruption for multi-level memory cell (MLC) flash memory
US8218366B2 (en) 2010-04-18 2012-07-10 Sandisk Technologies Inc. Programming non-volatile storage including reducing impact from other memory cells
US8767459B1 (en) * 2010-07-31 2014-07-01 Apple Inc. Data storage in analog memory cells across word lines using a non-integer number of bits per cell
US10671529B2 (en) 2010-08-20 2020-06-02 Samsung Electronics Co., Ltd. Address scheduling methods for non-volatile memory devices with three-dimensional memory cell arrays
KR101807539B1 (ko) 2010-08-20 2017-12-12 삼성전자주식회사 3차원 비휘발성 메모리 장치의 메모리 셀 어레이의 어드레스 스케쥴링 방법
US8913428B2 (en) 2013-01-25 2014-12-16 Sandisk Technologies Inc. Programming non-volatile storage system with multiple memory die
US9026757B2 (en) * 2013-01-25 2015-05-05 Sandisk Technologies Inc. Non-volatile memory programming data preservation
TWI514141B (zh) * 2013-08-08 2015-12-21 Phison Electronics Corp 記憶體位址管理方法、記憶體控制器與記憶體儲存裝置
CN104424040B (zh) 2013-08-23 2017-10-31 慧荣科技股份有限公司 存取快闪存储器中储存单元的方法以及使用该方法的装置
CN104424127A (zh) 2013-08-23 2015-03-18 慧荣科技股份有限公司 存取快闪存储器中储存单元的方法以及使用该方法的装置
TWI646553B (zh) * 2013-08-23 2019-01-01 慧榮科技股份有限公司 存取快閃記憶體中儲存單元的方法以及使用該方法的裝置
CN104425019B (zh) 2013-08-23 2018-07-06 慧荣科技股份有限公司 存取快闪存储器中存储单元的方法以及使用该方法的装置
CN110175088B (zh) * 2013-08-23 2022-11-11 慧荣科技股份有限公司 存取快闪存储器中储存单元的方法以及使用该方法的装置
KR102070667B1 (ko) 2013-08-26 2020-01-29 삼성전자주식회사 비휘발성 메모리 장치의 구동 방법
US9734912B2 (en) * 2015-11-25 2017-08-15 Macronix International Co., Ltd. Reprogramming single bit memory cells without intervening erasure
CN110827904B (zh) * 2018-08-09 2023-04-14 旺宏电子股份有限公司 存储器装置及其编程方法
KR20230079888A (ko) * 2021-11-29 2023-06-07 삼성전자주식회사 메모리 어레이의 프로그램 방법 및 이를 수행하는 메모리 장치

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JP3200006B2 (ja) * 1996-03-18 2001-08-20 株式会社東芝 不揮発性半導体記憶装置
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JP2001093288A (ja) * 1999-09-20 2001-04-06 Toshiba Corp 不揮発性半導体記憶装置
US6522580B2 (en) * 2001-06-27 2003-02-18 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
US6967872B2 (en) * 2001-12-18 2005-11-22 Sandisk Corporation Method and system for programming and inhibiting multi-level, non-volatile memory cells
DE10164415A1 (de) * 2001-12-29 2003-07-17 Philips Intellectual Property Verfahren und Anordnung zur Programmierung und Verifizierung von EEPROM-Pages sowie ein entsprechendes Computerprogrammprodukt und ein entsprechendes computerlesbares Speichermedium
US6657891B1 (en) * 2002-11-29 2003-12-02 Kabushiki Kaisha Toshiba Semiconductor memory device for storing multivalued data
JP3935139B2 (ja) * 2002-11-29 2007-06-20 株式会社東芝 半導体記憶装置

Also Published As

Publication number Publication date
EP1854102B1 (de) 2009-08-26
CN101128883B (zh) 2010-06-16
US7221589B2 (en) 2007-05-22
EP1854102A1 (de) 2007-11-14
US20060193176A1 (en) 2006-08-31
KR100904352B1 (ko) 2009-06-23
KR20070112224A (ko) 2007-11-22
US7212436B2 (en) 2007-05-01
CN101128883A (zh) 2008-02-20
ATE441188T1 (de) 2009-09-15
US20060209596A1 (en) 2006-09-21
WO2006093886A1 (en) 2006-09-08
JP4806814B2 (ja) 2011-11-02
JP2008532199A (ja) 2008-08-14

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